JPS63244235A - Method and device for processing abnormality - Google Patents

Abstract

PURPOSE:To properly grasp the situation at a time when an abnormality occurs and to execute a suitable error processing by writing the operating state of a system at the time when the abnormality is detected in a nonvolatile memory. CONSTITUTION:A timer 4 is started, and if a response to an access data comes or if the timer 4 reaches an overtime state is monitored. The content of an error at the time when a time-over occurs is examined, and the result is written in the error content storing area of the nonvolatile memory 11, then the number of an equipment operating at said time is read out from the prescribed position of a memory 3, and it is written similarly in the error equipment number storing area of the memory 11. As a result, it can be made possible to read out the situation of an error-occurrence and to analyze it, even when a reset key or others on a final control element 7 is depressed by the interruption of power source.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an abnormality handling method in an information processing system equipped with a nonvolatile memory.

[Prior Art] With the recent development of semiconductor integration technology, single-chip microcomputer LSIs have become popular. Devices incorporating these microcomputers (hereinafter referred to as rMRUJ) have also become more diverse and are now available in all kinds of devices.

These devices incorporate a self-diagnosis device to prevent damage to the connection I10, and are configured to check each component for errors before starting operation, and to notify you if there is an error. are becoming more common.

Furthermore, devices have also appeared that monitor abnormalities in each component even during operation, stop processing as soon as an abnormality is detected, and notify the occurrence of an abnormality.

An example of this conventional device is shown in FIG.

In the figure, 1 is a microprocessor (CPtJ) that controls the entire device according to the program stored in ROM2.
, 2 is a ROM that stores various parameters specific to the external device of the above-mentioned program, 3 is a memory composed of a volatile semiconductor IC used as a work area for CPU 1, etc., and 4 is a timer. is used for monitoring time-overs during serial communication, which will be described later. 5 is a data communication interface for connecting this device and other devices via a transmission path 15 and performing data communication between them, and 6 is a CPU that connects each other component such as an external device of this device system. 7 is an operation section including a keyboard consisting of a "start key" for instructing the start of operation of this device, various instruction input keys, etc. , an operation display indicating that the operation is in progress,
Displays such as error display and mode display are included. Further, reference numeral 8 denotes a motor, which performs forward and reverse rotation under the control of the CPU to position the controlled object. 9 processes the image data sent from cpul and the image data input independently to the CP
An image processing unit outputs to U1, and 10 is a display unit that displays the operating status of the apparatus.

The operation of the conventional device having the above configuration will be explained below with reference to the flowchart shown in FIG.

This device performs each fffi operation according to instructions from an external system and reports the results. First, in step S1, communication processing with other devices is executed via the data communication interface 5.

Details of this communication processing are shown in FIG.

The communication processing subroutine shown in FIG. 11 is constantly accessed and performs data communication with other external devices.

First, in step S30, access data is transmitted to the connected device. Since the connected device always returns a response to this access, the timer 4 is reset and activated in the following step 531, and in steps S32 and S33, a response to the access data is received or the timer 4 times out. Monitor whether this happens. If a response from the connected device is received here, step S332 is followed by step S34.
The process proceeds to , stores the received response data in the memory 3, and returns. This response may be valid data such as operation instruction data or an operation start command, or may simply be response data returned without any specific instruction. In the case of simply returning response data, store this in memory 3.
It does not need to be stored in .

On the other hand, in the case of time over, the process proceeds from step S33 to step S35, where the CPUI displays an error on the display unit 10 and the operation unit 7, notifying the operator that an error has occurred during data communication, and in step 336 At this point, the CPU 1 enters a halt state.

Returning to the explanation of FIG. 10 again, such a communication process is executed in step S1, and when a response is received from the connected device, the process proceeds to step S2, and this response is received as an operation start response (or when the "start key" on the operation unit 7 is pressed. If there is no response (or key human power input), the process returns to step S1. If an operation instruction is input here, the process proceeds to step S3, and an operation lamp (not shown) on the display section 10 is turned on. Then, in the next step S4, the communication processing subroutine is executed again.

Here, for example, access data indicating that the device is in the operating mode is sent, and a response is received. Therefore, in step S5, it is checked whether the response is permission to proceed to the next process or not, and if the response is not permission to proceed, the process corresponding to the response is executed, and the process returns to step S4 again to wait for reception of the proceeding permission response. . Upon receiving the proceeding permission response, step S5
The process then proceeds to step S6, and the process instructed in the response to the previous communication process is executed. For example, the image processing section 7 is activated here, and the motor 8 is rotated in the forward direction (positive direction). Then, the communication processing in step S7 is executed to receive the next response and store it in the memory 3. And the following step S8
It is checked whether the received response is a proceeding permission response or not, and if it is not a proceeding permission response, the process returns to step 7 again.

Here, when a proceeding permission response to the next process is received, the process proceeds from step S8 to step S9, and the process instructed in the previous communication process (step S7) is executed. For example, motor 8
Processes such as stopping the rotation in the forward direction (positive direction) are executed, and after the process is executed, the process proceeds to step SIO and the communication process is executed again. Then, in the same manner as described above, the reception of a proceeding permission response to the next process is monitored, and when this proceeding permission response is received, the process proceeds to step S12, and according to the instruction in the previous communication process, for example, the motor 8 is moved back (reverse). The rotation is started, and the instruction input is stored in the memory 3 in steps S13 and 514 again, and the process waits for permission to proceed with the process to be received. When permission to proceed is received, processing is performed according to the instructions in step S15, for example, stopping the motor 8 (stopping from backing up).
, executes processing such as deactivating the image processing unit 9. After the process is executed, the instruction response is received again in step S16, 317 and stored in the memory 3, in preparation for receiving the proceeding permission response. If the instruction response here is an instruction to end the process, the CPU 1 that has received the proceeding permission response turns off the operating lamp on the display unit 10, ends the series of processes, and returns to step S1.

In this way, processing is executed in accordance with instructions sent from other connected devices via the data communication interface 5.

[Problems to be solved by the invention] As described above, the processing content is not fixed, but changes depending on instructions from the connected device, and even if an error occurs during this processing, such as a timeout in communication processing, it will not be fixed. However, since the error signal was simply turned on and the CPU 1 was stopped, the error state could not be clearly recognized and appropriate processing could not be performed.

Furthermore, in cases where the occurrence of an error is affected by the operating state of the components, it is completely impossible to grasp the causal relationships between them using the above-described processing. Furthermore, memory is volatile, and once the power is turned off, the situation at the time of the error occurrence cannot be known at all.

[Means for Solving the Problems] The present invention has been made for the purpose of solving the above-mentioned problems, and as a means for achieving this purpose, the present embodiment has the following configuration.

That is, a non-volatile memory, a writing means for writing the operating state of the system at the time of detection of the abnormality into the non-volatile memory when the system detects an operational abnormality, a notifying means for notifying the detection of the abnormality, and following the notifying means, and a stop means for stopping the process being executed.

[Operation] In the above configuration, when the system detects an operational abnormality, the operating state of the system at the time of the abnormality detection is written to the non-volatile memory, so the situation at the time of the abnormality can be accurately grasped,
can be recognized. Therefore, appropriate error handling can be performed.

[Example] Hereinafter, an example according to the present invention will be described in detail with reference to the drawings.

[First Embodiment] FIG. 1 is a block diagram of an embodiment according to the present invention, and the same components as in FIG. 9 are denoted by the same numbers, and the description thereof will be omitted.

This embodiment has a configuration in which a non-volatile memory 11 is added compared to the conventional device shown in FIG. A power source may be added.

Furthermore, other external storage devices such as flexible magnetic disk devices and hard disk devices may also be used. By using such an external storage device, it is possible to store an error situation, which will be described later, in the medium, read it in another information processing device, and perform error analysis, thereby taking more appropriate measures.

Further, the operation section 7 is provided with a mode key 7a for switching the operating mode of the apparatus between a maintenance (serviceman) mode and a normal mode.

Next, the operation of this embodiment having the configuration shown in FIG. 1 will be explained in FIGS.
This will be explained below with reference to the flowchart shown in FIG.

Hereinafter, a case where image processing and motor control similar to those shown in FIG. 10 described above are performed will be described as an example. FIG. 2 shows a sequence diagram of each state similar to FIG. 10 in this embodiment.

Here, each operation state in the operation sequence is as shown in the figure.
Indicated by l to F5.

In addition, each component is assigned a device number, and the operating lamp has the device number “Movement, 1”, the motor 8 has the device number “Yang, 2”, and the image processing unit 9 has the device number “Movement, 3”. assigned to each.

First, when the device (the system of this embodiment shown in FIG. 1) is powered on, the process shown in FIG. 3 is executed.

First, in step S50, the setting state of the mode key 7a is read and it is determined whether the mode is maintenance (serviceman) mode. If it is not the maintenance (serviceman) mode, the process advances to step S51, and the normal operation shown in FIG. 3, which is substantially the same as FIG. 10, is executed.

On the other hand, in the maintenance (serviceman) mode, the process proceeds to step S52, and an error flag is set in the process described below before the power is turned on or reset. The operating status and operating device number at the time of the error occurrence are displayed on the display unit 10, and the processing is stopped.

Next, the normal processing in step S51 will be explained with reference to FIGS. 4 and 5.

Note that in FIGS. 4 and 5, the same steps as those in FIGS. 10 and 11 are given the same step numbers, and their explanations will be omitted.

After executing steps 51 to S3 in the same manner as in FIG. 10, in the subsequent step S3a, the operating device number "Movement, 1" at this time (FIG. 5 Fl) is written in a predetermined position in the memory 3. Then, the processes of steps S4 to S6 are executed, and the fifth
The operating state is shown in Figure F2. In the following step 36a, the operating device numbers at this time are "Tooth, 1", 'Movement, 2', ''.
Write tooth, 3″ into a predetermined position in memory 3.

Thereafter, in the same manner, in the processing of steps 57 to S9, F3 in FIG.
In step 39a, the operating device numbers "No. 1" and "No. 3" at this time are written to predetermined positions in the memory 3, and the processing in steps S10 to S12 returns to the state of F4 in FIG. shall be. and step 512a
At a predetermined location in the memory 3, the number of the operating device at this time is "Movement, 1".

Write “No, 2”, “Move, 3”. Furthermore, steps S13 to S15 are executed, and the operating device number "Moving, 1" at that time is set in the memory 3 as the state shown in FIG. 5, F5.
The processes of steps 516 to S18 are executed. Then, through this process, all devices are brought to a halt state, the operating device number stored in a predetermined position in the memory 3 is cleared, and the process returns to step S1 again.

FIG. 5 shows details of the communication processing subroutine in the above normal processing. The process is almost the same as that in FIG. 11 described above, but when a time-over is detected in step S33, the processes from step 340 onwards are executed. That is, first, in step S40, the content of the error at the time of this time-over occurrence is checked, and the error is written into the error content storage area of the non-volatile memory card 1.Then, in the subsequent step S41, the operating device number at this time is stored in the memory 3. It is read from a predetermined location and written to the error device number storage area of the nonvolatile memory 11 as well. Then, an error flag in the error flag storage area in the nonvolatile memory 11 is set, an error is displayed in step S35, and the process is stopped.

As explained above, according to this embodiment, even if an error occurs only when a specific device is in operation, the operating device at the time of the error is stored in the nonvolatile memory, and appropriate processing can be performed. It becomes possible. For example, according to this embodiment, if a communication error occurs only when the motor 8 is operating, it is easy to assume that the cause is noise in the motor 8, which is very convenient.

[Second Embodiment] In the above explanation, each component device is given a unique number, and the device number actually in operation in the system is stored in the memory 3.
Although an example has been described in which the operating device number is stored in the memory 3 and stored in the nonvolatile memory 11 when an error occurs, the present invention is not limited to this.
Any method is sufficient as long as it can accurately recognize the operating status of the system at the time of error occurrence.

Hereinafter, the operating device number in the first embodiment is changed, the operating mode (the phase number at that time) is stored in the memory 3, and when an error occurs, this operating status is read out from the non-volatile memory 11.
An example of storing the data in a file will be explained with reference to FIGS. 6 to 8. In FIGS. 6 to 8, the same steps as those in FIGS. 3 to 5 are given the same step numbers, and the explanation thereof will be omitted.

First, in FIG. 6, in step S53 of FIG. 3, the display unit 10 displays the error details as well as the device number that was operating, but in this example, the phase number at that time is displayed instead of the device number. . Note that this phase number corresponds to F1 to F5 shown in FIG.

The reason why the phase number is displayed instead of the operating device number is because the devices that are operating in each phase F1 to F5 are uniquely determined.

In the normal processing shown in FIG. 7, the device numbers in operation in FIG. 4 are written in predetermined locations in the memory 3, respectively, and the phase numbers at that time are written in predetermined locations in the memory 3. .

That is, instead of storing "movement, 1" in step S3a of FIG. 4, "Fl" is stored in step S3b of FIG. 7, and "tooth, 1" is stored in step S36a of FIG.

In step S6b of Fig. 7, "F2" is changed to the storage of "positive, 2", "no, 3", and is changed to the storage of 'no, 1', "shift, 2" in step S9a of Fig. 4. Step S
F3'' at step 9b, 'No' at step 512a in FIG.
1”, “No, 2”, “No, 3”
"F4" in step 512b of FIG. 7, and "F5" in step S19 of FIG. 4 instead of storing "No, 1" in step 515a of FIG.
In step S20 of FIG. 7, the operating device number storage location is cleared, and in step S20 of FIG. 7, the phase number storage location is cleared.

Note that there is no need to separate the storage locations for both states in the memory 3, and the same area may be allocated.

In this embodiment, the phase number currently being executed is always stored in the memory 3 through the above processing.

By storing the phase numbers in this way, for example, in the process shown in FIG.
"No. 2" and "No. 3" are stored, but by storing the phase numbers using the process shown in FIG. 7, it is possible to easily determine whether the motor 8 is rotating in the forward direction or in the reverse direction. can.

Furthermore, in FIG. 8, while the device number is read from the device number storage area in the memory 3 and written into the nonvolatile memory 11 in step S41 in FIG. The current operating phase number is read from the storage area and written into the nonvolatile memory 11.

In the first and second embodiments described above, an example was explained in which the operating status is stored in the nonvolatile memory 11 only when an abnormality is detected during data communication when an error occurs. The data stored in the memory 3 (error state) can be written to the nonvolatile memory 11 even in the event of a power failure or a power cut during processing. By controlling in this manner, appropriate processing can be performed no matter what kind of error occurs.

As described above, in this embodiment, since the operating status at the time of error occurrence is stored in the nonvolatile memory 11, when the system hangs up due to the occurrence of an error, etc.
Even if the power is turned off or a reset key or the like on the operation unit 7 is pressed manually, the error occurrence state can be read out and analyzed later.

[Effects of the Invention] As explained above, according to the present invention, since the operating state of the system at the time of abnormality detection is written in the nonvolatile memory,
An error occurrence state can be easily recognized when analyzing an abnormal state.

Therefore, even if an abnormal condition occurs only when special conditions overlap, this condition can be grasped.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an embodiment according to the present invention, FIG. 2 is a diagram showing an example of an operation sequence of this embodiment, FIGS. 3 to 5 are operation flowcharts of this embodiment, and FIGS. FIG. 8 is an operational flowchart of another embodiment of the present invention, FIG. 9 is a block diagram of a conventional device, and FIGS. 10 and 11 are operational flowcharts of a conventional device. In the figure, 1... CPU, 2... ROM, 3... Memory, 4... Timer, 5... Data communication interface, 6... I10 board, 7... Operation unit, 7a・・・
・Mode key, 8...Motor, 9...Image processing section,
10...Display section, 11...Nonvolatile memory, 15.
...A data communication medium.

Claims (12)

[Claims] (1) An abnormality handling method in an information processing system that includes nonvolatile memory in addition to volatile memory, wherein when the system detects an operational abnormality, the operating state of the system at the time of the abnormality detection is written to the nonvolatile memory. An abnormality handling method comprising: a write process, a notification process for notifying abnormality detection, and, following the notification process, a stop process for stopping the process being executed. (2) The abnormality processing method according to claim 1, wherein the writing process detects the operating state of each component device of the system at the time of abnormality detection and writes it into a nonvolatile memory. (3) The abnormality processing method according to claim 1, wherein the writing process writes the number of the device in operation in the system at the time of abnormality detection. (4) The abnormality according to any one of claims 1 to 3, wherein the notification process displays an error on a display device of the system, and the stop process places the system processor in a halt state. Processing method. (5) Any one of claims 1 to 4, characterized in that abnormality detection is performed when data communication is being performed with another device via a data communication medium. The abnormality handling method described in . (6) The operating state is stored in advance in a storage means each time the state changes, and is read out and written into a non-volatile memory in a write process.
The abnormality handling method described in any of the paragraphs. (7) An abnormality processing device in an information processing system that includes a nonvolatile memory in addition to a volatile memory, which writes the operating state of the system at the time of detection of the abnormality to the nonvolatile memory when the system detects an operational abnormality. 1. An abnormality processing apparatus, comprising: a notification means for notifying abnormality detection; and a stopping means following the notification means for stopping a process being executed. (8) The abnormality processing device according to claim 7, wherein the writing means detects the operating state of each component device of the system at the time of abnormality detection and writes it into the nonvolatile memory. (9) The abnormality processing device according to claim 7, wherein the writing means writes the number of the device in operation in the system at the time of detecting the abnormality. (10) The abnormality according to any one of claims 7 to 9, wherein the notifying means displays an error on a display device of the system, and the stopping means puts the processor of the system in a halt state. Processing equipment. (11) The abnormality detection according to any one of claims 7 to 10, characterized in that the abnormality detection is performed when data communication is being performed with another device via a data communication medium. Abnormality processing device. (12) The operating state is stored in advance in a storage means each time the state changes, and is read out and written into a non-volatile memory in a write process. The abnormality processing device according to any one of.