JPS63237434A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To shorten a heat-treatment duration to form a connecting region without changing a thickness of a semiconductor layer by a method wherein, after the semiconductor layer in a part to become the connecting region is removed partially from its surface, the connecting region is formed. CONSTITUTION:Impurities are implanted into a semiconductor substrate 1 com posed of, e.g., silicon and are diffused so that a buried layer 3 is formed; after that, a semiconductor layer 2 is formed on the semiconductor substrate 1 by epitaxial growth in such a way that is covers the buried layer 3. Then, e.g., a nitride film 4 is formed on the semiconductor layer 2; this film is patterned by a photolithographic method or the like; an opening 5 is made in a desired position which corresponds to the buried layer 3. The semiconductor layer 2 is removed partially from the opening 5 by etching by making use of the patterned nitride film 4 as a mask; an etching part 6 is formed. In succession, a connecting region 7 whose conductivity type is the same as that of the buried layer 3 is formed via the opening 5 and the etching part 6 by making use of the nitride film 4 as the mask by a diffusion method or an ion implantation method and a thermal diffusion method or the like of the impurities; lastly, the nitride film 4 is removed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method of manufacturing a semiconductor device, and more particularly to a method of manufacturing a semiconductor device having a buried layer such as a bipolar element.

[Prior Art] FIGS. 2A to 2D are schematic manufacturing process diagrams of a conventional semiconductor device having a buried layer.

The manufacturing method will be described below with reference to the drawings.

For example, a buried layer 3 is formed by implanting and diffusing impurities into a semiconductor substrate 1 made of silicon, and then the semiconductor layer 2 is formed by epitaxial growth on the semiconductor substrate 1 so as to cover the buried layer 3. (see figure).

Next, by forming, for example, a nitride film 4 on the semiconductor layer 2 and patterning it, an opening 5 is provided at a desired position corresponding to the buried layer 3 (see FIG. 2B).

Next, a second connection region 7 having the same conductivity type as the buried layer 3 is formed by impurity diffusion, ion implantation, thermal diffusion, etc. through the opening 5 using the nitride 14 as a mask.
(see Figure C), and is finally completed by removing the nitride 114 (see Figure 2D) [Problems to be Solved by the Invention] In the conventional semiconductor device as described above, the nitride 114 is set based on the functionality of the device. Since the depth of the connection region is determined according to the thickness of the semiconductor layer 2, it is necessary to perform heat treatment until the connection region in which impurities are diffused reaches the buried layer 3 from the surface of the semiconductor layer 2.

Therefore, depending on the thickness of the epitaxial layer, that is, the semiconductor layer 2, the heat treatment time may take longer.
Other impurity diffusion regions of the device expand too much, resulting in problems such as deterioration of device characteristics and reduction of thermal limits.

The present invention has been made to solve these problems, and it is an object of the present invention to provide a manufacturing method that can shorten the total heat treatment time for forming a connection region without changing the thickness of the semiconductor layer.

[Means for Solving the Problems] In the method for manufacturing a semiconductor device according to the present invention, a portion of the semiconductor layer that is to become a connection region is partially removed from its surface, and then a connection region is formed. .

[Operation] In the present invention, the portion of the semiconductor layer that should become the connection region is partially etched away, so that the depth of the connection region becomes shallow, so that the heat treatment time for forming the region can be shortened.

[Example] Figures 1A to 1E are schematic manufacturing process diagrams showing an example of the present invention.

Hereinafter, the manufacturing method of the present invention will be explained with reference to the drawings.

For example, a buried layer 3 is formed by injecting and diffusing neo4 into a semiconductor substrate 1 made of silicon, and then a semiconductor layer 2 is formed by epitaxially growing on the semiconductor substrate 1 so as to cover the buried layer 3 ( (See Figure 1A).

Next, for example, a nitride film 4 is formed on the semiconductor layer 2, and this is turned by photolithography or the like.
The manufacturing method is the same as the conventional manufacturing method until the openings 5 are provided at precise positions corresponding to the buried layer 3 (see FIG. 1B).

Using the patterned nitride film 4 as a mask, a portion of the semiconductor layer 2 is etched away from the opening 5 to form an etched portion 6.
(see Figure 1c).

Next, using the nitride 1114 as a mask, the opening 5 and
Then, a connection region 7 of the same conductivity type as the buried portion 1i13 is formed by diffusing impurities through the etching portion 6, ion implantation method, thermal diffusion method, etc. (see FIG. 1D), and finally, the nitride film 4 is removed 4. (See Figure 1E).

In the above embodiment, the semiconductor layer is formed by epitaxial growth, but it goes without saying that the present invention can also be applied to a buried layer formed inside the semiconductor substrate itself, and the same effect can be achieved.

[Effects of the Invention] As explained above, this invention allows the depth of the connection region to be made shallow regardless of the thickness of the semiconductor layer, thereby shortening the heat treatment time and keeping the time constant, thereby achieving the II characteristic. This has the effect of increasing the thermal limit.

[Brief explanation of the drawing]

1A to 1E are schematic manufacturing process diagrams showing an embodiment of the present invention, and FIGS. 2A to 2D are schematic manufacturing process diagrams of a conventional semiconductor device. In the figure, 1 is a semiconductor substrate, 2 is a semiconductor layer, 3 is a buried layer, 6 is an etched portion, and 7 is a connection region. Note that the same reference numerals in each figure indicate the same or corresponding parts. Agent Masuo OiwazIA reinstatement! B times 5, MEIC figure 8ho figure 6, engineering/Iken 7 sp 7 Haishu@Kaiko IE times z2 8 hess 2B figure 5,

Claims (4)

[Claims] (1) A step of forming a buried layer on a semiconductor substrate, a step of forming a semiconductor layer on the semiconductor substrate including on the buried layer, and a step of forming a semiconductor layer on the semiconductor substrate at a desired position corresponding to the buried layer. a step of removing a portion of the layer; and a step of forming a semiconductor region of the same conductivity type as the buried layer in a region of the semiconductor device from the partially removed portion to the buried layer. Also, a method for manufacturing a semiconductor device. (2) The method for manufacturing a semiconductor device according to claim 1, wherein the semiconductor layer is removed by an etching method. (3) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the semiconductor region is formed by an ion implantation method and a thermal diffusion method. (4) The method for manufacturing a semiconductor device according to claim 1 or 2, wherein the semiconductor region is formed by a diffusion method.