JPS63236136A - Input filter - Google Patents

Input filter

Info

Publication number
JPS63236136A
JPS63236136A JP62069796A JP6979687A JPS63236136A JP S63236136 A JPS63236136 A JP S63236136A JP 62069796 A JP62069796 A JP 62069796A JP 6979687 A JP6979687 A JP 6979687A JP S63236136 A JPS63236136 A JP S63236136A
Authority
JP
Japan
Prior art keywords
time
timer
input
change
coincident
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62069796A
Other languages
Japanese (ja)
Other versions
JPH0621990B2 (en
Inventor
Hiroyuki Konishi
博之 小西
Takeshi Yasuda
武史 安田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Denso Ten Ltd
Original Assignee
Denso Ten Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Denso Ten Ltd filed Critical Denso Ten Ltd
Priority to JP62069796A priority Critical patent/JPH0621990B2/en
Publication of JPS63236136A publication Critical patent/JPS63236136A/en
Publication of JPH0621990B2 publication Critical patent/JPH0621990B2/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To open the filtering time of an input filter consisting of the software to other processes by using an edge interruption routine and a timer coincident interruption routine together. CONSTITUTION:A coincident timer is started by the edge interruption of an input signal to cancel the input change if the signal level has a change within a fixed time and to prescribe the filtering time if the signal level has no change respectively. An edge interruption routine ends after setting a time-out point of said coincident timer. While a timer coincident interruption routine is started when the time-out point of the coincident timer elapses to cancel the input change if the signal level has a change and to perform an input accepting process for the end if the signal level has no change. Thus the filtering time can be utilized for other processes. In other words, a processor is kept free from the filter processing until the timer coincident interruption routine which prescribes the filtering time via the edge interruption routine is started. Thus the processor can perform other processes like a control process, etc.

Description

【発明の詳細な説明】 〔概 要〕 エツジ割込ルーチンとタイマ一致割込ルーチンを併用す
ることで、ソフトウェアによる入力フィルタのフィルタ
時間を他の処理に解放する。
[Detailed Description of the Invention] [Summary] By using the edge interrupt routine and the timer match interrupt routine together, the filtering time of the input filter by software is released for other processing.

〔産業上の利用分野〕[Industrial application field]

本発明は入力信号からノイズやチャタリングをソフト的
に除去する入力フィルタに関する。
The present invention relates to an input filter that removes noise and chattering from an input signal using software.

〔従来の技術〕[Conventional technology]

車速に応じてパルス幅が変化する車速センサ信号は機械
的な振動や点火パルス等による影響を受は易い。このた
め、この種の信号を処理する前にフィルタを通すのが一
般的である。
A vehicle speed sensor signal whose pulse width changes depending on the vehicle speed is easily affected by mechanical vibrations, ignition pulses, and the like. For this reason, it is common practice to pass this type of signal through a filter before processing it.

第2図はか\る入力フィルタをソフトウェアで構成した
従来例である。この入力フィルタは車速センサ信号のエ
ツジ割込ルーチンとして構成されている。処理■はエツ
ジ割込でレジスタに取込まれた信号レベルとその後の信
号レベルを比較し、両者が同じであるときはノイズやチ
ャタリング無(N)と判断し、また異なるときはこれら
が有(Y)と判断する。有(Y)と判断されると処理◎
で入力変化がキャンセルされる(レジスタの内容がクリ
アされる)。例えば、第3図のような入力の場合、最初
のエツジE1で割込がかかると、エツジE2が現われる
までは同じ信号レベルを保つので処理■はNへ分岐する
。しかし、エツジE2が現われると処理■はYへ分岐し
て一旦終了し、次のエツジE3で再度割込みがかかる。
FIG. 2 shows a conventional example in which an input filter is configured by software. This input filter is configured as an edge interrupt routine for the vehicle speed sensor signal. Processing ■ compares the signal level taken into the register by the edge interrupt with the subsequent signal level, and if the two are the same, it is determined that there is no noise or chattering (N), and if they are different, it is determined that these are present ( Y). If it is determined that there is (Y), it will be processed ◎
The input change is canceled (the contents of the register are cleared). For example, in the case of an input as shown in FIG. 3, when an interrupt is generated at the first edge E1, the same signal level is maintained until edge E2 appears, so the process branches to N. However, when edge E2 appears, process (2) branches to Y and is temporarily terminated, and an interrupt is generated again at the next edge E3.

このような処理を繰り返し、最後のエツジEnでv1込
みがかかると、そこから一定のフィルタ時間(例えばl
 m s )経過後に処理■はYへ分岐し、処理■でレ
ジスタの内容をメモリへ移す。
After repeating this process and adding v1 to the last edge En, a certain filter time (for example l
m s ), the process (2) branches to Y, and the contents of the register are transferred to the memory in the process (2).

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したフィルタ処理ではフィルタ時間を経過するまで
処理■■が繰り返されるため、この間色の処理をするこ
とができない。一般に車速センサ信号を扱うシステムで
は車速制御や変速制御等が主たる処理として位置づけら
れているので、入力フィルタ処理の占有時間が長いとこ
れら主制御に遅れが生ずる原因となる。また、このよう
な方法であると複数のセンサ入力を同時に処理すること
・ができない。
In the above-described filtering process, the process ``■■'' is repeated until the filter time elapses, so color processing cannot be performed during this time. Generally, in a system that handles vehicle speed sensor signals, vehicle speed control, shift control, etc. are positioned as the main processes, so if the time occupied by input filter processing is long, these main controls will be delayed. Furthermore, with this method, it is not possible to process multiple sensor inputs simultaneously.

本発明はエツジ割込とタイマ一致割込を併用することで
これらの問題点を解決しようとするものである。
The present invention attempts to solve these problems by using edge interrupts and timer match interrupts together.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は、入力信号のエツジ割込で起動され、一定時間
内に該信号のレベル変化があれば入力変化をキャンセル
し、なければフィルタ時間を規定する一致タイマのタイ
ムアウト時刻をセットして終了するエツジ割込ルーチン
と、該一致タイマのタイムアウト時刻が経過したとき起
動され、該信号のレベル変化があれば入力変化をキャン
セルし、なければ入力受付処理をして終了するタイマ一
致割込ルーチンとを備え、該フィルタ時間を他の処理に
利用できるようにしてなることを特徴とするものである
The present invention is activated by an edge interrupt of an input signal, and if there is a level change in the signal within a certain period of time, the input change is canceled, and if not, the timeout time of the coincidence timer that defines the filter time is set and the process ends. edge interrupt routine, and a timer match interrupt routine that is activated when the timeout time of the match timer has elapsed, cancels the input change if there is a level change in the signal, or otherwise performs input acceptance processing and ends. The filter time can be used for other processing.

〔作用〕[Effect]

本発明ではエツジ割込ルーチンでフィルタ時間を規定す
る一致タイマを始動させたら、その後タイマ一致割込ル
ーチンが起動されるまではプロセッサをこのフィルタ処
理から解放する。従って、プロセッサはこの間に制御等
の他の処理を実行できる。また、複数のセンサ入力を同
時に取込んでフィルタ処理することもできる。
In the present invention, once the edge interrupt routine starts a match timer that defines the filter time, the processor is released from filtering until the timer match interrupt routine is started. Therefore, the processor can perform other processing such as control during this time. It is also possible to simultaneously capture and filter multiple sensor inputs.

〔実施例〕〔Example〕

第1図は本発明の一実施例を示すフローチャートで、(
alはエツジ割込ルーチン、tb>はタイマ一致割込ル
ーチンを示している。両ルーチン共に処理■を有するが
、これは第2図と異なりエツジ割込後に1回だけ行われ
るレベル比較であり、一般に割込から数〜20μsl&
のレベル比較となる。ここでノイズやチャタリングが有
(Y)と判断されれば第2図と同様に処理◎で入力変化
がキャンセルされる。
FIG. 1 is a flowchart showing one embodiment of the present invention.
al indicates an edge interrupt routine, and tb> indicates a timer match interrupt routine. Both routines have a process (■), but unlike in Fig. 2, this is a level comparison that is performed only once after an edge interrupt, and generally several to 20 μsl &
This is a level comparison. If it is determined that there is noise or chattering (Y), the input change is canceled in the process ⊚ as in FIG. 2.

(a)のエツジ割込ルーチンではノイズやチャタリング
無(N)と判断したら処理■で一致タイマにフィルタ時
間を規定するタイムアウト時刻をセットして終了する。
In the edge interrupt routine of (a), if it is determined that there is no noise or chattering (N), a timeout time that defines the filter time is set in the coincidence timer in process (2), and the process ends.

この後プロセッサはこのフィルタ処理から解放される。The processor is then released from this filtering process.

やがてフィルタ時間が経過しタイマ一致割込がかかると
、プロセッサは(b)のルーチンを実行する。ここでも
ノイズやチャタリング無(N)と判断したら■の入力受
付処理を実行して終了する。
When the filter time has elapsed and a timer match interrupt occurs, the processor executes the routine (b). Here too, if it is determined that there is no noise or chattering (N), the input reception process (2) is executed and the process ends.

このようにエツジ割込ルーチンとタイマ一致割込ルーチ
ンを併用すると、第2図のように処理■■を繰り返すル
ープが不要になるので、プロセッサは第1図[a)のル
ーチン終了後に他の処理に移ることができる。また、複
数のセンサ入力処理を行う場合、それぞれの割込処理時
間は短いので、互いに影響を与えることなく同様のフィ
ルタ処理を行うことができる。さらに、第3図の例では
最後のエツジEnより早い時点で、例えばエツジE+と
E2の間が処理■の判定時間(例えば20μs)より長
ければ最初のエツジE1の段階からフィルタ時間を設定
できる。
When the edge interrupt routine and the timer match interrupt routine are used together in this way, the loop that repeats the process shown in Figure 2 becomes unnecessary, so the processor can perform other processing after completing the routine in Figure 1 [a]. can move to. Furthermore, when performing multiple sensor input processes, each interrupt process time is short, so similar filtering processes can be performed without affecting each other. Furthermore, in the example of FIG. 3, the filter time can be set earlier than the last edge En, for example, if the time between edges E+ and E2 is longer than the determination time (for example, 20 μs) in process (2), the filter time can be set from the stage of the first edge E1.

〔発明の効果〕〔Effect of the invention〕

以上述べたように本発明によれば、入力信号からノイズ
やチャタリングを除去する入力フィルタをソフトウェア
で構成する場合、フィルタ時間にレベルチェックをしな
いので、その間プロセッサは他の処理を行うことができ
る。このため同じプロセッサによる他の制御遅れ等の問
題がなく、また複数のセンサ入力を同時に取込んでフィ
ルタ処理することができる。
As described above, according to the present invention, when an input filter for removing noise and chattering from an input signal is configured by software, a level check is not performed during the filter time, so the processor can perform other processing during that time. Therefore, there are no problems such as other control delays caused by the same processor, and multiple sensor inputs can be taken in and filtered at the same time.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の一実施例を示すフローチャート、 第2図は従来の車速入力フィルタのフローチャート、 第3図は車速センサ信号の波形図である。 出 願 人  富士通テン株式会社 代理人弁理士  青  柳   稔 (α)工・、ン削込                
  (b)タイマ一致記込if図 TS2図
FIG. 1 is a flowchart showing an embodiment of the present invention, FIG. 2 is a flowchart of a conventional vehicle speed input filter, and FIG. 3 is a waveform diagram of a vehicle speed sensor signal. Applicant Fujitsu Ten Ltd. Representative Patent Attorney Minoru Aoyagi (α) Eng.
(b) Timer match writing if diagram TS2 diagram

Claims (1)

【特許請求の範囲】[Claims] 入力信号のエッジ割込で起動され、一定時間内に該信号
のレベル変化があれば入力変化をキャンセルし、なけれ
ばフィルタ時間を規定する一致タイマのタイムアウト時
刻をセットして終了するエッジ割込ルーチンと、該一致
タイマのタイムアウト時刻が経過したとき起動され、該
信号のレベル変化があれば入力変化をキャンセルし、な
ければ入力受付処理をして終了するタイマ一致割込ルー
チンとを備え、該フィルタ時間を他の処理に利用できる
ようにしてなることを特徴とする入力フィルタ。
An edge interrupt routine that is started by an edge interrupt of an input signal, and if there is a level change in the signal within a certain period of time, cancels the input change, otherwise sets the timeout time of the match timer that defines the filter time and ends. and a timer match interrupt routine that is activated when the timeout time of the match timer has elapsed, and cancels the input change if there is a level change of the signal, otherwise performs input acceptance processing and ends, and the filter An input filter characterized in that time is made available for other processing.
JP62069796A 1987-03-24 1987-03-24 Input filter Expired - Fee Related JPH0621990B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62069796A JPH0621990B2 (en) 1987-03-24 1987-03-24 Input filter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62069796A JPH0621990B2 (en) 1987-03-24 1987-03-24 Input filter

Publications (2)

Publication Number Publication Date
JPS63236136A true JPS63236136A (en) 1988-10-03
JPH0621990B2 JPH0621990B2 (en) 1994-03-23

Family

ID=13413063

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62069796A Expired - Fee Related JPH0621990B2 (en) 1987-03-24 1987-03-24 Input filter

Country Status (1)

Country Link
JP (1) JPH0621990B2 (en)

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164846A (en) * 1974-12-03 1976-06-04 Fujitsu Ltd
JPS5486244A (en) * 1977-12-21 1979-07-09 Nec Corp Information processor
JPS55162155A (en) * 1979-06-05 1980-12-17 Matsushita Electric Ind Co Ltd Interrupting circuit of microcomputer
JPS5920029A (en) * 1982-07-27 1984-02-01 Fuji Xerox Co Ltd Taking-in device of sensor signal

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5164846A (en) * 1974-12-03 1976-06-04 Fujitsu Ltd
JPS5486244A (en) * 1977-12-21 1979-07-09 Nec Corp Information processor
JPS55162155A (en) * 1979-06-05 1980-12-17 Matsushita Electric Ind Co Ltd Interrupting circuit of microcomputer
JPS5920029A (en) * 1982-07-27 1984-02-01 Fuji Xerox Co Ltd Taking-in device of sensor signal

Also Published As

Publication number Publication date
JPH0621990B2 (en) 1994-03-23

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