JPS63234346A - Multi-processor device - Google Patents

Abstract

PURPOSE:To improve the data processing efficiency by using a shared memory as well as a processor controller which controls plural exclusive processors of different types that can process a specific data structure with high efficiency. CONSTITUTION:When a binary tree processor 11 carries out an instruction of a shared memory 15, the processor 11 obtains an argument from another exclusive processor and therefore gives a processing request to a processor controller 14. The controller 14 gives the start commands to a frame processor 12 and a rule processor 13 and sends a processing end instruction to the processor 11 as soon as the evaluation is through with arguments of both processors 12 and 13. Thus the processor 11 produces a binary tree node and ends its processing. In such a way, the exclusive processors 11-13 give the processing requests to the controller 14 except those data treated by those processors themselves. As a result, the data processing efficiency is improved even when the data on a new structure is processed.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a multiprocessor device that combines a plurality of different types of dedicated processors to improve processing efficiency.

2. Description of the Related Art Recently, multiprocessor devices have been widely used in system equipment using microcomputers. Conventionally, this multiprocessor has a configuration including a general-purpose processor as a main device and a dedicated processor as a subordinate device.

The conventional 0 multiprocessor device will be explained below with reference to FIG. In FIG. 3, 31 is a general-purpose processor;
32 is a dedicated processor controlled by the general-purpose processor 31. The operation of the above configuration will be explained below. A general-purpose processor 31 interprets and executes the instructions. When an instruction for data with a specific structure exists in the instruction, the general-purpose processor 31 transfers the instruction to the dedicated processor 32.
It transfers argument data to the dedicated processor 32, instructs the dedicated processor 32 to start processing, and receives an instruction from the dedicated processor 32 to end the processing. The dedicated processor a2 receives an instruction to start processing from the general-purpose processor 31, executes a predetermined instruction, and then instructs the general-purpose processor 31 to end the process. Dedicated processor 32
Upon receiving the termination instruction from , the general-purpose processor 31 resumes interpreting and executing instructions.

Problems to be Solved by the Invention However, in the configuration described above, the data that can be processed by the dedicated processor is only data with a simple structure such as floating point numbers, and the relationship between each processor is also that of the main unit and subordinate units. Since it was a fixed device, adding a dedicated processor to process data with a new structure required changing the general-purpose processor, which required a large amount of cost and a long period of time.

The present invention solves the above-mentioned problems, and aims to provide a multiprocessor device that can process a large amount of data of different types with a simple configuration without changing the configuration of a general-purpose processor. The purpose is to

Means for Solving the Problems The present invention uses a plurality of heterogeneous dedicated processors that efficiently process data having a specific structure, a processor control device that controls all the dedicated processors, and a shared memory shared among the dedicated processors. This aims to achieve the above objectives.

With the above-described configuration, the present invention improves overall processing efficiency by having dedicated processors that can efficiently process data with various structures, and also makes it easy to use dedicated processors for data with new structures. can be added.

Embodiments Hereinafter, embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a multiprocessor in an embodiment of the present invention. In FIG. 1, 11 is a dedicated processor that efficiently processes the data 21 in the binary book structure shown in FIG. 2, 12 is a dedicated processor that efficiently processes the data 22 in the frame structure shown in FIG. 2, a dedicated processor that efficiently processes the data 23 having the rule structure shown in FIG. 2; 14, a processor control device that controls the dedicated processors 11, 12, 13;
This is a shared memory shared by 13.

The operation of the above configuration will be explained below.

Taking as an example the process of creating a binary tree node from the value of slot 1 of frame A in the frame structure data 22 and the left side of the rule date in the rule structure data 23 shown in FIG. tries to execute an instruction on the shared memory 15, but the instruction is an instruction to generate one binary tree node from two arguments, slot and left side, and in order to obtain the two arguments, binary tree processing is performed. The processor 11 outputs a processing request to the processor control device 14 and waits for an instruction to end the processing. Processor control device 1
4 issues a processing start instruction to the corresponding frame processing processor 12 to obtain the first argument, and also issues a start instruction to the corresponding node processing processor 13 to obtain the second argument. The frame processing processor 12 and the rule processing processor 1a, which have received the start instruction, send an end instruction to the processor control device 14 as soon as they complete the predetermined processing. As soon as the processor controller 14 finishes evaluating the two arguments,
A processing end instruction is sent to the binary book processing processor 11. Upon receiving the termination instruction from the processor control device 14, the binary book processor 11 generates a binary tree node from the two arguments and terminates the process.

As is clear from the above description, according to this embodiment, each dedicated processor It, 12.13 requests the processor control unit 14 to process data structures other than those handled by itself, so that data with a new structure is There is no need to make any changes to the new structure; just add a dedicated processor to efficiently process data with the new structure.

Effects of the Invention As described above, the present invention enables efficient data processing by combining a plurality of different types of dedicated processors that can efficiently process specific data structures with a processor control device, and is also capable of processing data with a new structure. If you want to do so, you can add one without changing the processor, which is very effective.

[Brief explanation of the drawing]

The first figure is a block diagram of a multi-processor device according to an embodiment of the present invention, FIG. 2 is a data structure diagram according to an embodiment of the present invention, and FIG. 3 is a block diagram of a conventional multi-processor device. 11... Processor dedicated to binary book processing, 12...
...Frame processing dedicated processor, 13...
- Rule processing processor, 14... Processor control device, 15... Shared memory. Name of agent: Patent attorney Toshio Nakao and 1 other person No. 1
figure

Claims (1)

[Claims] (1) A plurality of types of dedicated processors that efficiently process data having a specific structure, a processor control device that controls the plurality of types of dedicated processors, and a shared memory shared by the plurality of types of dedicated processors. A multiprocessor device characterized by: