JPS6323344A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS6323344A JPS6323344A JP16857786A JP16857786A JPS6323344A JP S6323344 A JPS6323344 A JP S6323344A JP 16857786 A JP16857786 A JP 16857786A JP 16857786 A JP16857786 A JP 16857786A JP S6323344 A JPS6323344 A JP S6323344A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- circuit board
- unnecessary
- electrode terminal
- hoop
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims description 12
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000000034 method Methods 0.000 claims abstract description 18
- 230000013011 mating Effects 0.000 claims 1
- 238000005476 soldering Methods 0.000 abstract description 4
- 238000009413 insulation Methods 0.000 description 6
- 238000007796 conventional method Methods 0.000 description 3
- 229910000679 solder Inorganic materials 0.000 description 3
- 239000000758 substrate Substances 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/117—Pads along the edge of rigid circuit boards, e.g. for pluggable connectors
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
- H05K3/3405—Edge mounted components, e.g. terminals
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
〈産業上の利用分野〉
本発明は半導体装置の製造方法に関し、特に基板の電両
側子部と外部リードの半田付けに関する。DETAILED DESCRIPTION OF THE INVENTION <Industrial Application Field> The present invention relates to a method for manufacturing a semiconductor device, and particularly to soldering between an electrode terminal portion of a substrate and an external lead.
〈発明の概要〉
本発明は、絶縁回路基板の複数の電極端子部にクープ状
クリップリードを半田付する半導体装置の製造方法にお
いて、上記複数の電極端子部に半田付けされるクリップ
リードのうち、回路上不必要となるリード及び電％間絶
縁距離確保の為取付けできないリードを容易に取シ除ぐ
ことができるように、上記絶縁回路基板の外形は、該絶
縁回路基板の電極端子部のうち不要となるリードと対向
される部分を凹状に切欠いた形状にしてなり、この状態
で残−Ｉた電極端子部にクリップリードフレームを嵌合
させて半田付すれば、不必要なリードは前記絶縁回路基
板の凹状切欠き部に位置して上記絶縁回路基板に取付け
られず、リードカフ）時自然廃出するため、後の工程で
不必要リードを取シ除く工程が削減できるものである。<Summary of the Invention> The present invention provides a method for manufacturing a semiconductor device in which a coupe-shaped clip lead is soldered to a plurality of electrode terminal portions of an insulated circuit board. The outer shape of the insulated circuit board is designed so that it is possible to easily remove leads that are unnecessary on the circuit and leads that cannot be attached to ensure the insulation distance between the electrodes. The part facing the unnecessary lead is cut out in a concave shape, and in this state, if a clip lead frame is fitted to the remaining electrode terminal part and soldered, the unnecessary lead can be removed from the insulation. Since the lead cuff is located in the recessed notch of the circuit board and is not attached to the insulated circuit board and is naturally disposed of when the lead cuff is removed, the process of removing unnecessary leads in a later process can be reduced.
〈従来の技術〉
第４図（ａ） （ｂ）に従来の半導体装置の外部リード
取付は部の様子を示す。<Prior Art> FIGS. 4(a) and 4(b) show how external leads are attached to a conventional semiconductor device.
第４図（ａ）のように、従来の方法では電子回路部品（
図示しない）を実装した絶縁回路基板１のより挾み込み
、両者１ａ、２ａを嵌合させて半田槽の中に電極端子部
１ａ、・・・をディッピングし、クリップリード２ａ、
・・・を電極端子部１ａ、・・・に半田３付けし、これ
ら半田３付したリード２ａ、・・を所定位置でリードカ
ットした後、不必要なり一ド２ｂ、・・・を専用治工具
又は手作業にて取り除いていた。As shown in Figure 4(a), in the conventional method, electronic circuit components (
(not shown) is mounted on the insulated circuit board 1, and both 1a and 2a are fitted together, the electrode terminal parts 1a, . . . are dipped in a solder bath, and the clip leads 2a,
Solder 3 to the electrode terminal parts 1a, . . . and cut the soldered leads 2a, . . . at predetermined positions. It was removed using tools or by hand.
なお、第４図（、ｂ）は同図（ａ）のＢ −Ｂ断面図で
あり、半田付後の不必要なり−ド２ｂ部の断面を、″・
〈発明が解決しようとする問題点〉
ところが上記従来の方法では、絶縁回路基板１の電極端
子部１ａ、・・・にクリップリード２ａ、・・・を挟み
込む際、回路上不必要となるリード及び電極間絶縁距離
確保の為取付けできないリード２ｂ。In addition, FIG. 4(,b) is a sectional view taken along line B-B in FIG. 〉 However, in the above conventional method, when clip leads 2a, . . . are sandwiched between the electrode terminal portions 1a, . . . of the insulated circuit board 1, the clip leads 2a, . Lead 2b.
・・・も第４図（ｂ）のごとく絶縁回路基板１全挾み込
んで取付けられるので、後にこれら不必要なりリップリ
ード２ｂ、・・・を取り除く工程が必要となり、これに
よって作業時間を費やしたフ、或いは絶縁回路基板１に
キズ、クラック等を発生する虞れがあった。. . are installed by completely inserting them into the insulated circuit board 1 as shown in Fig. 4(b), so a process to remove these unnecessary lip leads 2b, . There is a risk that scratches, cracks, etc. may occur on the insulation circuit board 1 or the insulation circuit board 1.
尚、不必要なリード２ｂ、・・・がＮ Ｃ（ＮｏｎＣｏ
ｎｅｃｔ ）端子として取付けたままモールドされるこ
ともあるが、リード端子間の絶縁耐圧を要する場合、そ
の絶縁距離を長く設計するためには、やはり不必要なリ
ード２ｂ、・・・は取り除か７にければならない。In addition, unnecessary leads 2b,... are NC (NonCo).
nect) is sometimes molded with it attached as a terminal, but if dielectric strength between lead terminals is required, in order to design the insulation distance to be long, unnecessary leads 2b, etc. should be removed. Must be.
本発明は上記の事情に鑑みてなされたものであって、そ
の目的は、絶縁回路基板の複数の電極端子部にフープ状
クリップリードを取付ける場合に、発生する不必要リー
ドを容易に取り除くことができる半導体装置の製造方法
を提供することである。The present invention has been made in view of the above circumstances, and its purpose is to easily remove unnecessary leads that are generated when hoop-shaped clip leads are attached to a plurality of electrode terminals of an insulated circuit board. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be manufactured by a semiconductor device.
〈問題点を解決するための手段〉
本発明は、電子回路部品を実装した絶縁回路基板の複数
の電％端子部に一定ピッチのフープ状グリップリ・−ド
フレームを半田付する半導体装置の製造方法において、
前記絶縁回路基板の電極端子部のうち不要となる部分す
なわち回路上不必要となるリード又は電極間絶縁距離が
必要なため取付けることができないリードと嵌合される
部分は、絶縁回路基板の外形加工時、予め凹状に切欠い
て形成しておき、この状態で基板１の電極端子部と前記
フープ状クリップリードフレームを対向させて配置し、
前記電極端子部に前記フープ状クリップリードフレーム
を挟んで嵌合する両者を半田付するとともて、該半田付
したクリップリードフレームを所定位置でリードカット
し、前記絶縁回路基板の凹状切欠き部に位置する不必要
なリードをフレームごと取り除くものである。<Means for Solving the Problems> The present invention provides a method for manufacturing a semiconductor device in which a hoop-shaped grip lead frame with a constant pitch is soldered to a plurality of electric terminals of an insulated circuit board on which electronic circuit components are mounted. In,
The unnecessary parts of the electrode terminals of the insulated circuit board, that is, the parts that are fitted with leads that are unnecessary for the circuit or the leads that cannot be attached because an insulation distance between electrodes is required, are processed to the external shape of the insulated circuit board. At this time, a concave notch is formed in advance, and in this state, the electrode terminal portion of the substrate 1 and the hoop-shaped clip lead frame are placed facing each other,
The hoop-shaped clip lead frame is then fitted onto the electrode terminal portion by soldering, and the leads of the soldered clip lead frame are cut at a predetermined position to fit into the concave notch of the insulated circuit board. This removes unnecessary leads from each frame.
〈作 用〉
上記のように本発明の方法によれば絶縁回路基板の外形
は、該基板の電極端子部のうち不必要なリードと嵌合さ
れる不要部分を予め凹状に切欠いて形成したことにより
、不必要なリードは凹状切欠き部に位置して絶縁回路基
板に取付けられず、電極端子部に半田付されたフープ状
クリップＩＪ −ドのリードカットすれば同時に不必要
なリードは自然売出されるため、次工程にて取９除く必
要はなくなる。<Function> As described above, according to the method of the present invention, the outer shape of the insulated circuit board is formed by preliminarily cutting out the unnecessary part of the electrode terminal part of the board to be fitted with an unnecessary lead. Therefore, unnecessary leads are located in the concave notch and cannot be attached to the insulated circuit board.If the leads of the hoop-shaped clip IJ-de soldered to the electrode terminal are cut, the unnecessary leads can be removed naturally. Therefore, there is no need to remove 9 in the next step.
〈実施例〉 以下、図面に従って本発明の実施例を詳細て説明する。<Example> Embodiments of the present invention will be described in detail below with reference to the drawings.
第１図（ａ） （ｂ）は本発明の方法によυ絶縁回路基
板に一定ピッチのフープ状クリップリードフレームを半
田付した様子を示す。FIGS. 1(a) and 1(b) show how a hoop-shaped clip lead frame with a constant pitch is soldered to a υ insulated circuit board by the method of the present invention.
第１図（ａ）に示す如く、本発明の特徴として、絶縁回
路基板１はその電極端子部１ａのうち不要となる部分、
すなわち回路上不必要なリード又は電極間絶縁距離確保
の為取付できないリードと嵌合される部分（第４図参照
）が予め凹状に切欠いて外形加工される。As shown in FIG. 1(a), as a feature of the present invention, the insulated circuit board 1 has an unnecessary portion of the electrode terminal portion 1a,
That is, a portion (see FIG. 4) that is fitted with a lead that is unnecessary for the circuit or a lead that cannot be attached to ensure an insulating distance between electrodes is preliminarily cut into a concave shape and shaped.
この絶縁回路基板１に電子回路部品（図示しない）を実
装した後、電甑端子側と相対向させてフ−プ状クリップ
リードフレーム３を配置し、各電極端子部１ａにクリッ
プリード２ａを挟み込み、嵌合する両者１ａ、２ａｅ半
田３付する。このとき不必要なリード２ｂは基板１の凹
状切欠部４に位置して浮いた状態で保持される。この後
、半田付したクリップリード２ａを所定位置（図中、点
線部）でリードカットすれば、不必要なり一ド２ｂはフ
レーム２ごと自然売出され、次工程にて取り除く必要は
なくなる。After mounting electronic circuit components (not shown) on this insulated circuit board 1, a hoop-shaped clip lead frame 3 is placed facing the electric oven terminal side, and a clip lead 2a is inserted between each electrode terminal portion 1a. , solder 3 to both 1a and 2ae that fit together. At this time, the unnecessary leads 2b are located in the concave cutouts 4 of the substrate 1 and held in a floating state. Thereafter, if the soldered clip leads 2a are cut at a predetermined position (dotted line in the figure), the unnecessary leads 2b are automatically sold out together with the frame 2, and there is no need to remove them in the next process.
次に、第２図及び第３図を用いて、本発明による他の実
施例を説明する。Next, another embodiment according to the present invention will be described using FIGS. 2 and 3.
この実施例では、第２図に示すような一定ピッチのフー
プ状クリップリードフレーム２を用い、凹状て切欠いて
外形加工された同一形状の絶縁回路基板１を前記クリッ
プリードフレーム２と同一ピッチで複数個連結して配置
している。In this embodiment, a hoop-shaped clip lead frame 2 with a constant pitch as shown in FIG. They are arranged in a connected manner.
絶縁回路基板１の各電極端子部１ａ、・・・に、相対向
する位置にあるクリップリード２ａを嵌め込み、嵌合さ
れた両者１ａ、２ａを半田付する。さらにこの半田付し
たクリップリード２ａを所定位置（第２図点線部）でリ
ードカットし、これとともに前記絶縁回路基板１の凹状
切欠き部４′に位置するクリンプリード２ｂ、・・がフ
レーム２ごと取り除かれる。Clip leads 2a located at opposite positions are fitted into each electrode terminal portion 1a, . . . of the insulated circuit board 1, and the fitted portions 1a, 2a are soldered. Further, the soldered clip lead 2a is cut at a predetermined position (dotted line in Figure 2), and together with this, the crimp lead 2b located in the recessed notch 4' of the insulated circuit board 1 is cut together with the frame 2. be removed.
なお、売出されたリード２ｂ、・・・はフープ状に連な
り、かつこのリード２ｂ、・・・の端子部は絶縁回路基
板１に接、読されない未使用状態であるため第３図のよ
うにこのクリップリード２ｂ、・・・を再利用して用い
ることも可能である。The sold leads 2b, . . . are connected in a hoop shape, and the terminal portions of the leads 2b, . It is also possible to reuse the clip leads 2b, . . . .
以上述べてきたように、本発明の方法によれば、絶縁回
路基板１の電極端子部１ａＫクリツプリードフレーム２
を半田付する場合に発生する不必要リード２ｂを、前記
絶縁回路基板１に設けた凹状切欠部４を利用して、リー
ドカット時自然売出させることが可能となシ、後の工程
で不必要リード２ｂを取シ除く工程が削減できる。As described above, according to the method of the present invention, the electrode terminal portion 1aK clip lead frame 2 of the insulated circuit board 1
By using the recessed notch 4 provided in the insulated circuit board 1, the unnecessary leads 2b that are generated when soldering can be made to come out naturally when cutting the leads. The process of removing the lead 2b can be reduced.
〈発明の効果〉
本発明は、電子回路部品を実装した絶縁回路基板の複数
の電極端子部に一定ピッチのフープ状フリップリードフ
レームを半田付する半導体装置の製造方法において、発
生する不必要なりリップリードを取り除く工程をなくし
て、作業時間の短縮が図れるとともに、絶縁回路基板に
キズ、クラ・ンク等を発生する虞れも除去される。<Effects of the Invention> The present invention provides a method for manufacturing a semiconductor device in which a hoop-shaped flip lead frame with a constant pitch is soldered to a plurality of electrode terminals of an insulated circuit board on which electronic circuit components are mounted. By eliminating the step of removing the leads, the working time can be shortened, and the possibility of scratches, cracks, etc. occurring on the insulated circuit board is also eliminated.
第１図（ａ） （ｂ）は本発明の方法による一実施例の
半導体装置の上面図及びＡ−Ａ断面図、第２図及び第３
図は本発明の方法による他の実施例の工程図、第４図（
ａ） （ｂ）は従来の方法による半導体装置の上面図及
びＢ−Ｂ断面図である。
１：絶縁回路基板、 １ａ：電極端子部、 ２：フー
プ状クリップリードフレーム、 ２ａ：半田付するク
リップリード、２ｂ：不必要なりリップリード、 ４．
４’：凹状切欠部。
代理人 弁理士 杉 山 毅 至（他１名）（ａ、
（ｂ）
第 １ ｌ
第２ 図FIGS. 1(a) and 3(b) are a top view and an A-A sectional view of a semiconductor device according to an embodiment of the method of the present invention, and FIGS.
The figure is a process diagram of another example according to the method of the present invention, and Fig. 4 (
a) and (b) are a top view and a BB sectional view of a semiconductor device according to a conventional method. 1: Insulated circuit board, 1a: Electrode terminal portion, 2: Hoop-shaped clip lead frame, 2a: Clip lead to be soldered, 2b: Unnecessary lip lead, 4.
4': Concave notch. Agent Patent attorney Takeshi Sugiyama (and 1 other person) (a,
(b) 1st l Fig. 2
Claims (1)
端子部に一定ピッチのフープ状クリップリードフレーム
を半田付する半導体装置の製造方法において、 上記絶縁回路基板の外形は、該絶縁回路基板の電極端子
部のうち不要となる部分を凹状に切欠いた形状にしてな
り、 前記絶縁回路基板の電極端子部と上記一定ピッチのフー
プ状クリップリードフレームを対向させて配置し、前記
電極端子部に前記フープ状クリップリードフレームを挟
み込み、嵌合する両者を半田付するとともに、 前記半田付したフープ状クリップリードフレームを所定
位置でリードカットし、前記絶縁回路基板の凹状切欠き
部に位置するフープ状クリップリードをフレームごと取
り除いてなることを特徴とする半導体装置の製造方法。[Claims] 1. A method for manufacturing a semiconductor device in which a hoop-shaped clip lead frame with a constant pitch is soldered to a plurality of electrode terminals of an insulated circuit board on which electronic circuit components are mounted, wherein the outer shape of the insulated circuit board is , an unnecessary portion of the electrode terminal portion of the insulated circuit board is cut out in a concave shape, and the electrode terminal portion of the insulated circuit board and the hoop-shaped clip lead frame having a constant pitch are arranged to face each other, The hoop-shaped clip lead frame is sandwiched between the electrode terminal portions, and the mating parts are soldered, and the leads of the soldered hoop-shaped clip lead frame are cut at predetermined positions to form the concave cutout portion of the insulated circuit board. 1. A method of manufacturing a semiconductor device, characterized in that the hoop-shaped clip leads located at the frame are removed together with the frame.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16857786A JPS6323344A (en) | 1986-07-16 | 1986-07-16 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP16857786A JPS6323344A (en) | 1986-07-16 | 1986-07-16 | Manufacture of semiconductor device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS6323344A true JPS6323344A (en) | 1988-01-30 |
| JPH0365021B2 JPH0365021B2 (en) | 1991-10-09 |
Family
ID=15870628
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP16857786A Granted JPS6323344A (en) | 1986-07-16 | 1986-07-16 | Manufacture of semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6323344A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5023142A (en) * | 1973-06-27 | 1975-03-12 | ||
| JPS51129671A (en) * | 1975-05-06 | 1976-11-11 | Hitachi Ltd | Method of fixing terminals of hybrid ic |
-
1986
- 1986-07-16 JP JP16857786A patent/JPS6323344A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5023142A (en) * | 1973-06-27 | 1975-03-12 | ||
| JPS51129671A (en) * | 1975-05-06 | 1976-11-11 | Hitachi Ltd | Method of fixing terminals of hybrid ic |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0365021B2 (en) | 1991-10-09 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPH0555438A (en) | Lead terminal structure of electronic component | |
| JPH07131233A (en) | Microstrip antenna | |
| JPS6323344A (en) | Manufacture of semiconductor device | |
| JPH08273798A (en) | Manufacture of contact for smt(surface mount technology) connector | |
| JPH06349561A (en) | Method of soldering lead terminal to wiring board | |
| JPH0738246A (en) | Soldering method and molding solder used therein | |
| JPS6212101A (en) | Terminal hoop for resin sealed electronic component | |
| KR0120928Y1 (en) | Hybrid ic | |
| JPS6079750A (en) | Chip carrier | |
| JPH08116152A (en) | Circuit board structure | |
| JP3076950B2 (en) | Method for manufacturing lead frame for semiconductor device | |
| JP2531060B2 (en) | Method for manufacturing printed wiring board | |
| JPH02224393A (en) | Method of soldering mixed mounting metal core printed board assembly | |
| JPH04243187A (en) | Printed circuit board | |
| JPH01204381A (en) | Soldering of lead terminal and lead frame | |
| JP2000114553A (en) | Semiconductor device and manufacture thereof | |
| JPH04137654A (en) | Semiconductor device | |
| JPH1187971A (en) | Manufacture of high-frequency unit | |
| JPH06164117A (en) | Manufacture of wiring board with connector attached | |
| JPH04167490A (en) | Printed-wiring board | |
| JPH04137656A (en) | Manufacture of hermetically sealed semiconductor device | |
| JPH0590984U (en) | Printed circuit board | |
| JPH0380599A (en) | Electronic circuit module | |
| JPH0656781B2 (en) | Pin jack mounting method | |
| JPH0227797A (en) | Shielding case |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| LAPS | Cancellation because of no payment of annual fees |