JPS63232517A - Output waveform control circuit - Google Patents

Abstract

PURPOSE:To make the tilt of the leading edge and the trailing edge of the output waveform from a pulse output circuit constant without depending on load by feeding back the output waveform so as to detect the tilts of the leading edge and the trailing edge and generating a control signal so as to correct the output waveform. CONSTITUTION:After feeding back the output waveform from the output circuit 1 so as to input a leading edge and trailing edge tilt detection part 2, a differential waveform corresponding to the tilt of the leading edge and the trailing edge is generated. A peak holding circuit detects and holds a peak value and an output waveform control signal generation part 3 compares the detected value with a specified value and gives the control signal which corrects the leading edge and the trailing edge time of the output waveform to the final stage of the output circuit 1. Thus, the optimum tilt that the tilts of the leading edge and the trailing edge of the output waveform does not alter even by the load capacity can be always held and a crosstalk which occurs, because the load is light and the tilt is too sharp can be prevented.

Description

[Detailed Description of the Invention] [Summary] The present invention provides feedback of the output waveform to make the rise and fall times of the output waveform of a pulse output circuit constant regardless of the load. This system detects the slope of the voltage as a voltage value, compares it with a designated value, and generates a control signal depending on the magnitude to correct the output waveform.

[Industrial application field]

The present invention relates to an output waveform control circuit that determines the rising and falling slopes of an output waveform from a pulse output circuit without depending on the load.

[Conventional technology]

Conventionally, square wave (pulse) output circuits such as TTL have been widely used in logic ICs, but the rise and fall slopes (voltage/time) of the circuits vary depending on the output load capacity.

If the load capacity is small and the slope is steep, crosstalk noise will increase, especially when using multi-core wires, and if the load capacity is large and the slope is slow, the transmission delay time to the next stage output will increase. cause an increase.

FIG. 4 shows an example of a conventional square wave output circuit.

In the figure, for example, the output of TTL 12, which is constructed by two people, is connected to the output resistance r! on the emitter side. is input to the base of the transistor 120, which has an adjustment resistor R connected to the collector side,
The emitter output and collector output of the transistor 12 are input to the respective bases of the final stage driving transistor 13 and current source transistor 14. transistor 14
A diode Dl is provided between the transistor 16 and the collector output of the transistor 13.

With this configuration, by adjusting the resistors R and rl of the transistor 12, it is possible to set the optimum rise and fall slopes for a predetermined load capacitance.

[Problem that the invention seeks to solve]

In the above-mentioned conventional pulse output circuit, when the output load capacity changes, the problem arises that crosstalk noise increases under light loads and delay time increases under heavy loads, as described above.

An object of the present invention is to provide an output waveform control circuit that controls the rise and fall slopes of the output waveform of a pulse output circuit so that they are always constant.

[Means for solving problems]

In order to achieve the above object, the present invention includes means for feeding back the output waveform of the final stage of the pulse output circuit and detecting the rising, falling, and falling slopes of the output waveform, and comparing the detected value with a designated value to determine the magnitude. and means for generating a control signal of the output waveform in accordance with the output waveform.

FIG. 1(α) is a schematic configuration diagram of the present invention.

That is, the output waveform from the output point 0 of the output circuit 1 is fed back to the rising and falling slope detector 2, and
A differential waveform corresponding to the rising and falling slopes is generated, inputted into a peak hold circuit, the peak value is detected and held, and this is sent to the output waveform control signal generator 6 to determine the rising and falling times of the output waveform. A control signal to be modified is applied to the final stage of the output circuit 1.

[For production]

Figure 1 (6) shows an example of the control waveform, and ■ in the same figure indicates that the rising and falling slopes of the input waveform are too small than the specified values, so you want to correct them in the larger direction. Stabilizes to the specified value. 3 in the figure is a case where the slope of the input waveform is too large than the specified value and is corrected to be smaller.

Even if the slope of the output waveform changes due to a change in the load capacitance as described above, the circuit of the present invention makes it possible to control the waveform to have a constant slope.

〔Example〕

FIG. 2 is an explanatory diagram of the configuration of an embodiment of the present invention, and FIG. 1 (
FIG. 3 is a detailed circuit diagram corresponding to the schematic configuration diagram of α). FIGS. 3-3 are operational waveform diagrams.

In FIG. 2, the output circuit 1 is the conventional example shown in FIG. 4, which controls a driving transistor 15 and seven current sources 14 through a transistor 12 of a two-man power TTL or Siemitsu follower. use

A feedback system is provided between the output point 0 and the collector resistor R of the emitter 7-orer 12.

The feedback system is composed of a rising and falling slope detecting section 2 and an output waveform control signal generating section 3, and the rising and falling slope detecting section 2 is composed of a differentiating circuit and a peak hold circuit.

As shown in the figure, the differentiator circuit connects a capacitor CI to a voltage dividing point of a voltage dividing resistor f''3.τ4, and connects a negative terminal feedback amplifier 15.
into the positive terminal of and obtain the differential waveform. The peak hold circuit connects the differential waveform to the positive terminal of the negative terminal feedback amplifier 16 via the diode D2, with a capacitor C8 and a resistor t'5 in parallel as a bias, and outputs the peak hold signal ■
get. The operation of the above structure is shown in FIGS. In other words, the rising and falling slopes of the output waveform at output point 0 of (■) are expressed as (■).

By setting @θ and passing it through a differentiation circuit, the peak value of the differential waveform of the output (■) changes as shown in the figure.

By passing this differential waveform (2) through a peak hold circuit, the output (2) is held at the six levels of (2), @, and θ in the figure.

The next output waveform control signal generating section 3 passes the output (2) from the peak hold circuit through a resistor (2) to a feedback circuit with a resistor (2). −
9, and its positive terminal is connected to a voltage dividing resistor differential set to a predetermined level, r8.
Input the dividing point voltage. With this configuration, as shown in FIG. 6, a constant level is set for the output ■, and an inverted level ◎ is output whether it is above or below this level.

This output level is set to the transistor 12 of the output circuit 1 described above.
is supplied to the collector resistor R of.

Assuming that the rise and fall slopes of the output waveform of the output circuit are optimal when they are at the predetermined constant levels, - if a steeper slope than this is input, lower the level of the output O,
By reducing the load current of the transistor 129, and therefore changing the bias of the transistor 14, which is the current source of the driving transistor 13, by the voltage drop of the resistor R, and reducing the saturation voltage, the rising and falling slopes of the output waveform are reduced. The slope is set to a predetermined slope by several pulses, as shown in Figure 1 (2).

On the other hand, if a slow slope of a certain level is input, the reverse calculation is performed in the same way, and a predetermined slope is set with several pulses as shown in FIG.

〔Effect of the invention〕

As explained above, according to the present invention, the output waveform is fed back, the rising and falling slopes are detected as voltage values, and a control signal corresponding to the magnitude is applied to the final stage of the output circuit by comparing it with a specified value. This ensures that the slope is always constant. As a result, it is possible to always maintain an optimal slope in which the rise and fall slopes of the output waveform do not change depending on the load capacity, and it is also possible to prevent crosstalk from occurring due to the slope being too steep even under a light load. can.

[Brief explanation of drawings]

Figures 1 (G) and (6) are schematic explanatory diagrams of the present invention;
3 is an operational waveform diagram of the embodiment, and FIG. 4 is an explanatory diagram of the conventional example. In the figure, 1 is an output circuit, 2 is a rising and falling signal. 3 is an output waveform control signal generator, and 11 is a TTL. 12, 13, and 14 are transistors, and 15, 16, and 17 are amplifiers.

Claims (2)

[Claims] (1) Means for feeding back the output waveform of the final stage of the pulse output circuit and detecting the rising and falling slopes of the output waveform, and comparing the detected value with a specified value and generating a control signal for the output waveform depending on the magnitude. An output waveform control circuit characterized in that it comprises means for: modifying the rising and falling slopes of the final stage according to the control signal. (2) The means for detecting the rising and falling slopes of the output waveform includes a differentiating circuit that detects a differential waveform corresponding to the rising and falling slopes, and a peak hold circuit that temporarily holds the peak of the differential waveform. An output waveform control circuit according to claim 1, characterized in that: