JPS63232390A - Manufacture of through-hole wiring board - Google Patents

Manufacture of through-hole wiring board

Info

Publication number
JPS63232390A
JPS63232390A JP62067077A JP6707787A JPS63232390A JP S63232390 A JPS63232390 A JP S63232390A JP 62067077 A JP62067077 A JP 62067077A JP 6707787 A JP6707787 A JP 6707787A JP S63232390 A JPS63232390 A JP S63232390A
Authority
JP
Japan
Prior art keywords
etching resist
hole
substrate
holes
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62067077A
Other languages
Japanese (ja)
Other versions
JPH0455548B2 (en
Inventor
甲斐 貮夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SMC Corp
Original Assignee
SMC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by SMC Corp filed Critical SMC Corp
Priority to JP62067077A priority Critical patent/JPS63232390A/en
Publication of JPS63232390A publication Critical patent/JPS63232390A/en
Publication of JPH0455548B2 publication Critical patent/JPH0455548B2/ja
Granted legal-status Critical Current

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  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 (a)産業上の利用分野 この発明は、感光性のエツチングレジストを使用して、
非回路部の導体部をエツチングする工程を含むスルーホ
ール配線基板の製造方法に関する(b)従来の技術 スルーホール配線基板の従来の製造方法には、穴埋め法
や半田剥離法などが、あるが、これらの方法はスルーホ
ール欠けを発生したり薬品コストが高くなるなどの不都
合がある。そこで最近、感光性のエツチングレジストを
電着塗装方式によってスルーホールを含む回路部に形成
し、上記の方法の欠点を解消し且つ高密度な配線パター
ンを形成する方法が提案されている。この電着塗装方式
では、スルーホールの内面に感光性のエツチングレジス
トが確実に付着し、しかもそのレジスト被膜の膜圧も容
易にコントロールすることができるために、解像度を4
0ミクロン以下のファインパターン、たとえばICのピ
ン間に20〜30本の配線ラインを形成することが可能
となる。この方式ではスルーホールを含む回路部に感光
性のエツチングレジストを露出させた状態で基板全面を
露光し、上記回路部に載せであるエツチングレジスト)
を取り除くことになる。
Detailed Description of the Invention (a) Industrial Application Field This invention uses a photosensitive etching resist to
(b) Conventional technology related to a method for manufacturing a through-hole wiring board including a step of etching conductor parts in non-circuit parts. Conventional methods for manufacturing a through-hole wiring board include a hole-filling method and a solder stripping method. These methods have disadvantages such as through-hole chipping and increased chemical costs. Recently, a method has been proposed in which a photosensitive etching resist is formed on circuit parts including through-holes by electrodeposition, thereby eliminating the drawbacks of the above methods and forming a high-density wiring pattern. With this electrodeposition coating method, the photosensitive etching resist reliably adheres to the inner surface of the through hole, and the film thickness of the resist film can also be easily controlled.
It becomes possible to form a fine pattern of 0 micron or less, for example, 20 to 30 wiring lines between pins of an IC. In this method, the entire surface of the board is exposed with the photosensitive etching resist exposed in the circuit area including through holes, and then the etching resist placed on the circuit area is exposed.
will be removed.

(C1発明が解決しようとする問題点 しかしながら感光性エツチングレジストを使用する上記
の従来の方法では、基板全面を露光するときに、スルー
ホール内壁に十分な光が照射されない場合がある。第5
図はこの様子を示している。基板1の全面およびスルー
ホール内壁には銅等の材料からなる導体部2が形成され
、さらにスルーホール内壁を含む回路部に感光性のエツ
チングレジスト3が電着塗装方式によって形成されたの
ち、紫外線ランプ5によって基板全面が露光される。こ
のとき基板1表面の回路部は紫外線5aの十分な照射を
受けるが、スルーホール4の内壁は十分に照射されない
。このためスルーホール内壁のエツチングレジスト3が
十分に硬化されず、基板洗浄時にその未硬化状態のエツ
チングレジストがスルーホール内壁から剥離してしまう
可能性があった。
(C1 Problem to be Solved by the Invention However, in the above conventional method using a photosensitive etching resist, when the entire surface of the substrate is exposed, the inner wall of the through hole may not be irradiated with sufficient light. Fifth
The figure shows this situation. A conductor portion 2 made of a material such as copper is formed on the entire surface of the substrate 1 and the inner wall of the through hole, and a photosensitive etching resist 3 is formed on the circuit portion including the inner wall of the through hole by electrodeposition coating. The entire surface of the substrate is exposed by the lamp 5. At this time, the circuit portion on the surface of the substrate 1 is sufficiently irradiated with the ultraviolet rays 5a, but the inner wall of the through hole 4 is not sufficiently irradiated. For this reason, the etching resist 3 on the inner wall of the through hole is not sufficiently cured, and there is a possibility that the uncured etching resist 3 may be peeled off from the inner wall of the through hole during substrate cleaning.

この発明の目的は、露光時においてスルーホール内壁に
対しても十分な露光が行われ、スルーホール部の信顛性
を高くすることのできるスルーホール配線基板の製造方
法を提供することにある。
An object of the present invention is to provide a method for manufacturing a through-hole wiring board in which the inner walls of the through-holes are sufficiently exposed during exposure, thereby increasing the reliability of the through-hole portions.

(d1問題点を解決するための手段 この発明は、スルーホールを含む基板全面に導体部を形
成したのち、スルーホールを含む回路部にのみ感光性を
エツチングレジストを露出させ、ついで基板の一方の面
の側に乱反射板をおき他方の面の側を全面露光する。工
程を基板上下両面各々において行い、光硬化したエツチ
ングレジスト以外の領域の導体部をエツチングで取り除
いて回路パターンを形成することを特徴とする。
(Means for solving problem d1) In this invention, after forming a conductor part on the entire surface of a board including through holes, a photosensitive etching resist is exposed only in the circuit part including through holes, and then one side of the board is exposed. A diffuse reflection plate is placed on one side, and the other side is completely exposed to light.The process is performed on both the upper and lower surfaces of the substrate, and the conductor portions in areas other than the photo-cured etching resist are removed by etching to form a circuit pattern. Features.

<61作用 この発明の作用を第1図を参照して説明する。<61 action The operation of this invention will be explained with reference to FIG.

第1図はこの発明の露光工程を示している。この露光工
程では、第5図に示す従来の露光工程に比較して、紫外
線ランプ5の配置位置の反対側の基板面に乱反射板6を
配置している点が異なる。
FIG. 1 shows the exposure process of this invention. This exposure process differs from the conventional exposure process shown in FIG. 5 in that a diffused reflection plate 6 is disposed on the substrate surface opposite to the position where the ultraviolet lamp 5 is disposed.

紫外線ランプ5から基板1に対して照射された紫外Na
5aは、スルーホール4を通過するとき第5図に示す従
来と同様にスルーホール内壁を十分に照射しない。しか
し乱反射面6aで乱反射してスルーホール内壁に到達す
る。したがって図示するようにスルーホール内壁は乱反
射光の十分な照射を受け、その照射量は実質的に基板1
表面の回路部に対する照射量とほとんど同一となる。こ
の後の工程は従来の製造方法と全く同一である。すなわ
ちスルーホールを含む回路部以外の導体部をエツチング
で取除いて回路パターンを形成し、さらに回路部を覆っ
ているエツチングレジスト3を除去する。
Ultraviolet Na irradiated from the ultraviolet lamp 5 to the substrate 1
5a does not sufficiently illuminate the inner wall of the through hole when it passes through the through hole 4, as in the conventional case shown in FIG. However, it is diffusely reflected by the diffused reflection surface 6a and reaches the inner wall of the through hole. Therefore, as shown in the figure, the inner wall of the through hole is sufficiently irradiated with diffusely reflected light, and the amount of irradiation is substantially equal to that of the substrate 1.
The amount of irradiation is almost the same as that for the circuit section on the surface. The subsequent steps are exactly the same as the conventional manufacturing method. That is, the conductor portions other than the circuit portion including through holes are removed by etching to form a circuit pattern, and furthermore, the etching resist 3 covering the circuit portion is removed.

(f)実施例 第2図はこの発明に係るスルーホール配線基板の製造方
法を工程順に示している。以下各工程の説明を行う。
(f) Embodiment FIG. 2 shows a method for manufacturing a through-hole wiring board according to the present invention in the order of steps. Each process will be explained below.

A・・・・力゛ラスエポキシ、祇エポキシ、紙フェノー
ルなどの素材を用意して基板1を形成するB・・・・基
板1の所定の個所に穴明は加工を行う。
A: The substrate 1 is formed by preparing a material such as glass epoxy, epoxy, paper phenol, etc.B: Holes are formed at predetermined locations on the substrate 1.

C・・・・穴部の内壁および基板1の表裏面全体に公知
の化学メッキを行いメッキ膜7を施す。
C: The inner wall of the hole and the entire front and back surfaces of the substrate 1 are subjected to known chemical plating to form a plating film 7.

D・・・・さらに上記化学メッキによって析出したメッ
キ膜上に電気メツキ層8を形成する。
D...Furthermore, an electroplated layer 8 is formed on the plating film deposited by the above chemical plating.

E・・・・さらに上記電気メッキ層8上に回路部以外と
なる領域を適当な絶縁膜9で覆う。この絶縁膜9はスク
リーン印刷法などによって形成される。
E: Further, areas other than the circuit portion on the electroplated layer 8 are covered with a suitable insulating film 9. This insulating film 9 is formed by a screen printing method or the like.

F・・・・続いて上記の基板を電着液内に浸積し、電気
メツキ層8を一方の電極にして電着塗装を行う。電着液
には公知のものを使用することができるが、本発明にお
いては紫外線照射によって硬化する感光剤の混在したも
のを使用する。この工程によってスルーホールを含む回
路部に感光性エツチングレジスト10が形成される。
F...Subsequently, the above substrate is immersed in an electrodeposition solution, and electrodeposition is performed using the electroplating layer 8 as one electrode. Although any known electrodeposition solution can be used, in the present invention, one containing a photosensitizer that is hardened by ultraviolet irradiation is used. Through this step, a photosensitive etching resist 10 is formed in the circuit portion including the through holes.

G・・・・次に乱反射板6の上に上記の基板を置き、上
方に紫外線ランプ5を配置して紫外線5aを照射する。
G...Next, the above substrate is placed on the diffuse reflection plate 6, and the ultraviolet lamp 5 is placed above it to irradiate it with ultraviolet rays 5a.

これによって基板表面の感光性エツチングレジスト10
が硬化するとともにスルーホールを透過した紫外線5a
は乱反射板6aの乱反射面6aで乱反射し、スルーホー
ル4の内壁を一様に照射して硬化させる。
As a result, the photosensitive etching resist 10 on the substrate surface
UV light 5a passes through the through hole as it hardens.
The light is diffusely reflected by the diffused reflection surface 6a of the diffused reflection plate 6a, and the inner wall of the through hole 4 is uniformly irradiated and hardened.

H・・・・乱反射板6を基板の上面に置き且つ紫外線ラ
ンプ5を基板1の下側において基板裏面に対して紫外線
5aを照射する。これによって基板裏面の感光性エツチ
ングレジスト10が硬化するとともにスルーホール4を
透過した紫外線は乱反射板6の乱反射面6aで乱反射し
スルーホールの内壁を照射する。上記Gの工程でスルー
ホール内壁のエツチングレジスト10は硬化状態にある
が、このHの工程でスルーホール内のエツチングレジス
ト10の硬化状態がさらに完全なものとなる。
H: The diffused reflection plate 6 is placed on the top surface of the substrate, and the ultraviolet lamp 5 is placed below the substrate 1 to irradiate the back surface of the substrate with ultraviolet rays 5a. As a result, the photosensitive etching resist 10 on the back surface of the substrate is cured, and the ultraviolet rays transmitted through the through holes 4 are diffusely reflected by the diffuse reflection surface 6a of the diffuse reflection plate 6 and irradiate the inner walls of the through holes. In step G, the etching resist 10 on the inner wall of the through hole is in a hardened state, but in step H, the etching resist 10 inside the through hole is further completely hardened.

■・・・・乱反射板6および紫外線ランプ5を取り払い
、弱アルカリ液で絶縁膜9を除去するとともに、エツチ
ング工程で非回路部の導体部9を取り除(。
■...The diffused reflection plate 6 and the ultraviolet lamp 5 are removed, the insulating film 9 is removed with a weak alkaline solution, and the conductor part 9 in the non-circuit part is removed in an etching process (.

J・・・・さらに回路部のエツチングレジスト10を除
去して回路パターンの形成を完了し、図示しないソルダ
ーレジストなどの処理を行って基板の製造を完了する。
J...Furthermore, the etching resist 10 of the circuit portion is removed to complete the formation of the circuit pattern, and processing such as solder resist (not shown) is performed to complete the manufacture of the board.

以上の製造方法の内、Fの工程で電着塗装方式で感光性
エツチングレジスト10を形成しているために、スルー
ホールを含むすべての回路表面に膜圧の均一なレジスト
膜を確実に形成することができる。上記GおよびHの工
程で乱反射板6を使用して露光を行うようにしているた
めにスルーホール内壁のエツチングレジスト膜に対して
十分な紫外線の照射を行うことができる。
In the above manufacturing method, since the photosensitive etching resist 10 is formed by electrodeposition coating in step F, a resist film with uniform film thickness is reliably formed on all circuit surfaces including through holes. be able to. Since the diffused reflection plate 6 is used for exposure in the steps G and H, the etching resist film on the inner wall of the through hole can be irradiated with sufficient ultraviolet rays.

第3図は写真法を利用した本発明の製造方法の一部を示
す。上記の第2図に示す製造方法では、Eの工程におい
て印刷によって絶縁膜9を形成して、Fの工程で回路部
にのみエツチングレジスト10を形成するようにしてい
るが、第3図に示す製造方法では上記Eの工程に代えて
基板全面に対してエツチングレジスト10を形成する(
E′)。そして上記F工程に代えて、非回路部を覆うネ
ガフィルム9を基板上に置いて上記G以下の工程へと移
る。このような方法によっても上記第2図に示す方法と
同様に均一な膜圧のエツチングレジストを確実に形成す
ることができるとともに、スルーホール内壁のエツチン
グレジストを確実に硬化させることができる。
FIG. 3 shows a part of the manufacturing method of the present invention using a photographic method. In the manufacturing method shown in FIG. 2 above, the insulating film 9 is formed by printing in the step E, and the etching resist 10 is formed only in the circuit area in the step F. However, as shown in FIG. In the manufacturing method, instead of step E above, an etching resist 10 is formed over the entire surface of the substrate (
E'). Then, in place of the step F, a negative film 9 covering the non-circuit portion is placed on the substrate, and the process proceeds to the steps G and subsequent steps. Similar to the method shown in FIG. 2, this method also makes it possible to reliably form an etching resist with a uniform film thickness, and also to reliably harden the etching resist on the inner wall of the through hole.

第4図は本発明に係る製造方法の応用例を示している。FIG. 4 shows an example of application of the manufacturing method according to the present invention.

第1の基板Iと第2の基板l“とで図示するように乱反
射板6を挟み、上下両方から紫外線を基板に対して照射
する。乱反射板6の上下両面はともに乱反射面で構成さ
れている。第2図のGおよびHの工程で、このように二
つの基板を乱反射板6を介してサンドインチ構造で上下
両方から露光を行うことによって一回の露光工程で二つ
の基板の同時処理が可能となる。したがってこの工程を
終えたのち二つの基板1.1”をそれぞれ上下入れ換え
て再び露光を行えば、二回の露光工程で二枚の基板の露
光処理を終了する。すなわち実質的に一回の露光工程で
一枚の基板に対する露光が終了したものとみなせ、効率
を良くすることができる。
A diffusely reflecting plate 6 is sandwiched between the first substrate I and the second substrate l'' as shown in the figure, and ultraviolet rays are irradiated onto the substrate from both above and below.Both the upper and lower surfaces of the diffusely reflecting plate 6 are composed of diffusely reflecting surfaces. In steps G and H in Fig. 2, the two substrates are exposed from both the top and bottom in a sandwich structure through the diffused reflection plate 6, thereby allowing simultaneous processing of the two substrates in one exposure step. Therefore, after completing this step, if the two substrates 1.1'' are exchanged upside down and exposed again, the exposure processing of the two substrates can be completed in two exposure steps. In other words, it can be considered that the exposure of one substrate is substantially completed in one exposure process, and the efficiency can be improved.

なお以上の実施例では、電着塗装方式によってスルーホ
ールを含む回路部に感光性のエツチングレジストを形成
するようにしたが、本発明ではスルーホールを含む回路
部に感光性エツチングレジストを露出した状態で形成す
ればよいのであって、このエツチングレジストを形成す
るのに電着塗装方式を必ず使用しなければならないとい
うものではない。他の方法で上記エツチングレジストを
形成することも勿論可能である。
In the above embodiments, the photosensitive etching resist was formed on the circuit portion including the through holes by an electrodeposition coating method, but in the present invention, the photosensitive etching resist was formed in the circuit portion including the through holes in a state where the photosensitive etching resist was exposed. It is not necessarily necessary to use an electrodeposition coating method to form this etching resist. Of course, it is also possible to form the etching resist using other methods.

(沿発明の効果 以上のようにこの発明によれば、スルーホールを含む回
路部に露出形成された感光性のエツチングレジストに対
して露光を行4−や時に、基板の一方の面の側に乱反射
板を置いて露光するようにしているために、光は乱反射
板で乱反射してスルーホール内の感光性エツチングレジ
ストに到達するためにそのレジストが十分に光の照射を
受けることができる。このため感光が十分でないことに
よるスルーホール内壁のレジストの剥離などを簡単に防
止することができ、スルーホールの信頼性を確実に向上
できる利点がある。
(Effects of the Invention As described above, according to the present invention, when the photosensitive etching resist formed exposed in the circuit portion including the through hole is exposed to light, it is exposed on one side of the substrate. Since a diffused reflection plate is placed for exposure, the light is diffusely reflected by the diffused reflection plate and reaches the photosensitive etching resist in the through-hole, so that the resist can be sufficiently irradiated with light. Therefore, peeling of the resist on the inner wall of the through hole due to insufficient exposure to light can be easily prevented, and there is an advantage that the reliability of the through hole can be surely improved.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の製造方法を説明するための図である。 第2図は本発明に係る製造方法を工程順に説明する図、
第3図はその変形例を示す図、第4図は本発明の製造方
法をさらに効率的に行うための方法を説明するための図
である。第5図は従来の製造方法を説明するための図で
ある。 1一基板、 2−導体部、 3−エツチングレジスト、 4−スルーホール、 6−乱反射板。
FIG. 1 is a diagram for explaining the manufacturing method of the present invention. FIG. 2 is a diagram explaining the manufacturing method according to the present invention in the order of steps;
FIG. 3 is a diagram showing a modification thereof, and FIG. 4 is a diagram for explaining a method for performing the manufacturing method of the present invention more efficiently. FIG. 5 is a diagram for explaining a conventional manufacturing method. 1 - substrate, 2 - conductor section, 3 - etching resist, 4 - through hole, 6 - diffused reflection plate.

Claims (1)

【特許請求の範囲】[Claims] (1)スルーホールを含む基板全面に導体部を形成した
のち、スルーホールを含む回路部にのみ感光性エッチン
グレジストを露出させ、ついで基板の一方の面の側に乱
反射板を置き、他方の面の側を全面露光する工程を基板
上下両面各々において行い、光硬化したエッチングレジ
スト領域以外の領域の導体部をエッチングで取り除いて
回路パターンを形成することを特徴とするスルーホール
配線基板の製造方法。
(1) After forming a conductor part on the entire surface of the board including the through holes, expose the photosensitive etching resist only on the circuit part including the through holes, then place a diffused reflection plate on one side of the board, and place the diffuser on the other side. A method for manufacturing a through-hole wiring board, characterized in that a step of exposing the entire surface to light is performed on both the upper and lower surfaces of the board, and a circuit pattern is formed by etching away conductor parts in areas other than the photo-cured etching resist area.
JP62067077A 1987-03-19 1987-03-19 Manufacture of through-hole wiring board Granted JPS63232390A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62067077A JPS63232390A (en) 1987-03-19 1987-03-19 Manufacture of through-hole wiring board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62067077A JPS63232390A (en) 1987-03-19 1987-03-19 Manufacture of through-hole wiring board

Publications (2)

Publication Number Publication Date
JPS63232390A true JPS63232390A (en) 1988-09-28
JPH0455548B2 JPH0455548B2 (en) 1992-09-03

Family

ID=13334443

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62067077A Granted JPS63232390A (en) 1987-03-19 1987-03-19 Manufacture of through-hole wiring board

Country Status (1)

Country Link
JP (1) JPS63232390A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0335587A (en) * 1989-06-30 1991-02-15 Ibiden Co Ltd Manufacture of printed wiring board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0335587A (en) * 1989-06-30 1991-02-15 Ibiden Co Ltd Manufacture of printed wiring board

Also Published As

Publication number Publication date
JPH0455548B2 (en) 1992-09-03

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