JPS63223922A - Setting system for arithmetic condition of central processing unit - Google Patents

Abstract

PURPOSE:To freely set an arithmetic condition, and to obtain a microprogram high in density by determining a condition by inputting a microprogram and an information data, and an external signal supplied from other part than a register file. CONSTITUTION:In a register file 1, a microprogram and a data are stored, and a microprogram data is replenished through a bus line from an external storage device. A control part 8 sends out an operation object data to an arithmetic mechanism 6 through an input latch register 2. Also, each information from the microprogram and an arithmetic input data is separated by registers 2, 2, and used as a size, a code, etc. between a condition code and an input data, and fed to a condition determining device 4 through a comparator 3. Moreover, to the determining device 4, a machine instruction or an external input signal F of the microprogram, etc. is supplied from the outside. An operation determining device 5 specifies an arithmetic condition in accordance with the determined condition. In such a way, the microprogram having high density can be obtained.

Description

[Detailed Description of the Invention] [Industrial Field of Application] This invention relates to an arithmetic condition setting method for realizing various conditional arithmetic operations in a central processing unit of a computer. [Prior Art] FIG. An example of a method for realizing conditional calculations in a calculation unit in a processing unit (CPU) is shown.

In the figure, 1 is a register file with multiple registers inside, 2 is an input launch register, 3 is a comparator, 4 is a condition determiner, 5 is an operation determiner, 6 is an operation mechanism, 7 is an output side register, 8 is a control section.

Register file 1 stores a large number of microprograms and data, and these data are input to input latch register 2.
．． 2, the next data etc. are replenished from an external storage device (not shown) via the pass line 10. The control section 8 sequentially outputs control signals a to e to each section such as the register file 1, and performs timing control of gates and the like so that the entire processing procedure is executed normally.

Next, the operation will be explained. The data to be calculated from the data set in the register file 1 in FIG. Set the output latch register blank. Here, the method for determining the performance S21 conditions by the mK determiner 5 will be described below.

The data are separated and given to the condition determiner 4 via the comparator 3 as a condition code and the magnitude, sign, etc. between the input data. The condition determiner 4 reads these condition code and various information multiple times to determine the condition (true/false), and outputs the result to the /'A calculation calculator 5. The computation determiner 5 instructs the computation condition to the computation mechanism 6 according to the given condition.

[Problem that the invention seeks to solve]

In the conventional method for realizing conditional calculations, as mentioned above, the determining factor for conditionality is only the internal data from the register file. Choice was possible. Therefore, it is not possible to select an operation based on conditions different from these condition codes, and in this case, it is necessary to create a new microprogram with different operation conditions using separate operation conditions.

This invention was made in order to solve the above-mentioned problems, and the calculation conditions can be freely set to increase the density of the microprogram, thereby increasing the reliability of the microprogram. The purpose is to obtain a setting method.

[Means for Solving the Problems] In the present invention, there are a step (step S+) in which data to be computed from the register file l is taken into the computing mechanism 6, and a step in which the data to be computed from the register file l is transferred to the data to be computed. a step of separating and comparing the microprograms and information data (step S2);
a step of determining a condition by receiving an external input signal F from a source other than the register file and a register file (step S3); and a step of instructing the calculation mechanism 6 to calculate the calculation conditions according to the condition (step S4). .

[Effect]

The external input signal F from an external flip-flop circuit, etc. is added to the built-in microprogram and information data to determine the condition (step S3).
Various calculation conditions can be freely set according to the state of the input signal F. Thus, the calculation mechanism 6 executes conditional calculations controlled by external conditions.

〔Example〕

An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 shows the central processing bag v! in which the conditional calculation implementation method of the present invention is implemented. 1 (CPIJ) is a diagram showing the overall configuration of CPIJ. In the figure, ■ is a register file with multiple registers inside, 2 is a manual latch register, 3 is a comparator,
4 is a condition determiner, 5 is an arithmetic determiner, 6 is an arithmetic mechanism, 7 is an output latch register, and 8 is a control section.

A large number of microprograms and data are stored in the register file 1, and when these data are read into the human-powered registers 2, 2, the next data, etc. are replenished from an external storage device (not shown) via the path line 10. Ru. The control section 8 sequentially outputs control signals a to e to each section such as the register file 1, and performs timing control of gates and the like so that the entire processing procedure is executed normally. Therefore, F is
This external input signal F is an external input signal from a register provided externally and constituted by a flip-flop.

Next, the operation will be explained according to the flowchart shown in FIG. Based on the data set in the first α-segister file 1, the target data is input to the processing mechanism 6 via the human side register 2 in step S+, where the conditional calculation determined by the calculation determiner 5 is performed. is performed on the target data, and the result is set in the output edge register 7.

Here, the method for determining the calculation conditions by the calculation determiner 5 will be described below.

Then, the magnitude, sign, etc. between the condition code and the manual data are provided to the condition determiner 4 via the comparator 3. The condition determiner 4 also receives an external input signal I?, such as a one-field machine command or a one-field microprogram, from the outside. is given.

Next, in step S3, the condition determiner 4 determines the condition (true/false) from these condition codes, various information, and external input signal F, and sends the result to the calculation determiner 5.
Output to. In step S44, the arithmetic determining device 5 instructs the arithmetic mechanism 6 to calculate the arithmetic conditions according to this condition. In this way, the external input signal F determines the condition based on the state of the register of the external flip-flop, and the operation determiner 5 specifies the operation condition based on this.

Therefore, when the state of the register of the external flip-flop is opposite to the above, the operation mechanism inversely performs the operation of the conditional operation.

Although the above embodiment has been explained using a logical block diagram centered on the calculation mechanism that performs conditional calculations, other configurations are also possible, and the main point is that the calculation contents can be changed by the calculation condition data. For example, if external human power is added based on the same idea as this time, the same effect will be achieved.As explained above, according to this invention, the steps of importing the data to be calculated from the register file into the calculation mechanism and the step of importing the data from the register file are completed. A stage of separating and comparing the microprogram and information data from the data to be operated on, a stage of determining the condition by receiving external input signals from sources other than these microprograms, information data, and register files, and performing the operation according to this condition. Since the system is equipped with a stage for instructing the mechanism to perform calculation conditions, various calculation conditions can be freely set using software, making it possible to increase the density of microprograms.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a central processing unit to which the calculation condition setting method of the present invention is applied, FIG. 2 is a flowchart for explaining the present invention in detail, and FIG. 3 is a block diagram of a central processing unit to which the calculation condition setting method of the present invention is applied. FIG. ■...Register file, 2...Manual latch register, 3...Comparator, 4...Condition determiner,
5... Arithmetic determiner, 6... Arithmetic mechanism, 7... Output latch register, 8... Control unit, 9... External input signal.

Claims (1)

[Claims] A step of loading data to be operated on from the register file into the arithmetic mechanism, a step of separating and comparing the microprogram and information data from the register file from the data to be operated on, and a step of separating and comparing the microprogram and information data from the register file, and inputting these microprograms and information data from sources other than the register file. A calculation condition setting method for a central processing unit, comprising a step of determining a condition by receiving an external input signal, and a step of instructing the calculation mechanism to specify the calculation condition in accordance with the condition.