JPS63217706A - Digital signal processing circuit - Google Patents

Abstract

PURPOSE:To obtain a general-purpose digital signal processing circuit by using a switched capacitor filter for a pre-filter and a post-filter and varying the characteristic of the pre-filter by a frequency variable clock oscillator. CONSTITUTION:A digital value in response to a frequency band handled by pre-filters 6a-6l and post filters 7a-7n is set to an EPROM 91 of a frequency variable clock oscillator 9 for VCOs 93a-93l, 93'a-93'n. Each digital value is given to each VCO through a D/A converter 92 and outputted as clock signals phia-phil, phi'a-phi'n in response to the set digital value. Thus, the frequency band characteristic of the pre-filters 6a-6l and the post filters 7a-7n is adjusted specifically to obtain a general-purpose digital signal processing circuit.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a digital signal processing circuit, and in particular to a digital signal processing circuit equipped with a digital signal processor (hereinafter referred to as DSP), an A/D converter, a D/A converter, etc. The present invention relates to a digital signal processing circuit which is a processing circuit and has excellent versatility.

[Conventional technology]

Conventionally, filters used in transmission lines have evolved from LC filters using individual components processed by analog processing to RC active filters using operational amplifiers. In recent years, with the development of digital technology,
Instead of analog processing, digital signal processing methods are being used. When digital signal processing methods are used, it is possible to process not only the filter but also its peripheral functions, and its excellent filter characteristics and application Due to its wide range of fields, it is attracting attention and is used in modems, etc.

FIG. 4 is a block diagram showing an example of a conventional digital signal processing circuit. As shown, the analog signal I M
a - I M J are play filters 4a to 4j, respectively.
The outputs of the prefilters 4a to 41 are input to the A/D converter 2 and converted into digital signals.

The digital signal output from A/D converter 2 is D
The signal is input to the SPI, where sampling processing is performed. Here, the role of the prefilters 4a to 4jl is that of the DSP
This is to remove aliasing noise caused by the sampling process performed in I. Also, the output of DSPI is D
/A converter 3 to an analog signal, and output signal OUTa through post filters 5a to 5n.
-Output as OUT n. Here, the role of the post filters 5a to 5n, like the pre filters 4a to 41, is to remove aliasing noise caused by the sampling process performed in the DSPI. The above pre-filters 4a to 41 and post filters 5a to 5n are
It is necessary to provide different characteristics depending on the frequency band of each signal to be handled. Therefore, the conventional digital signal processing circuit described above lacks versatility because it is necessary to individually set the frequency bands of the prefilters 4a to 41 and the boss filters 5a to 5n according to the frequency band of each signal to be handled. was.

In addition, as prior art related to the present invention, Japanese Patent Application Laid-Open No. 59-4
There is an invention disclosed in Publication No. 5710.

The invention disclosed in the above publication controls the characteristics of the pre-filter and post-filter of the input/output section so that they are proportional to the sampling frequency of the A/D converter. However, in the case of multiple inputs and multiple outputs like the circuit shown in Figure 4,
10 With control proportional to the sampling frequency of the converter, when the signal frequency band of each input and output changes,
It becomes impossible to use the same circuit for performing control proportional to the sampling frequency, and it becomes necessary to design them separately.

[Problem that the invention seeks to solve]

In the above-mentioned conventional technology, the pre-filter and post-filter of the digital signal processing circuit lack versatility, so it is necessary to provide a pre-filter and post-filter with different characteristics depending on the frequency band of each signal to be handled. There was a problem.

Furthermore, in a multi-input/multi-output digital signal processing circuit, the invention disclosed in Japanese Patent Laid-Open No. 59-45710 has the problem that a special control circuit must be provided depending on the frequency of each input/output. It was hot.

The present invention has been made in view of the problems of the prior art described above, and an object of the present invention is to provide a versatile digital signal processing circuit that can easily cope with changes in the frequency band of signals handled.

[Means for solving problems]

The digital signal processing circuit of the present invention uses a switched capacitor filter as a prefilter/host filter, and by programmably changing the clock frequency for operating the switched capacitor filter, it is possible to change the characteristics of the prefilter. It features a variable frequency clock oscillator.

[Effect]

According to the present invention, a switched capacitor filter is used as the pre-filter and post-filter. A switched capacitor filter is a filter whose frequency band characteristics can be set according to the frequency of an input clock signal. A programmable frequency variable tarlock generator is also used to provide a clock signal to the switched capacitor filter. FIG. 2 is a diagram showing an example of the variable frequency clock generator, and is a diagram showing an example of the variable frequency clock generator.
0 and 0/^ converter 11 and voltage controlled oscillator 12a
~12n. First, digital values D1 to Dn are input to the data write terminal of EPROHlo and stored in EPROHlo. This digital value is E
The oscillation frequencies φ□ to φ□ of the voltage controlled oscillators are controlled by reading from PROHlo, converting it into an analog signal by the D/A converter 11, and inputting the analog signal to the voltage controlled oscillators 12a to 12n.

〔Example〕

The present invention will be described in more detail below with reference to embodiments shown in the accompanying drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention. In FIG. 1, the same parts as those in the conventional example shown in FIG. 4 are given the same reference numerals, and their explanation will be omitted. The embodiment shown in FIG. 1 (in this case, the pre-filters 6a to 6fJ are composed of switched capacitor filters, and the post filters 7a to 7n are also composed of switched capacitor filters.The prefilters 6a to 6!J include , clock signals φ8 to φρ are input from the variable frequency clock oscillator 9, respectively, and clock signals φ'8 to ji are input from the variable frequency clock oscillator 9 to the post filters 7a to 7n, respectively.The switched capacitor filter is , these clock signals φ8 to φ41''a to φ'0 are received to determine the frequency band to be handled.

FIG. 3 is a circuit diagram showing an example of a switched capacitor filter, which is composed of switches 23 and 24, capacitors 21 and 22, and an operational amplifier 25, as shown. Here, the capacitance of the capacitor 22 is b times the capacitance of the capacitor 21. This is expressed as the transfer characteristic of the switched capacitor filter shown in FIG. However, f
C is the frequency of the clock signal, and b is a constant. This (1
) shows that the filter characteristics can be changed by changing the frequency of the clock signal, and that the signal frequency band that the switched capacitor filter can handle is determined by the frequency of the clock signal applied to it.

In FIG. 1, prefilters 6a to 61. Clock signals φ to φJ” a to φ are applied to the post filters 7a to 7n.
The variable frequency clock oscillator 9 which outputs '0' operates as follows. That is, the frequency variable clock oscillator 9 is
It is composed of an EPROH91, a D/A converter 92, and voltage controlled oscillators 93a to 93jl, 93'a to 93'n, and changes the frequency of clock signals φ8 to φ1゜゜ to φ according to the digital value set in advance in the EPROH91. It is something to control.

a n EPROH91 has each voltage controlled oscillator 93 in advance.
a~931.93'a~93'n, prefilter 6
Digital values corresponding to the frequency bands of signals handled by post filters 7a to 7n are set, and each digital value is input to a 0/8 converter 92.

Therefore, the D/A converter 92 outputs an analog signal corresponding to the digital value set in EPROH to each of the voltage controlled oscillators 93a to 9341 and 93'a to 93'n. Therefore, each voltage controlled oscillator 93a to 93fJ, 93
'a~93'n are clock signals φ8~φρ, φ' whose frequencies correspond to the digital values set in EPROH91.
Outputs 8 to φ'□. That is, in the variable frequency clock oscillator 9, the clock signals φ8 to φ6 . φ′a"7-'
n frequency can be determined, thereby making it possible to adjust the frequency band characteristics of the pre-filters 6a to 6jl and the post filters 7a to 7n to predetermined values.

For example, in an input signal system that inputs a signal via the pre-filter 6a, it becomes necessary to handle a signal band with a higher frequency than what was previously set, and the clock of the conventional switched capacitor filter (pre-filter 6a) If the signal can no longer be used, EPROH91
By erasing the digital value indicating the frequency data of the voltage controlled oscillator 93a stored in the pre-filter 6a and writing a new digital value, the clock signal φ that operates the switched capacitor filter of the pre-filter 6a can be easily changed. Pre-filter 6 according to the signal band to be handled
a can be obtained and processed by the same digital signal processing circuit.

As explained above, it is possible to easily change the frequency of the clock signal that operates the switched capacitor filter used as a pre-filter according to the frequency band of the input signal to be processed without changing the circuit. By providing such circuits, it is possible to construct a versatile digital signal processing circuit corresponding to each signal frequency band handled by the circuit.

〔Effect of the invention〕

According to the present invention, it is possible to easily and freely set the frequency band characteristics of the pre-filter and post-filter with a simple configuration, so it is possible to provide a digital signal processing circuit with excellent versatility.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a block diagram showing an example of the configuration of a variable frequency clock generator,
FIG. 3 is a circuit diagram showing an example of a switched capacitor filter, and FIG. 4 is a block diagram showing an example of a conventional digital signal processing circuit. 1...Digital signal processor (DSP), 2...
・^10 converter, 3...D/^ converter, 6a
~6ρ... Pre-filter, 7a-7n... Post-filter, 9... Frequency variable clock oscillator, 10.9
1... EPROM, 11.92-... Port/A converter, 12a to 12n. 93a to 93N, 93'a to 93'n-voltage controlled oscillator, 21°22...capacitor, 23.24...
- Switch, 25... operational amplifier. Agent Patent Attorney Tadashi Akimoto Figure 1 Figure 2 21.22: ~ Mahashita 23.24 Nis 1 Tuna 25: Kanji Amplification On and Ke 63 Figure 4 WaA

Claims (1)

[Claims] 1. In order to remove aliasing noise generated from a digital signal processing circuit, in a digital signal processing circuit that is equipped with a pre-filter at the input section and a post-filter at the output section, the pre-filter and post-filter are each configured with a switched capacitor filter. A digital signal processing circuit comprising a programmable variable frequency clock oscillator that generates clock signals for setting filter characteristics of each switched capacitor filter.