JPS63216386A - Semiconductor photo detector - Google Patents

Abstract

PURPOSE:To realize a horizontal structure PIN-PD of small distributed capacity and appropriate for an OEIC, by forming an n-type region and a p-type region reaching from the surface of a semi-insulating substrate to the lowermost layer of a laminated structure provided with a light absorbing layer between an n-type semiconductor layer and a p-type semiconductor layer on the semi-insulating substrate, etc. CONSTITUTION:A laminated structure provided with a light absorbing layer 3 between an n-type semiconductor layer 2 and a p-type semiconductor layer 4 is provided on a semi-insulating semiconductor substrate 1 and the n-type semiconductor layer 2 and the p-type semiconductor layer 4 except the lowermost layer of the laminated structure are made not to absorb light which is aimed to be received. Further, an n-type region 7 and a p-type region 6 both reach to the lowermost layer from the surface of the semiconductor substrate are formed and ohmic contact electrodes 9, 8 are provided in the n-type region 7 and in the p-type region 6 respectively. For example, the n-type InP layer 2, the i-type InGaAs light absorbing layer 3 and the p-type InP layer 4 are formed on the semi insulating InP substrate 1 and further, an InP contact layer 5, the p-type impurity introduced region 6, the n-type impurity introduced region 7 and the ohmic contact electrodes 8, 9 are formed.

Description

[Detailed Description of the Invention] [Summary] The present invention relates to a semiconductor light-receiving device, in which a laminated structure in which a light absorption layer is provided between n-type semiconductor layers is provided on a semi-insulating substrate. By forming an n-type region and an n-type region reaching from the surface of the semiconductor substrate to the bottom layer of the laminated structure, and providing ohmic contact electrodes to the n-type region and the n-type region, respectively, the distributed capacitance is small, and the distributed capacitance is small. This realizes a PTN-PD with a horizontal structure suitable for 0BIC.

[Industrial application field]

The present invention relates to a semiconductor light receiving device, and particularly to a semiconductor light receiving device having a horizontal PIN structure.

Semiconductor photodetectors used in optical application systems such as optical communications include PIN photodiodes (PIN-PD) and avalanche photodiodes (8PD), but AI'
Although D has the effect of improving the signal-to-noise ratio of photodetectors, it is mainly suitable for long-distance, large-capacity communication systems because it requires a high voltage of several tens of volts and an AGC circuit. ing. On the other hand, compound semiconductor P
IN-PD is suitable for medium to low capacity systems because it operates in about 5cm and has a simple light receiving circuit.

However, in the case of a PIN-PD, as will be described later, the reception level is largely controlled by the capacitance generated between the electrodes, so it is important to reduce this capacitance.

Further, the development of opto-electronic integrated circuits (O[IC), which monolithically integrate optical semiconductor elements and electronic circuits, is progressing, and a light-receiving element with a horizontal surface structure is suitable for O[IC]. However, for example, conventional MSM-PO (Meta
l-8emiconductor-Metal Pho
As will be described later, the dark current tends to increase.

Under these circumstances, there is a demand for a light receiving element with a horizontal PIN structure and a small interelectrode capacitance.

[Conventional technology]

Figure 3 shows a normal GaAs/^1GaAs PIN-PD.
FIG. 2 is a schematic side sectional view of a conventional example. In this conventional example, ♂ type Ga
On the As substrate 21, for example, a carrier concentration I
cm-', i(ν) type GaAs layer 23 with a thickness of about 3 μm
, carrier concentration IX 10' bcm-3, thickness 2p
An n-type AlGaAs layer 24 of about 111 is grown in layers, and the carrier concentration is increased to IXIO'' by, for example, zinc (Zn) diffusion.
A p-type region 25 of about cm-3 is formed L, an n-side electrode 28 is formed with a bonding pad part outside the p-type region 25 by making ohmic contact with the p-type region 25, and the substrate 2 is formed from the back side.
An n-side electrode 29 that makes ohmic contact with 1 is provided.

A high input impedance amplifier using a field effect transistor is usually used to amplify the received signal of the PIN-PD as described above, and its equivalent circuit is shown in FIG. In the figure, i, (ω) is the signal current of the PD, R4 is the internal resistance of the PD, R3 is the series resistance of the PD, and C8 is the capacitance of r'D, which is the sum of the junction capacitance 1c and the distributed capacitance CC. , an external circuit corresponding to the input section of the amplifier is represented by a load resistance RL and a capacitance CL. Note that the series resistance R5 of the PD is generally small and can be ignored.

The signal output power P appearing at the load resistance 1 of this external circuit
! lL is C=C4+CL=Cj +(:, +(:LRL R
Represented by L. In order to increase this signal output power PSL and lower the minimum reception level restricted by the signal-to-noise ratio, reduce the equivalent capacitance 1c, increase the load resistance RL within the allowable range of the frequency characteristics 1 used, and increase the internal It is desirable to make it close to the resistance R0.

Further, FIG. 5 is a schematic cross-sectional view showing one conventional example of MSM-PD, in which 31 is a semi-insulating GaAs substrate, 32 is a low concentration n-type GaAs layer 1, and 33 and 34 are, for example, aluminum (
This is a Schottky contact electrode using AI), and the electrodes 33 and 34 are patterned in an alternately intricate comb shape.

This MSM-PD has a horizontal surface structure and is easy to integrate into an IC, but since it uses a Schottky barrier, the height of the barrier that governs the dark current is approximately l the forbidden band width of GaAs.
, and the dark current is large.

[Problem that the invention seeks to solve]

As mentioned above, one possible measure on the PIN-PD side to increase the signal output power and lower the minimum reception level is to reduce the capacitance C8.

Of the capacitance C1 of the PIN-PD, there is a limit to the reduction of the junction capacitance Cj. On the other hand, in the conventional PIN-PD, the capacitance of the bonding pad portion accounts for a large proportion of the distributed capacitance Cc, and it is necessary to reduce this.

Furthermore, there is a strong demand for reducing the distributed capacitance CC with a lateral P-N structure, suppressing dark current, and making it well suited for OIEIC.

[Means for solving problems]

The above problem is solved by providing a semiconductor substrate in which a laminated structure in which a light absorption layer is provided between an n-type semiconductor layer and a p-type semi-quaternary layer is provided on a semi-insulating semiconductor substrate, and the bottom layer of the laminated structure is n excluding
The n-type semiconductor layer and the p-type semiconductor layer do not absorb the light to be received, and the n-type region and the p! ! ! This problem is solved by the semiconductor light receiving device according to the present invention, in which a region is formed and ohmic contact electrodes are provided in each of the n-type region and the p-type region.

Note that the laminated structure is not limited to the p-4-n structure in which the n-type semiconductor layer, the light absorption layer, and the n-type semiconductor layer are each IN; It may also be a superlattice structure in which the layers are stacked in this order.

Further, the n-type semiconductor layer or the n-type semiconductor layer that is the bottom layer of the stacked structure may or may not absorb the light to be received.

[For production]

In the semiconductor light receiving device according to the present invention, for example, as in the embodiment shown in FIG. A laminated structure in which layer 3 is provided, and a high concentration impurity-introduced region 6 of one conductivity type and an opposite conductivity type impurity-introduced region 7 that face each other laterally and reach the lowest layer of this laminated structure from the surface of the semiconductor substrate.
and an ohmic contact electrode 8.9 in each region 6.7.

The laminated structure illustrated in FIG. 1 is a case in which the light absorption layer 3 is single, but the four impurity aH regions of the same conductivity type and the semiconductor layer are each integrated, and the light absorption layer 3 is sandwiched between them. Dap-
It has a 1-n structure. Note that the above-mentioned superlattice structure in which a plurality of semiconductor layers are laminated also corresponds to a structure in which these layers are superimposed.

Since the lateral dimension of this light absorbing layer 3 is usually much larger than its thickness, most of the electrons excited by the incident light in the light absorbing layer 3 and the regular tag drift to the n-type semiconductor layer and the n-type semiconductor layer. , operates in the same manner as the conventional example shown in FIG.

Therefore, the dark current can be significantly reduced compared to the above-mentioned MSM-PD, and the semiconductor substrate is semi-insulating,
Since the electrodes are located on the same plane, the distributed capacitance between the electrodes is significantly reduced compared to the conventional example shown in FIG.

Furthermore, as is clear from the figure, the horizontal surface structure has 0EI.
It is suitable for C conversion, and also suitable for bonding to other circuit boards as a single light receiving element.

〔Example〕

The present invention will be specifically explained below using examples.

FIG. 1 is a schematic perspective view of a first embodiment of the present invention. In the figure, 1 is a semi-insulating 1nP substrate, 2 is an n-type nP layer with impurity concentration I
4 is an i-type 1no, s+Gao, 47AS light absorption layer with a thickness of about μm, 4 is a p-type 1nP layer with an impurity concentration of, for example, IXIOcm-' and a thickness of about 0.5 to 1 μm, and 5 is a p-type 1nP layer with a thickness of about 0.5 μm, for example. The InP contact layer 6 is made of, for example, zinc (Zn) with a maximum impurity concentration of 1.5X10Il1cm-
The n-type impurity introduced region 7 is doped with silicon (Si) to a maximum impurity concentration of 1.5 x 10"cm-
8 is an electrode that makes ohmic contact with the p-type impurity region 6, and 9 is an n-type impurity doped region.
This is an electrode that makes ohmic contact with the type impurity introduced region 7.

In this example, the 1.1 to 1.65 μm band is the target of light reception,
The n-type 1nr' layer 2 and the p-type 1nP layer 4 do not absorb light in this band. In this embodiment, the semiconductor layer 2 on the semi-insulating substrate 1 side is of n-type, but a structure in which the conductivity types are exchanged can be similarly constructed.

Further, FIG. 2 is a schematic sectional view of a second embodiment of the present invention. In the figure, 11 is a semi-insulating GaAs substrate, 12a
,...,12n is, for example, the impurity concentration IX1018
cm-', to n-type with a thickness of about 10 nm lo, + 5
The 928 S layers 13a, . . . , 13n are non-doped i-type Ga A with a thickness of, for example, several LO nm.
The s light absorption layers 14a, ---, 14n have, for example, an impurity concentration of IX1018 cm-'', a p-type A1o, +, Ga., B□AsJW, and a thickness of about several tens of nanometers, and the layer 15 has a thickness of, for example, about 0. 5 μm GaAs contact layer, 16 an n-type impurity doped region with a maximum impurity concentration of, for example, about 1.5 x 10'8 cm-3, 17 an n-type impurity doped region with a maximum impurity concentration of, for example, about 1.5 x 10'101I1''; I8 is an electrode that makes ohmic contact with the n-type impurity introduced region 1G, and 19 is an electrode that makes ohmic contact with the n-type impurity introduced region 17.

In this example, the 0.8 μm band is the light receiving target, and the n-type Alo
, +5Gao, ozAsIl 12a etc. and p-type A
For lo, +nGao, ozAsIl14a, etc., compositions that do not absorb light in this band are selected.

Note that if a superlattice structure including a thin light absorption layer and n-type and p-type semi-thickness layers is used as in the second embodiment, the light receiving direction is not limited to the direction perpendicular to the semiconductor substrate but can be set to the lateral direction. is also possible.

In these embodiments, the capacitance of the electrode portion including the bonding pad is approximately 172 to 100% compared to the corresponding conventional example shown in FIG.
The signal output power has been reduced to 1/3, and a clear increase in signal output power and a reduction in the minimum reception level have been realized.

〔Effect of the invention〕

- As explained above, according to the present invention, the distributed capacitance and dark current are reduced, the signal output power is increased, and the minimum reception level is reduced, and the horizontal structure is suitable for 0EIC,
This will have a great effect on the progress of optical application systems such as optical communications.

[Brief explanation of the drawing]

Fig. 1 is a schematic perspective view of the first embodiment of the present invention, Fig. 2 is a schematic sectional view of the second embodiment, Fig. 3 is a schematic sectional view of the conventional example (PIN-PD), and Fig. 4 5 shows an equivalent circuit diagram including an external circuit, and FIG. 5 shows a schematic cross-sectional view of a conventional example (MSM-PD). In the figure, ① is a semi-insulating 1nP substrate, 2 is an n-type Tnl' layer, 3 is an i-type 1nGaAs light absorption layer, 4 is a p-type InP layer, 5 is an InP contact layer, 6.16 is a p-type impurity doped region , 7.17 is an n-type impurity doped region, 8.9.18, ■9 is an ohmic contact electrode, 11
are semi-insulating GaAs substrates, 12a, --..., 12n are n-type GaAs layers, 13
a,..., 13n are i-type GaAs light absorption layers, 14a
,..., 14n is a p-type AlGaAs layer, 15 is Ga
An As contact layer is shown. ：￥I 4 Afterwards, go to the μm column for the full profile diagram - PD)

Claims (1)

[Claims] The n-type semiconductor layer except for the bottom layer of the laminated structure is provided with a semiconductor substrate in which a laminated structure in which a light absorption layer is provided between an n-type semiconductor layer and a p-type semiconductor layer is provided on a semi-insulating semiconductor substrate. And the p-type semiconductor layer does not absorb the light to be received, and an n-type region and a p-type region are formed that reach from the surface of the semiconductor substrate to the bottom layer, and the n-type region and the p-type region are respectively A semiconductor light receiving device characterized by comprising an ohmic contact electrode.