JPS63216379A - Semiconductor device - Google Patents

Abstract

PURPOSE:To promote speeding up of a semiconductor device, by providing a region like a stripe that is in parallel with a hetero junction interface of a semiconductor layer and includes interface and by causing its region where carriers quantized in proportion to one dimension are generated to be used a channel and then by performing a switching operation after selecting a conductive path of the carriers at an electrode mounted in the vicinity of a junction. CONSTITUTION:A region 5 like a stripe that is in parallel with a hetero junction interface of a semiconductor layer including its interface is prepared and carriers quantized in the vertical direction to its interface at least are generated in the region 5 and a conduction path of the carriers is selected by controlling the distribution in the parallel direction to the interface of the carriers through electrodes 8A and 8B mounted in the vicinity of a junction of the region 5. For example, a non-doped i-type GaAs layer 2 and an n-type AlxGa1-xAs electron supply layer 3 perform epitaxial growth on a semi-insulation GaAs substrate 1. Its semiconductor substrate is mesa-etched and the channel region 5 like a stripe having a width about 0.1mum and the branched channel regions 5A and 5B having each its branched width of about 0.1mum are treated by patterning and then control electrodes 8A and 8B and the like are mounted.

Description

[Detailed Description of the Invention] [Summary] The present invention provides a channel having a striped region parallel to and including the heterojunction interface of a semiconductor layer, in which carriers in a quantized state quasi-one-dimensional are generated. By selecting the carrier conduction path using an electrode provided near the branch point and performing a switching operation, the speed of semiconductor devices is promoted.

[Industrial application field]

The present invention relates to a semiconductor device, and particularly to a new semiconductor device that uses high-mobility carriers in a one-dimensional or similar state as a channel and performs a switching operation by switching the channel.

The conventionally known high electron mobility field effect transistor (
HEMT) uses an electron gas made into a two-dimensional state by quantization as a channel, but the carriers of this electron gas are
By approaching the dimensional state, it is expected that semiconductor devices will be able to perform new operations with even higher mobility.

[Conventional technology]

A schematic side sectional view of an example of a conventional I (EMT) is shown in FIG. 3. In this conventional example, semi-insulating gallium arsenide (GaAs)
A non-doped i-type GaAs layer 22 and a highly impurity-concentrated n-type aluminum gallium arsenide (AlxGal-XAs) layer 23 having a lower electron affinity than the undoped i-type GaAs layer 21 are provided on the i21. 2
A two-dimensional electron gas 24 is formed near the heterojunction interface by the electrons that have transitioned to 2.

On this semiconductor substrate, source and drain electrodes 26 and 27 are provided.
and a gate electrode 28 are provided. Transistor operation is performed by controlling the areal density of the two-dimensional electron gas 24 in the Schottky depletion layer formed by the gate electrode 28, but this two-dimensional electron gas 24 has almost no reduction in mobility due to impurity scattering and, for example, when lattice scattering is reduced. It is used at a low temperature below 77°C, usually L ~ 10 x LO'cm2/V, s, e.g. 6
An electron mobility of approximately X 10'cm"/V,s can be obtained. This electron mobility is lower than the electron mobility in a GaAs single crystal doped with impurities, which is less than IX 10'cmF/V,s. This is a significantly higher value compared to .

[Problem that the invention seeks to solve]

As mentioned above, II E using two-dimensional electron gas as a channel
MT has the highest carrier mobility among conventional field effect transistors, and together with shortening of gate length, it is a typical example of increasing the speed of semiconductor devices.

However, there are limits to the miniaturization of patterns and shortening of gate length, and it is difficult to further increase carrier mobility through one-dimensional quantization or a state similar to this, and to concretely realize semiconductor devices with new functions. It is requested.

[Means for solving problems]

The problem is that a striped region parallel to and including the heterojunction interface of the semi-quadramid layer is provided, and carriers quantized at least in the direction perpendicular to the interface are generated in the region. This problem is solved by the semiconductor device of the present invention in which the distribution of the carriers in the direction parallel to the interface is controlled by an electrode provided near the branch point of the region to select the conduction path of the carriers.

[For production]

According to the present invention, the channel layer at the spatially separated doped heterojunction interface is formed into a narrow stripe shape, and in the direction perpendicular to the interface, it is quantized in the same way as a conventional two-dimensional electron gas, Even if the direction is not quantized, carriers with less scattering action similar to one-dimensional quantization, such as electron gas, are generated, and their mobility is made higher than that of conventional two-dimensional carriers.

In order to achieve one-dimensional quantization, the width direction of the stripe must be aligned with the Doe-Brogj wavelength of the carrier (approximately 30 nm in GaAs).
m) or less, and it is currently difficult to achieve this by pattern formation using lithography etching methods, etc., but it is possible to reduce the scattering effect and increase the mobility by setting it to about 10 times or less than the two-dimensional state. It is possible to increase.

In the present invention, for example, as in the embodiment shown in the schematic perspective view in FIG.
5B, and electrodes 8A and 8B are provided near the branch point. The energy level and the distribution of electron gas 4 in the channel region 5 of the cross section XX' of this semiconductor substrate and the channel regions 5A and 5B of the cross section YY' are calculated for the case where no voltage is applied between the electrodes 8A and 88. Figure 1(b), voltage ■.

The same figure (shown in C1) shows the case where .

That is, when no voltage is applied between the electrodes 8A and 8B, as shown in FIG. 2B, the distribution of the electron gas 4 within the channel region 5 is equal on the left and right sides, and it evenly flows into the branched channel regions 5A and 5B. On the other hand, the voltage ■ between electrodes 8A and 8B. In the state in which the electron gas 4 is added, the distribution of the electron gas 4 in the channel region 5 is concentrated on the 5A side, and flows only into the branched channel region 5A, as shown in FIG.

In this way, by controlling the distribution of the quasi-one-dimensional electron gas 4 in the channel width direction at the branch point, the number of branch paths through which the electron gas 4 is transmitted, or which branch path the electron gas 4 is conducted to, is selected. For example, high-speed switching operation is realized by using the voltage appearing on the resistor 9 as an output.

〔Example〕 The present invention will be specifically explained below using examples.

Figure 1 (al is a schematic perspective view of an embodiment of the present invention, Figure 1 (
b), (C1 is the energy level and electron gas of the channel region 5 on the cross section XX' and the channel regions 58 and 5B on the cross section YY' for the case where the control voltage vG is not applied and when it is applied, respectively. 4 distribution is shown.

In the figure, 1 is a semi-insulating GaAs substrate, 2 is an undoped i-type GaAs layer, and 3 is an n-type AlXGa layer doped with silicon (Si) to a concentration of about 2X10"cm-3.
,-.

As (x -0,3) electron supply layer, 4 is quasi-one-dimensional electron gas, 5.5A, 5B are channel regions, 6.7A, 7B
is an ohmic contact electrode made of, for example, AuGe/Au, 88 and 8B are control electrodes to be described later, and 9 is a resistor.

This example is manufactured, for example, as follows.

A non-doped i-type GaAs layer 2 is formed on a semi-insulating GaAs substrate 1 to a thickness of, for example, 0.5 to 1 μm by, for example, a molecular beam epitaxial growth method, and is made of n-type AlxGa+-xAs.
The electron supply layer 3 is epitaxially grown to a thickness of, for example, about 40 to 50 nm. This semiconductor substrate is mesa-etched to form a striped channel region 5 having a width of, for example, about 0.1 μm, and a striped channel region 5 having a width of, for example, about 0.1 μm. II
! Channel regions 5A and 5B of about m are patterned.

At the end of this channel region 5.58, 5B, for example, Si
with an energy of about 100 keV and a dose of I
After ion implantation to a degree of ffcm and activation heat treatment,
forming a type ohmic contact region (not shown);
For example, ohmic contact electrodes 6, 7B made of Ge/Au are provided and alloying heat treatment is performed.

Control electrodes 8A and 8B are placed near the positions where the channel region 5 branches into 5A and 5B using an electrode material, such as aluminum (
AI). One of these electrodes, for example electrode 8
A is used to keep the potential of the channel region constant with respect to the ohmic contact electrode 6, etc., and the other electrode 8
B performs the above control based on the potential difference between electrode 8A and electrode 8A.

Further, the resistor 9 is made of, for example, tungsten silicide (WS).
iX) was sputtered and patterned in argon (Ar) gas to which nitrogen (N2) was added.

The equivalent circuit of this example is shown in Figure 2, with 6.7A,
7B and 8B correspond to each electrode, R1 is a resistor 9, R1,
R5A% l'lsI! represents the resistance of each channel region. However, R5, R5A, and R2H are approximately equal, and R1 is larger than these.

By grounding the electrode 6 of this embodiment, voltages V and J are applied to the electrode 7A (Vs=O), and the voltage of the electrode 7B is output. When the voltage between the electrodes 8B and 8A is vG-0, current flows through both the channel regions 5A and 5B.

It becomes #0. If a negative voltage VG is applied to the other electrode 8B with respect to the electrode 8A to interrupt the current in the channel region 5B, V
. −■. Therefore, a switching operation is performed.

In this embodiment, for example, the electron mobility at a temperature of 77K is approximately I
A faster switching operation is realized than an equivalent circuit based on T2.

In the above embodiments, a GaAs-based semiconductor substrate is used and electrons are used as carriers, but the semiconductor material is GaAs/Al.
For example, InGaAs/In
It can be similarly applied to semiconductor substrates such as AlAs-based, and even when the carrier is used as a genuine bill, warmer and faster operation can be realized compared to its two-dimensional state.

〔Effect of the invention〕

As explained above, according to the present invention, by controlling the conduction path of carriers in a quantized state quasi-one-dimensional, the speed-up of semiconductor devices is further promoted by extremely high mobility, and, for example, next-generation electronic calculation It has a great effect on the system etc.

[Brief explanation of the drawing]

FIG. 1(a) is a schematic perspective view of an embodiment of the present invention, FIG.
FIG. 2 is an equivalent circuit diagram of the embodiment, and FIG. 3 is a schematic side sectional view of a conventional HEMT. In the figure, 1 is a semi-insulating GaAs substrate, 2 is a non-doped i-type GaAs layer, 3 is an n-type AlxGa+-xAs layer, 4 is an electron gas, 5.5A and 5B are channel regions 1. 6.7 is an ohmic contact electrode, 8A and 8B are control electrodes, and 9 is a resistor.

Claims (1)

[Claims] A striped region parallel to and including the heterojunction interface of the semiconductor layer is provided, and carriers quantized at least in a direction perpendicular to the interface are generated in the region, the region A semiconductor device characterized in that a conduction path of the carriers is selected by controlling the distribution of the carriers in a direction parallel to the interface by an electrode provided near a branch point of the carriers.