JPS63216176A - Computer aid design equipment - Google Patents

Abstract

PURPOSE:To prevent deterioration in solderability by forming a prescribed gap without any conductor between a net element while having only to input an external shape coordinate coordinate data of a wide pattern and forming a connection line between the net element of the same potential as the wide area pattern and the wide area pattern itself. CONSTITUTION:A cutout part 74 is formed around the net element 73 and it is connected to a connection line 76 with a wide area pattern 75and they are made equi-potential. The connection line 76 is formed to be a pattern to be crossed at the center point of the net element 73 along the coordinate axes of longitudinal/lateral orthogonal coordinates or rotated by 45 deg. each. In a printed board by etching, parts 75, 76, 73 are incorporated and air gap is formed among them. Thus, the heat at soldering is hardly delivered from the net element 73 to the wide area pattern 75. Thus, the solderability of automatic soldering is improved.

Description

[Detailed Description of the Invention] [Summary] In a computer-aided design (CAD) system that designs a power supply or ground pattern into a wide-area pattern while avoiding net elements such as lands, vias, and lines that constitute a circuit, By simply inputting the outline coordinate data of a wide area pattern, a predetermined gap with no conductor is formed between the net element and the wide area pattern, and a connection is established between the net element and the wide area pattern, which have the same potential. so that a line is formed.

[Industrial application field]

The present invention relates to a computer-aided design device for electrical circuits, and in order to reduce voltage drop on a printed board, the power line is made of a large conductor, and the unused part is made of a conductive surface at ground potential that also serves as a shield. This is intended to prevent a net element having the same potential as a wide-area pattern from being included in the pattern and thereby reducing solder adhesion.

[Conventional technology]

When designing the wiring pattern of a printed board, please refer to Figure 5 (a).
The final pattern may be created by generating a wide area pattern as shown in the same figure (bl) for the pattern of the net part such as l. (conductor pattern), signal line, etc., whereas the wide-area pattern is a wide power supply line for the purpose of reducing voltage drop, or a filled-in ground portion for the purpose of preventing noise generation.

When generating such a wide-area pattern using CAD, for example, by inputting the external coordinate data ■～■ and the internal coordinate data ■～■ as shown in FIG. land 72 (net element with potential different from
It is possible to generate a wide area pattern 75 that avoids the large area.

However, since the actual net is complicated as shown in Figure 5, depending on how the internal coordinate data is given, the wide area pattern and the pattern of the net part may intersect, or they may approach each other abnormally so that the required spacing cannot be secured. Sometimes. In this case, a design change is required, which is time-consuming.

Therefore, the inventors of the present invention have proposed that by first inputting only the external coordinate data ■ to ■ of a wide area pattern, the optimal internal coordinate data ■
～■ proposed a CAD system that automatically generates (Showa 61
“Computer-aided design device” filed on October 27, 2013). In this method, when external coordinate data of a wide-area pattern is given, a net part that is included inside is searched for, and the internal coordinates of the wide-area pattern are searched so that a predetermined distance can be maintained from the net (for example, a land). Generate data. For example, in the case of FIG. 6 (al), inner shape coordinate data 1 to 2 are generated with necessary intervals based on the coordinate data of the land 72.

To give an overview with reference to FIG. 8, first, a matrix lattice 91 (FIG. 7) with 1/2 inch spacing including lands and vias 93 in the center is formed. Note that the intervals between lands and vias are usually 1 inch, and the minimum width for forming a wide area pattern is 1/2 inch. Next, enlarge the net portion that constitutes lands, vias, lines, etc. to ensure that the gap a necessary to prevent crosstalk is, for example, 0.1 inch plus 1/4.
Then, it is checked whether there is a matrix center in the enlarged area, and if so, the matrix unit element with this center is made incapable of generating a wide area pattern. Next, check whether there is an element that can generate a wide area pattern within the area determined by the external coordinate data, and if so, mark it along the unit element of the matrix that makes it impossible to order a wide area pattern.
Create a closed loop. Next, it is determined whether the closed loop constitutes the outer shape of the wide area pattern, and if YES, the closed loop is enlarged by 1/4 inch, and if it forms the inner part, the closed loop is reduced by 1/4 inch. Next, the coordinates indicating each town in the expanded or contracted closed loop are collected over the entire outer coordinates of the wide area pattern, thereby obtaining desired inner coordinate data.

[Problem that the invention seeks to solve]

The above-described method is suitable for application when the land has a different potential from the wide-area pattern as shown in FIG. 6(a), and thereby a punched portion 74 without a conductor is formed to obtain the desired result. However, in the case of the land 73 of the same net as shown in FIG. 2(b), no punched portion is formed because the two are connected. In other words, only the hole 70 of the land 73 is left and integrated with the wide area pattern 75.

However, when the entire periphery of the land 73 is connected to the wide-area pattern 75 in this manner, the heat during automatic soldering escapes over a wide area toward the wide-area pattern, resulting in poor solder adhesion. The present invention attempts to improve this point.

c. Means for Solving Problems] FIG. 1 is a basic configuration diagram showing the CAD device of the present invention, which includes a workstation including a tablet 1 for inputting coordinate data, a display device 2 for displaying processing results, etc.; CPU of
(Central processing unit) 3 and MSU that stores its programs
(Main memory) Control unit including 4, existing wiring pattern data (input data) such as lands, vias, lines, etc. and CP
It consists of a data section including a magnetic disk device that stores the wide area pattern data and connection line data (output data) generated by U3.

[Effect]

FIG. 2 is an explanatory diagram conceptually showing the processing of the present invention by the CPU 3. (a) is a wide-area external pattern 71 generated by connecting the coordinate data ■■ inputted from the tablet j. (b) shows this wide area external pattern 71.
A net element such as a land that is included inside the net element 72.
73 and are punched patterns 74 generated such that they are electrically isolated from the large area pattern.

The external coordinates of this pattern 74 are the same as ① to ② in FIG. (C1 is the final wide-area pattern 75 generated by combining this punching pattern 74 and the external pattern of (a).Net element 7 in this pattern 75
No. 2.73 is the process of the above application. i.e. 72
is a different net element and has a different potential from the wide-area pattern 75, so it is electrically separated at the punched portion 74. 7
3 is the same net element, which must be at the same potential as the wide-area pattern 75, and in the process according to the aforementioned application, both are integrated.

In the present invention, a punched portion 74 is also provided around the net element 73.
, and are connected to the wide area pattern 75 by a connection line 76 to have the same potential. This connection line 76 connects two lines along the vertical, horizontal, and orthogonal coordinate axes to the net element 73 as shown in (d).
intersect at the center point of
Although it is easy to process by using a pattern in which the images are rotated by 200 degrees, other patterns may be used. In addition, Figure 2 (dl
In (e), the wide-area pattern 75 and the net element 73 are shown connected by a wiring 76, but this is for the sake of explanation (Figure 2 is actually a program, and if you explain it with the diagram, it will look like this) In a printed board manufactured by etching, 75, 76, and 73 are integrated, and there is a gap between them (no conductor, just the insulating substrate of the printed board).

By doing this, the heat during soldering will be transferred to the net element 73.
Since it becomes difficult for the light to be transmitted from the surface to the wide-area pattern 75, the adhesion of automatic soldering is improved.

〔Example〕

FIG. 3 is a specific example of the final pattern, and the net elements 72 and 73 in FIG. 2 are illustrated as lands.

77 is a via, and 78 is a normal signal line.

FIG. 4 shows an example of a program for generating such a pattern, which is applied to a printed board.

This program consists of steps 80 to 89, and step 80 creates and initializes a matrix. As explained in Fig. 7, this matrix is an array of lattices (unit elements) whose sides are half the distance between lands or vias (usually 1 inch), and the land or via is located at the center of one matrix lattice. It is set to be located at .

Next, in step 81, generation of a wide area pattern in matrix unit elements including other net elements is prohibited ("wide area generation prohibited setting"). Next, in step 82, this is also done for the same net element. Next, we will create a matrix lattice (
(step 83), and determines whether the set forms a punching pattern (step 84).
).

If it does not become a punching pattern, it is the outer shape data, but if it becomes a punching pattern, it is determined whether the lands or vias located inside the pattern are the same net (
Step 85). If it is the same network, connection processing is performed using a connection line. This is as explained in FIG. If the network is different, this connection process will not be performed. Step 85
．． After the processes up to 86 have been performed on all the wide area elements (step 87), the wide area outline pattern and the punching pattern are combined (step 88), and the wide area pattern and connection lines thus obtained are registered and displayed (step 88). Step 89).

〔Effect of the invention〕

As described above, according to the present invention, by simply inputting the external coordinate data of a wide-area pattern, internal coordinate data that creates the necessary spacing between elements of different nets is generated. Connection line data to make the same potential as the internal coordinate data forming the interval is automatically generated between the elements of the net, so it can be used over a wide area without deteriorating the soldering performance of the net. Patterns can be easily designed.

[Brief explanation of the drawing]

Fig. 1 is a basic configuration diagram of the present invention, Fig. 2 is an explanatory diagram of the principle of the present invention, Fig. 3 is a diagram showing a specific example of a wide area pattern of the present invention, and Fig. 4 is a diagram showing an embodiment of the present invention. Flowchart, Figure 5 is an explanatory diagram of the conductor pattern of the electric circuit, Figure 6 is the conventional C
FIG. 7 is an explanatory diagram of a wide-area pattern created by AD. FIG. 7 is an explanatory diagram of a matrix that divides the design surface into unit elements of the wide-area pattern. FIG. 8 is a flowchart showing the procedure for creating coordinate data. 75: Wide-area Turf of the present invention -N, (Fig.

Claims (1)

[Claims] A wiring pattern data section (5) in which net elements such as lands, vias, and lines constituting a circuit are stored in advance, and external coordinate data of a wide area pattern are inputted from an input section (1). Then, a wide area outline pattern (71) surrounded by the coordinate data is generated, the net elements (72, 73) included in the pattern are searched, and these net elements (
72, 73) around which there is no conductor.
a control unit (74) that generates internal shape coordinate data forming the pattern (74) and also generates data of a connection line (76) connecting the pattern (71) and the net element (73) of the same potential;
3, 4), and a generated wide area/connection line data section (in which the wide area pattern and connection line data obtained by combining the wide area external pattern and the punching pattern) are stored.
6) A computer-aided design device comprising: