JPS62131540A - Method of designing wiring of integrated circuit - Google Patents

Abstract

PURPOSE:To facilitate manual correction and addition of wirings conspicuously, by dividing a desired logic circuit into a plurality of macro elements, wiring the terminals of function cells belonging to the different macro elements, and wiring the terminals of the function cells belonging to the same macro elements. CONSTITUTION:On a semiconductor substrate 1, macro elements 2-6 are arranged. A function cell is arranged in each macro element. After all the function cells are arranged, a wiring pattern for the macro elements such as wiring 18 is determined so that the interconnection requirement between terminals of the function cells belonging to the different macro element 2 and 3 such as a terminal 14 and a terminal 15 is satisfied. After all the wiring patterns for the interconnection requirements for the different macro elements are determined, a wiring pattern in the macro elements such as a wiring 19 is determined so that the interconnection requirement between the terminals of the function cells in the same macro elements such as a terminal 17 is satisfied. Therefore, manual correction and additional of the wirings can be made very easy.

Description

[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to integrated circuits, and in particular to a wiring design method for macro-divided integrated circuits. [Prior Art] Conventionally, in the design of integrated circuits, If the circuit is large-scale, the desired logic circuit is divided into multiple macros, the board area is divided correspondingly, and the functional cells that make up each macro are relocated to the corresponding partial area of the board. After 7'C of wiring between the terminals of the functional cells in the macro, the wiring between the terminals of the functional cells that will be ported to a different macro! ! Achieve full-chip wiring.

[Problem that the invention seeks to solve]

In the conventional wiring design method described above, all the wiring between the macros is done after the internal wiring of the macros. In order to protect different macros, there is a high possibility that they are located very far apart within the chip, making it difficult for one person to do all the wiring between them.

Furthermore, in order to perform all the wiring between macros, it is necessary to store the wiring directly within the macro in the computer's memory as an area where all wiring cannot be done, which requires a huge amount of memory. The disadvantage is that it is safe to store them.

[Means for solving problems]

SUMMARY OF THE INVENTION It is an object of the present invention to provide a complete wiring design method that overcomes the above-mentioned drawbacks.

The present invention is designed to divide a desired Isobu circuit into a plurality of macros in the wiring design of an integrated circuit that determines the wiring between the nests of a plurality of functional cells by electronic calculation processing and realizes an integrated circuit having a desired logical function. The present invention is characterized in that after wiring is performed between terminals of functional cells belonging to different macros, wiring is performed between terminals of functional cells belonging to the same macro.

〔Example〕

Next, one aspect of the present invention will be explained with reference to the drawings.

FIG. 1 is a layout diagram completely explaining an embodiment of the present invention.

Macros 2 to 6 are arranged on a semiconductor substrate 1, and a functional cell is arranged in each macro. After placing all the Iso nF cells, for all connections between the terminals of functional cells that belong to different macros 2 and 3, such as terminals 14 and 15, connect between the macros like wiring +W18. Determine all wiring patterns. All wiring patterns are determined for connection requests that intersect between different macros.
After that, in each macro, terminal 16. In response to a connection request between terminals of functional cells belonging to the same macro, such as terminal 17, a wiring pattern within the macro, such as wiring 19, is determined.

〔Effect of the invention〕

As explained above, in the present invention, the entire logic circuit is divided into a plurality of macros, the board area is divided correspondingly, and the functional cells constituting each macro are placed in the corresponding partial area of the board. All the wiring between the terminals of the functional cells that end with the same macro has been completed, and there are wiring requests within each macro that cannot be wired due to computer processing. This makes it easier to modify and add wiring by obtaining it, and it also makes it easier to modify and add wiring when wiring between macros. Has the effect of requiring less storage space〇

[Brief explanation of drawings]

FIG. 1 is a schematic plan view of a divided design of an integrated circuit for explaining one embodiment 1j of the present invention. 1...Semiconductor base number, 2-6...Group/Macro, 1
0-13...Function cell, 14-17...
・Signal input/output position (terminal), 18, 19... Wiring. Agent: Susumu Uchihara, Patent Attorney

Claims (1)

[Claims] In the integrated circuit wiring design method, which determines the wiring between the terminals of multiple functional cells by computer processing and realizes an integrated circuit with a desired logic function, a desired logic circuit is divided into multiple macros and different macros are created. A wiring design method for an integrated circuit, characterized in that wiring is performed between terminals of functional cells within the same macro after wiring is performed between terminals of functional cells to which the macro belongs.