JPS63211944A - Supervisory control circuit for digital recovery repeater - Google Patents

Abstract

PURPOSE:To surely receive a control signal by giving an output of a timing component extraction circuit of a digital recovery repeater to an input of a peak detection circuit and connecting the output of the peak detection circuit to an input of a control signal reception circuit. CONSTITUTION:An output signal of an equalizing amplifier circuit 1 is given to a 1st input of the identification recovery circuit 2 and a input of a timing component extraction circuit 4 of a timing circuit 3. The output of the timing component extraction circuit 4 is connected to the input of a timing wave generating circuit 5 and a peak detection circuit 5. The output of the timing wave generating circuit 5 of the timing circuit 3 is connected to the 2nd input of the said identification recovery circuit 2. Moreover, the output of the peak detection circuit 6 is connected to the input of the control signal reception circuit. A signal D outputted to an output line 10 of the peak detection circuit 6 represents the signal detecting the peak of the signal C and the control signal A is accurately demodulated.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a monitoring control circuit for a digital regenerative repeater.

[Prior Art] A conventional monitoring and control circuit for this type of digital regenerative repeater is shown in FIG.

FIG. 3 is a configuration diagram showing an example of a monitoring control circuit of this type of digital regenerative repeater. The output 11 of the control signal receiving circuit 7 is connected to the input of the control signal receiving circuit 7.

The control signal receiving circuit 7 receives the control signal transmitted from the terminal station after identifying and reproducing the control signal.

FIG. 4 is an explanatory time chart of FIG. 3. F indicates an example of the control signal transmitted from the terminal station, G and H indicate the third
An example of a control signal input to the control signal receiving circuit 7 shown in the figure is shown, where G indicates a case where the control signal is received normally, H indicates a case where a code error occurs due to deterioration of the transmission path, and ■ indicates a bit of a code error.

[Problems to be solved] The conventional digital regenerative repeater monitoring and control circuit described above is
Since the system is configured to receive the control signal that has been identified and reproduced, there is a drawback that if a code error occurs due to deterioration of the transmission path as shown in H in FIG. 4, the control signal cannot be received.

[Means for Solving Problems] The present invention has been made to solve the above-mentioned conventional problems. In the monitoring control circuit for a digital regenerative repeater, the second output of the timing component extraction circuit is connected to the input of the peak detection circuit, and the output of the peak detection circuit is connected to the input of the control signal receiving circuit. The configuration is connected to the

[Example] Embodiments of the present invention will be described below based on the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a time chart for explaining FIG.

The output signal of the equalization amplifier circuit 1 is connected to a first input of an identification/regeneration circuit 2 and an input of a timing component extraction circuit 4 of a timing circuit 3. The output of the timing component extraction circuit 4 is connected to the inputs of a timing wave generation circuit 5 and a peak detection circuit 6. The output of the timing wave generating circuit 5 of the timing circuit 3 is connected to the second input of the identification reproducing circuit 2. Further, the output of the peak detection circuit 6 is connected to the input of the control signal receiving circuit.

A in FIG. 2 is an example of a control signal transmitted by a terminal station, and B
is the transmission signal modulated by the control signal, and represents the signal output to the output line 8 of the equalization amplifier circuit l.
sl indicates the presence of a transmission signal, 52 indicates the absence of a transmission signal, C indicates a signal output to the output line 9 of the timing component extraction circuit 4, T1 indicates the presence of a timing component, and T2 indicates no timing component. D represents a signal output to the output line 10 of the peak detection circuit 6, and indicates a peak-detected signal of the signal C, and it can be seen that the control signal A has been demodulated.

Therefore, the control signal can be received up to the state of the transmission path where the timing component can be extracted from the transmission signal without depending on the code error of the transmission signal.

[Effects of the Invention] As explained above, the present invention connects the output of the timing component extraction circuit of the digital regenerative repeater to the input of the peak detection circuit, and connects the output of the peak detection circuit to the input of the control signal reception circuit. Therefore, there is an effect that the control signal can be received until the state of the transmission path is such that the timing component can be extracted from the transmission signal without depending on the code error of the transmission signal.

[Brief explanation of the drawing]

Fig. 1 is a block diagram showing an embodiment of the present invention, Fig. 2 is an explanatory time chart of Fig. 1, Fig. 3 is a block diagram showing a conventional example, and Fig. 4 is an explanatory time chart of Fig. 3. It is a chart. 3: Timing circuit 4: Timing component extraction circuit 5: Timing wave generation circuit 6: Peak detection circuit 7: Control signal reception circuit

Claims (1)

[Claims] In a monitoring control circuit for a digital regenerative repeater having a timing circuit in which a first output of a timing component extraction circuit is connected to an input of a timing wave generation circuit, a second output of the timing component extraction circuit is connected to an input of a peak detection circuit. A monitoring control circuit for a digital regenerative repeater, characterized in that the output of the peak detection circuit is connected to the input of a control signal receiving circuit.