JPH0618382B2 - Phase change method - Google Patents

Description

DETAILED DESCRIPTION [Overview] In an in-service monitoring system for a repeater, a second identification circuit is provided on the output side of the intra-repeater identification circuit, and a phase modulation is performed on a clock signal input to the second identification circuit. Is performed so that the bit error rate characteristic is not adversely affected.

[Industrial application field]

The present invention relates to an improvement of a phase modulation system of an in-service monitoring system that transmits monitoring information for monitoring a code error rate of an optical repeater to a terminal station by phase modulation of a main transmission clock signal.

In the above phase modulation method, it is desirable that the code error rate characteristic is not adversely affected even when the alignment jitter is accumulated by multi-relay transmission.

[Conventional technology]

FIG. 3 is a block diagram of a conventional example, and FIG. 4 is a time chart of waveforms at various parts in FIG. 3, and (A), (B), and (C) correspond to points a, b, and c in FIG. . FIG. 5 is a waveform diagram of repeater monitoring information according to an example of the phase transmission method.

In the figure, 1 is an identification circuit, 2 is a timing circuit, and 3 is a phase modulation circuit.

The digital signal sent to the repeater has a blunt wave system due to the bandwidth of the equalizing amplifier for optimizing the S / N of the discrimination point in the discrimination circuit 1, and at the input of the discrimination circuit 1, As shown in FIG. 4A, the waveform of the eye pattern is generated with noise generated on the receiving side.

The timing circuit 2 extracts the clock from this waveform,
The clock indicated by the solid line in FIG. 4 (B) is output.

For example, monitoring information of a digital signal transmitted from a repeater to a terminal station as shown in FIG. 5 (A) is shown in FIGS. 5 (B) and (C) by ASK (amplitude shift keying) modulation of 21 KHz subcarrier. So, 0 is DC, 1 is 21K
It becomes a signal in which a sine wave of Hz is superimposed and is input to the phase modulation circuit 3 in FIG. 3, and when it is 1, the phase of the clock signal is changed from +15 degrees to −15 degrees as shown in FIG. 5 (D). Apply phase modulation.

Therefore, the time waveform of the clock at point b in FIG.
In the case of, the rising point moves continuously between B and C as shown in FIG. 4 (B). When the discrimination circuit 1 discriminates 0 or 1 at the rising point of the phase-modulated clock, the output becomes phase-modulated data as shown in FIG. It is transmitted to the terminal station. In this case, the phase of the data signal when the monitoring information is 1 is as shown in FIG.

[Problems to be solved by the invention]

However, the identification point when the phase modulation is not performed is the point A in FIG. 4, and even if the eye pattern opening is wide and there is some jitter, a code identification error does not occur. When the point is moved to a point, the eye pattern is identified in a narrow opening, and the influence of noise is large, and there is a problem that the code error rate characteristics are adversely affected when alignment jitter is accumulated by multi-repeater transmission.

[Means for solving problems]

The above problem is caused by using the timing circuit (2) for extracting a clock from the digital signal sent from the transmission line and the clock extracted by the timing circuit, and using the digital signal 1,0 of the digital signal sent from the transmission line. A first discrimination circuit (1), a phase modulation circuit (3) for inputting the clock extracted by the timing circuit, and outputting a clock phase-modulated by a modulation signal, and the first discrimination circuit (1) The signal identified in 1) is identified by the output clock of the phase modulation circuit (3) and is solved by the phase modulation method of the present invention including the second identification circuit (4) that outputs phase-modulated data. It

[Action]

According to the present invention, the noise of the waveform identified by the first identification circuit (1) using the output clock of the timing circuit (2) is removed, and the case of 1 sandwiched between 0 and 1 sandwiched between 1s. 0
In the case of, a signal having a rectangular waveform is discriminated by the second discriminating circuit (4) using a clock obtained by phase-modulating the output clock of the timing circuit (2) by the phase modulating circuit (3), Outputs phase-modulated data.

That is, the signal input to the second discrimination circuit (4) has no noise and has a rectangular waveform in the case of 1 sandwiched between 0s and in the case of 0 sandwiched between 1s. Even if the identification is performed, the identification sensitivity does not change and there is no noise. Therefore, even when the multi-relay transmission is performed and the alignment jitter is accumulated, the bit error rate characteristic is not adversely affected.

〔Example〕

FIG. 1 is a block diagram of an embodiment of the present invention, and FIG. 2 is a time chart of waveforms of respective parts in FIG.
This corresponds to points a to e in the figure.

Reference numeral 4 in the drawing denotes an identification circuit, and the same reference numerals denote the same functions throughout the drawings.

The difference between FIG. 1 and FIG. 3 is that in the discrimination circuit 1, the output of the timing circuit 2 is the clock of the main transmission line shown in FIG. 2B and the input signal shown in FIG. Is input to the identification circuit 4 and the identified waveform shown in FIG. 2 (C) which has a rectangular shape without noise is input to the identification circuit 4 and the output signal of the timing circuit 2 is phased. The modulation circuit 3 discriminates by the clock shown in FIG. 2 (D), which is phase-modulated as described above with reference to FIGS. 5 (A) to (D),
This is the point that the output of the discrimination circuit 4 is set to phase-modulated data as shown in FIG.

That is, since the waveform input to the discrimination circuit 4 is a rectangular waveform without noise as shown in FIG. 2C, the clock of the output of the timing circuit 2 is phase-modulated by the phase modulation circuit 3 and the discrimination point Since the identification sensitivity does not change and there is no noise even when the signal moves from point d to point h, there is no adverse effect on the code error rate characteristics even when multi-repeater transmission is performed and alignment jitter accumulates. .

〔The invention's effect〕

As described in detail above, according to the present invention, in order to transmit the monitoring information of the repeater to the terminal station, when the identification is made by the phase-modulated clock signal, when the multi-relay transmission is performed and the alignment jitter is accumulated. However, there is an effect that the bit error rate characteristic is not adversely affected.

[Brief description of drawings]

FIG. 1 is a block diagram of an embodiment of the present invention, FIG. 2 is a time chart of waveforms of respective parts of FIG. 1, FIG. 3 is a block diagram of a conventional example, and FIG. 4 is a waveform of respective parts of FIG. A time chart, FIG. 5 is a waveform diagram of repeater monitoring information according to an example of the phase transmission method. In the figure, 1 and 4 are identification circuits, 2 is a timing circuit, and 3 is a phase modulation circuit.

 ─────────────────────────────────────────────────── ─── Continuation of the front page (72) Inventor Kiyoyuki Koike 1015 Kamiodanaka, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (72) Inventor, Takashi Miyazaki 1015, Kamedotachu, Nakahara-ku, Kawasaki City, Kanagawa Prefecture, Fujitsu Limited (56) References JP-A-55-92047 (JP, A) JP-A-57-44358 (JP, A) JP-A-57-501981 (JP, A)

Claims (1)

[Claims] 1. A phase modulation system of an in-service monitoring system for superimposing monitoring information of a repeater on the main signal by phase modulation of the main signal and transmitting the superposed signal to a terminal station, which is transmitted to the repeater from a transmission line. A timing circuit (2) for extracting a clock from the received digital signal, and a first identification circuit (1) for identifying 1,0 of the digital signal sent from the transmission line by using the clock extracted by the timing circuit ( 1), a phase modulation circuit (3) for inputting the clock extracted by the timing circuit and outputting a clock phase-modulated by a modulation signal, and a signal identified by the first identification circuit for the phase modulation circuit. A phase modulation system comprising a second discrimination circuit (4) for discriminating with an output clock and outputting phase-modulated data, and transmitting the output of the second discrimination circuit to the terminal station.