JPS63205962A - Mos type thin-film transistor - Google Patents

Abstract

PURPOSE:To enhance the response performance by a method wherein a channel region is formed on a poly-Si active layer and specific impurities inside a layer containing said impurities as a diffusion source to the active layer are doped at a low concentration after the formation of a thermal oxide film on the layer. CONSTITUTION:A poly-Si active layer 2 is formed on an insulating substrate 1. Then, a PSG film 3 is coated; an oxide film 4 composed of SiO2 is formed on said film. Due to the heat generated during the formation of the film 4, N-type impurities from the PSG film 3 are doped into the layer 2 at a low concentration and are transformed into an N<-> type. This oxide film 4 is used as gate oxide films 5 and forms a gate part (film 5 and gate electrodes 6). Then, P<+> is diffused by using PSG, and source-drain regions 7 are formed. Then, interlayer insulating films 8 and electrode wiring parts 9 are formed.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a MOS type thin film transistor used in a driving device for a 1-magnification image sensor, a liquid crystal driving device, or the like.

[Prior art]

In general, high-speed response is most important for thin film transistors (hereinafter referred to as TPTs), which are densely arranged on a large-area insulating substrate and drive 1-magnification image sensors, liquid crystal displays, and the like. Usually, the semiconductor film that constitutes the active layer of TPT is an a-8i:H film or a poly-5L film.
A poly-3i film, which has a higher carrier mobility than an a-Si:H film, is used in the past when high switching speed is required. but.

When using such a poly-Si film, poly
-3i due to grain boundaries and crystal defects, TPT's I
off increases, resulting in I on/I off of 3
There is a problem in that the switching characteristics are reduced by several orders of magnitude, making it impossible to obtain good switching characteristics. In addition, the grain boundaries and crystal defects of poly-Si can cause carrier traps at the insulating film-active layer interface and inside the active layer, and the threshold value (
This has the problem of causing instability of the threshold voltage (v th).

One of the ways to solve these problems is to
It is common to lightly dope the channel region of the ly-5L film with impurities such as B, P, and As to about 10"/aJ. Conventionally, in a normal process using a Si wafer, this channel doping is Ion implantation with good controllability is used.This ion implantation ionizes and extracts impurities such as P and B, and then applies an appropriate acceleration voltage to form poly-Si.
The problem is that the equipment for this purpose is very expensive. Furthermore, a TPT formed on an insulating substrate as described above has a problem in that charge-up is likely to occur due to ion implantation, resulting in a decrease in implantation efficiency and a decrease in the characteristics of the TPT.

For this reason, methods of doping impurities using solid phase thermal diffusion or vapor phase diffusion are also being considered.

When these methods are used, it is difficult to set the concentration of the diffusion source, the doping tends to exceed a predetermined concentration, and the uniformity is also poor, making it difficult to put it into practical use.

[Purpose] The present invention solves the above-mentioned conventional problems, and enables the production of polyimide on an insulating substrate without using ion implantation.
-3i active layer is lightly doped, I on/I o
The object of the present invention is to provide an MO3 type TPT that has a high ff, high-speed response, and can stabilize the threshold voltage.

〔composition〕

In the MO3 type TPT of the present invention, the channel region of the transistor is formed on a poly-Si active layer and is lightly doped with the impurity in a layer containing a specific impurity as a diffusion source by forming a thermal oxide film thereon. It is characterized by:

The invention will now be described with reference to the accompanying drawings.

FIG. 1 shows a C-MOS inverter constructed from TPT, and a 1x optical sensor drive circuit is constructed using such a C-MOS inverter. TPT has a MOS structure, and an insulating substrate 1 (for example, quartz)
A poly-5L active layer 2 lightly doped with a specific impurity of about 10"/c# is formed thereon. Here,
The process of lightly doping the poly-Si active layer 2 with a specific impurity will be explained with reference to FIG. In Figure 2,
A second poly-Si active layer 2 is formed on the insulating substrate 1.
(See Figure (a)) 1. Next, apply a PSG film 3 (when lightly doping with N-type impurities; conversely, use BSG when lightly doping with P-type impurities) (see Figure 2 (b)), An oxide film 4 made of SiO□ is formed on this (
(See Figure 2(c)). By heating during the formation of the oxide film 4, N-type impurities from the PSG film 3 are lightly doped into the poly-Si active layer 2, becoming N-. This oxide film 4 is used as a gate oxide film 5 to form a gate portion (gate oxide film 5, gate electrode 6) (see FIG. 2(d)).
. Next, perform P° diffusion using BSG.

Source/drain regions 7 are formed (see FIG. 2(e)). After that, according to the usual method, the interlayer insulation @8 is reduced to C, VD.
After forming the contact hole and forming the electrode wiring 9, an enhanced p-C
h MOS TFT is obtained.

In addition, in the above explanation, instead of PSG coating in the step (b) of FIG. 2, BSG coating was performed, and as shown in FIG.
If PSG is used to form the source/drain region 7 of N-diffusion, an enhanced type (normally off) n-c
hMO5TFT will be obtained.

Furthermore, by performing P'' diffusion using BSG to form the source/drain regions 7 (FIG. 2(b)), a depletion type (normally on) p-ch MO5TFT can be obtained. -ch MOS
TF:T can also be easily formed by selecting lightly doped impurities and diffusion impurities when forming source/drain regions.

As described above, in the present invention, a coated SiO□ film (PSG or BSG) containing B or P is formed on the poly-Si active layer 2, and specific impurities in this Si2 film are removed using the coated SiO□ film (PSG or BSG). □ Since the poly-Si active layer 2 is lightly doped by heating when forming the thermal oxide film 4 formed on the film, p.

The amount of specific impurity doped into the 1y-Si active layer depends on the film thickness of PSG or BSG' (coating type SiO By appropriately selecting the film thickness or the heating conditions during thermal oxide film formation, the pol
It becomes possible to uniformly and lightly dope the y-Si active layer to a very low concentration, for example, about 10''/aJ.

〔effect〕

According to the present invention as described above, a predetermined channel region in a poly-Si active layer can be lightly doped without using an expensive ion implantation device, and the I off value of each transistor can be reduced and the threshold voltage can be reduced. C-MO with improved stability and significantly improved switching characteristics.
This has the effect that STFTs can be manufactured efficiently.

[Brief explanation of the drawing]

FIG. 1 is a plan view and a cross-sectional view of a C-MOS TFT according to the present invention. FIG. 2 is a process explanatory diagram showing an example of manufacturing a MOS TFT according to the present invention. 1... Insulating substrate 2... Poly-5L active layer 3... PSG film 4... Oxide film 5...
Gate oxide film 6... Gate electrode 7... Source
Drain region 8... Interlayer insulating film 9... Electrode wiring Atsushi 1 Figure 2

Claims (1)

[Claims] 1. In a MOS type thin film transistor, the channel region of the transistor is light doped with the impurity in a layer containing a specific impurity as a diffusion source formed on a poly-Si active layer by further forming a thermal oxide film thereon. A MOS thin film transistor characterized by: