JPS63203070A - Video circuit - Google Patents

Video circuit

Info

Publication number
JPS63203070A
JPS63203070A JP62034502A JP3450287A JPS63203070A JP S63203070 A JPS63203070 A JP S63203070A JP 62034502 A JP62034502 A JP 62034502A JP 3450287 A JP3450287 A JP 3450287A JP S63203070 A JPS63203070 A JP S63203070A
Authority
JP
Japan
Prior art keywords
signal
memory
written
video
case
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62034502A
Other languages
Japanese (ja)
Inventor
Tadashi Ochiai
落合 忠
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu General Ltd
Original Assignee
Fujitsu General Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu General Ltd filed Critical Fujitsu General Ltd
Priority to JP62034502A priority Critical patent/JPS63203070A/en
Publication of JPS63203070A publication Critical patent/JPS63203070A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04NPICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00Details of television systems
    • H04N5/222Studio circuitry; Studio devices; Studio equipment
    • H04N5/262Studio circuits, e.g. for mixing, switching-over, change of character of image, other special effects ; Cameras specially adapted for the electronic generation of special effects
    • H04N5/2628Alteration of picture size, shape, position or orientation, e.g. zooming, rotation, rolling, perspective, translation

Abstract

PURPOSE:To display a picture data at a normal attitude even by a video software formed while being turned by 90 deg. by writing a digital picture data of a video signal into a memory and making the order of write different from the order of read from the memory by 90 deg.. CONSTITUTION:An input video signal is separated into a luminance signal and a chrominance signal by a video processing circuit 4, converted into a time series serial signal by a multiplexer 5, digitized and written in a buffer memory 7. A picture data read from the memory 7 is written in an odd number field memory 9 by a field switching circuit 8. In this case, the signal is written longitudinally from the right to the left. In case of reading a signal from the memory 9, it is read sequentially from a direction different from the write direction by 90 deg., that is, from the left to the right and from the upper to the lower direction. Thus, in case of inputting a BCG signal obtained from a field switching circuit 11, D/A converters 12-14 and a matrix 15 to the CRT, a pattern turned right by 90 deg. is reproduced. The processing above is applied entirely similarly as to an even number of fields.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、画面の表示態様を90度回転させて表示させ
るようにした画像回路に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image circuit in which the display mode of the screen is rotated by 90 degrees.

〔従来技術〕[Prior art]

従来のテレビ受信機或いはモニタ等は、縦横の比がう対
4の横に長い表示画面である。ところが、カムコーダ(
カメラ一体型VCR)の使用時に90度回転させて製作
したビデオソフトは横に寝た画像となるために、これ、
を再生する場合、小型のテレビ受信機等ならば横長を縦
長に置き換えて見ることができるが、大型のテレビ受信
機ではこのようなことはできない。
A conventional television receiver or monitor has a horizontally long display screen with an aspect ratio of 4:4. However, the camcorder (
When using a camera-integrated VCR), video software created by rotating the camera 90 degrees will result in an image lying on its side.
When playing back a small television receiver, it is possible to change the landscape orientation to portrait orientation, but this is not possible with a large television receiver.

〔発明の目的〕[Purpose of the invention]

本発明の目的は、90度回転させた画像を縮小して画面
に表示できるようにして、上記したように90度回転さ
せて作成したビデオソフトでも正常姿勢で表示できるよ
うにすることである。
An object of the present invention is to enable an image rotated by 90 degrees to be reduced and displayed on a screen, so that even video software created by rotating the image by 90 degrees as described above can be displayed in a normal posture.

〔発明の構成〕[Structure of the invention]

このために本発明は、映像信号をA/D変換した画像デ
ータをメモリに一旦書き込んで、該メモリからの読出順
序を書込みの順序と90度異ならせて構成した。
For this purpose, in the present invention, image data obtained by A/D converting a video signal is once written into a memory, and the order of reading from the memory is made 90 degrees different from the order of writing.

〔実施例〕〔Example〕

以下、本発明の実施例について説明する。第1図はその
一実施例の映像回路のブロックを示す図である。1はN
TC3方式の複合映像信号が入力する入力端子、2はそ
の複合映像信号から同期信号を取り出して全体回路を制
御する制御回路3に送る同期処理回路である。4は映像
処理回路であり、ここにおいてY/C分離、つまり輝度
信号と色信号が分離される。そして、そこで得られた輝
度信号Y、色差信号R−Y、B−Yはマルチプレクサ5
に送られて、直列の時系列信号に変換される。そして、
この直列信号はA/D/換回路6でデジタル信号に変換
されてから、バッファメモリ7に書き込まれる。このバ
ッファメモリ7は2本のラインメモリで成り、一方が書
込みモードの時は他方が続出モードとなる。そしてここ
に一時的に書き込まれた輝度信号や色差信号のデータは
、フィールド切換回路8により、フィールドメモリ9或
いは10に書き込まれる。このフィールドメモリ9.1
0も一方が書込みモードのとき他方が読出モードとなっ
て、フィールド切換回路11で選択されて出力され、輝
度信号、色差信号のデータが個別にD/入入換換器12
〜14アナログ信号に変換され、マトリックス回路15
で原色信号RGBとなってから出力される。
Examples of the present invention will be described below. FIG. 1 is a block diagram of a video circuit according to one embodiment. 1 is N
An input terminal 2 to which a TC3 system composite video signal is input is a synchronization processing circuit that extracts a synchronization signal from the composite video signal and sends it to a control circuit 3 that controls the entire circuit. 4 is a video processing circuit in which Y/C separation is performed, that is, a luminance signal and a color signal are separated. The luminance signal Y, color difference signals R-Y, B-Y obtained there are sent to the multiplexer 5.
and is converted into a serial time-series signal. and,
This serial signal is converted into a digital signal by an A/D/conversion circuit 6 and then written into a buffer memory 7. This buffer memory 7 consists of two line memories, and when one is in the write mode, the other is in the continuous write mode. The data of the luminance signal and color difference signal temporarily written here is written into the field memory 9 or 10 by the field switching circuit 8. This field memory 9.1
When one of the zeros is in the write mode, the other is in the read mode, and is selected and output by the field switching circuit 11, and the luminance signal and color difference signal data are individually transferred to the D/input switch 12.
~14 is converted into an analog signal and sent to the matrix circuit 15
The primary color signals are converted into RGB signals and then output.

さて、元の画像のデータは、例えば奇数フィールドにつ
いてみれば、第2図に示すように、第一ライン、第3ラ
イン、・・・、第2n+1ラインの順序で送られてくる
が、これをA/D変換器6でデジタル信号に順次変換す
る。このA/D/換時、サンプリング周波数をfsc(
副搬送波)の約2.5倍ニ選べば、1走査線上のサンプ
リング点はNTSC方式で有効水平走査率を0.835
とした場合、475点となる。また、垂直走査率を0.
945とした場合、実効走査線数は合計で496本であ
る。つまり、水平方向のサンプリング点は走査線数に近
い数となる。
Now, for example, if we look at the odd field, the original image data is sent in the order of the 1st line, 3rd line, ..., 2n+1th line, as shown in Figure 2. The A/D converter 6 sequentially converts the signals into digital signals. During this A/D/conversion, the sampling frequency is set to fsc(
If you select approximately 2.5 times the subcarrier), the sampling point on one scanning line will have an effective horizontal scanning rate of 0.835 in the NTSC system.
In this case, it will be 475 points. Also, set the vertical scanning rate to 0.
In the case of 945, the effective number of scanning lines is 496 in total. In other words, the number of sampling points in the horizontal direction is close to the number of scanning lines.

そして、上記したようにデジタルデータとなった画像デ
ータは、バッファメモリ7の一方のラインメモリに書き
込まれ、この書込み途中において他方に既に書き込まれ
ている前のラインの画像ブタが読み出されて、フィール
ド切換回路8により奇数フィールドのフィールドメモリ
9に書き込まれる。
Then, the image data that has become digital data as described above is written to one line memory of the buffer memory 7, and during this writing, the image data of the previous line that has already been written to the other line is read out. The field switching circuit 8 writes the data into the field memory 9 of the odd field.

この時の書込みは、第3図にメモリマツプを表示画面に
模して示すように、縦方向に右側から左側に向けて書き
込まれる。よってこれにより、左半分に元画の画面(但
しインタレス)のデータが90度回転した位置状態で書
き込まれる。フィールドメモリ9の続出は、書込み順序
の方向と90度異なる方向から読み出される。つまり第
2図の左から右の方向に上から下に向けて順次読み出さ
れる。よって、フィールド切換回路11、D/A変換器
12〜14、マトリクス15を経由して得られたRGB
信号をCRT (図示せず)に入力すれば、90度右に
回転した画面が再生されるようになる。この場合、再生
画像は元画の縦横比に対応して、画面の左半分に表示(
はぼ1/2の面積となる)すれば、左に第3図に示すよ
うに余白Aが残るが、ここには別のデータを表示できる
。以上は、偶数フィールドについても全く同様である。
Writing at this time is performed vertically from the right to the left, as shown in FIG. 3, where the memory map is imitated on the display screen. Therefore, the data of the original screen (interlaced) is written in the left half at a position rotated by 90 degrees. Successive entries in the field memory 9 are read from a direction 90 degrees different from the direction of the writing order. That is, they are read out sequentially from left to right in FIG. 2, from top to bottom. Therefore, the RGB obtained via the field switching circuit 11, the D/A converters 12 to 14, and the matrix 15
If the signal is input to a CRT (not shown), a screen rotated 90 degrees to the right will be reproduced. In this case, the reproduced image is displayed on the left half of the screen according to the aspect ratio of the original image (
If this is done, a margin A will remain on the left as shown in Figure 3, but other data can be displayed here. The above is exactly the same for even fields.

なお、フィールドメモリ9.10に書き込むデータの順
序を第4図に示すように下から上に左側から右側に順次
行えば、第2図の場合と逆に左側に90度回転した画像
がCRTから再生されるようになる。
Note that if the data is written in the field memory 9.10 sequentially from bottom to top and from left to right as shown in Figure 4, an image rotated 90 degrees to the left will be output from the CRT, contrary to the case in Figure 2. It will now be played.

また、上記ではフィールドメモリへの書込み順序を画面
を90度回転させるような順序で行ったが、書込み順序
は左から右に上から下方向に行ない、続出を90度回転
して行うようにすることもできる。即ち、このフィール
ドメモリにおいて、書込み順序と続出順序を画面再生状
態で90度異ならせればよい。また、上記では輝度信号
と色差信号の段階でデジタル処理しているが、マトリク
処理してRGB信号にしてから同様に処理することもで
きる。更に、以上ではフィールド単位で構成したが、フ
レーム単位で構成することもできる。
In addition, in the above, the writing order to the field memory was performed in such an order that the screen was rotated 90 degrees, but the writing order is performed from left to right, top to bottom, and successive entries are performed by rotating the screen 90 degrees. You can also do that. That is, in this field memory, the writing order and the successive writing order may be made to differ by 90 degrees in the screen reproduction state. Further, although digital processing is performed at the luminance signal and color difference signal stages in the above example, it is also possible to perform matrix processing to convert the signals into RGB signals and then process them in the same manner. Further, although the configuration is made in field units in the above example, it can also be configured in frame units.

〔発明の効果〕〔Effect of the invention〕

以上から本発明によれば、入力画像情報の画面を90度
回転して表示することができるので、カムコーダを90
度回転させて得たビデオソフトをCRT画面の右側或い
は左側に正常な姿勢で再生することができる。また、こ
の場合は90度回転させた画面の残りの部分が余白とな
るので、その部分に別の情報を表示するともできる。
As described above, according to the present invention, since the screen of input image information can be rotated 90 degrees and displayed, the camcorder can be rotated 90 degrees.
Video software obtained by rotating the CRT screen can be played back in its normal position on the right or left side of the CRT screen. Furthermore, in this case, the remaining part of the screen rotated 90 degrees becomes a blank space, so other information can be displayed in that part.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の映像回路の回路図、第2図は元画の画
面説明図、第3図はフィールドメモリへの画像データ書
込みの説明図、第今図は別の例の画像データ書込みの説
明図である。
Fig. 1 is a circuit diagram of the video circuit of the present invention, Fig. 2 is an explanatory diagram of the screen of the original image, Fig. 3 is an explanatory diagram of writing image data to the field memory, and Fig. 3 is an illustration of writing image data in another example. FIG.

Claims (1)

【特許請求の範囲】[Claims] (1)、映像信号をA/D変換した画像データをメモリ
に一旦書き込んで、該メモリからの読出順序を書込みの
順序と90度異ならせたことを特徴とする映像回路。
(1) A video circuit characterized in that image data obtained by A/D converting a video signal is once written into a memory, and the order of reading from the memory is made 90 degrees different from the order of writing.
JP62034502A 1987-02-19 1987-02-19 Video circuit Pending JPS63203070A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62034502A JPS63203070A (en) 1987-02-19 1987-02-19 Video circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62034502A JPS63203070A (en) 1987-02-19 1987-02-19 Video circuit

Publications (1)

Publication Number Publication Date
JPS63203070A true JPS63203070A (en) 1988-08-22

Family

ID=12416028

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62034502A Pending JPS63203070A (en) 1987-02-19 1987-02-19 Video circuit

Country Status (1)

Country Link
JP (1) JPS63203070A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6380982B1 (en) * 1997-10-16 2002-04-30 Fujitsu Limited Video signal processing circuit and computer system
US6628342B2 (en) 2000-01-05 2003-09-30 Matsushita Electric Industrial Co., Ltd. Video signal processing apparatus
US7038668B2 (en) * 2000-10-16 2006-05-02 Nec Corporation Picture displaying apparatus, which does not require a calculating circuit, when the screen saver function is attained, and a method of driving the same

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6380982B1 (en) * 1997-10-16 2002-04-30 Fujitsu Limited Video signal processing circuit and computer system
US6621523B2 (en) 1997-10-16 2003-09-16 Fujitsu Limited Video signal processing circuit and computer system
USRE40327E1 (en) * 1997-10-16 2008-05-20 Toshiro Obitsu Video signal processing circuit and computer system
USRE42296E1 (en) * 1997-10-16 2011-04-19 Dosa Advances Llc Video signal processing circuit and computer system
US6628342B2 (en) 2000-01-05 2003-09-30 Matsushita Electric Industrial Co., Ltd. Video signal processing apparatus
US7038668B2 (en) * 2000-10-16 2006-05-02 Nec Corporation Picture displaying apparatus, which does not require a calculating circuit, when the screen saver function is attained, and a method of driving the same

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