JPH05173530A - Multiinput video signal display device - Google Patents

Abstract

PURPOSE:To superimpose and display plural video pictures by plural video signals which are mutually asynchronous on the picture of a personal computer without deterioration. CONSTITUTION:This device is constituted by providing plural video signal input terminals, a personal computer signal input terminal 20 for inputting a personal computer signal from the personal computer 18, a video signal output terminal 24, plural picture processing means 26, 28 and 30 which digitize the video signals (1)-(3) inputted in plural video signal input terminals 12, 14 and 16 so as to perform picture working processing and scanning conversion processing, a priority decision circuit 42 which decides the priority of plural video data in which picture is reduced/enlarged and scanning-conversion processed by the means 26, 28 and 30 and decides the priority of a signal obtained by making the video data analog and the personal computer signal and outputs the decided result to the video signal output terminal 24, and a monitor 44 connected to the terminal 24; and the picture of the personal computer and the plural video pictures are superimposed and displayed by the monitor 44.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION The present invention provides a monitor coupled to a computer, such as a personal computer.
Display the screen based on the video signal from the computer and the screen based on the video signal in a superimposed manner (super import
The present invention relates to the improvement of the multi-input video signal display device.

[0002]

2. Description of the Related Art Conventionally, a multi-input video signal display device of this type has a slot (for example, a video card slot) provided on the back side of a personal computer (hereinafter simply referred to as a personal computer) body or a personal computer. An image processing unit (for example, a video card) is inserted and connected to a slot of an expansion unit coupled to the main body, and an NTSC video signal from a TV broadcasting station or a TV camera or VTR is connected to a video signal input terminal of this image processing unit. The video signal from the (video tape recorder) is input, and the video image of this video signal is superimposed on the personal computer image of the personal computer and displayed on the monitor of the personal computer.

At this time, the image processing unit was formed as follows. That is, the board is provided with a video signal input terminal, a video signal output terminal and a bus coupling terminal, and the video signal input to the video signal input terminal is further digitized on this board to reduce the display screen and display position. Image processing means for performing an image processing process for instructing and a scan conversion process for converting a scanning frequency, and a personal computer via a signal and an analog signal of the video data processed by the image processing device and a bus coupling terminal. Switching control means for switching the video signal from the video signal to the video signal output terminal and outputting the video signal to the video signal output terminal. Then, a single monitor connected to the video signal output terminal side of the image processing unit is designed to display a video image of a predetermined size in a superimposed manner at a predetermined position of a personal computer image.

[0004]

However, the conventional image processing unit has only one video signal input terminal for inputting a video signal, and the video signal from the personal computer is supplied to the image processing unit via the bus connection terminal. Since it is configured to be input to the computer, it is impossible to superimpose and display a plurality of video images on the personal computer image using the image processing unit.

A device is also known in which a plurality of video images are superposed and displayed on a personal computer image.
Since it was designed to synchronize multiple video signals and input them to a personal computer, it is not possible to superimpose and display multiple video images from multiple video devices that do not have sync terminals on the personal computer image. There was a problem.

The present invention has been made in view of the above-mentioned problems, and it is possible to superimpose and display a plurality of video images by a plurality of asynchronous video signals on a personal computer image.
Moreover, it is an object of the present invention to provide a multi-input video signal display device in which the display screen is not deteriorated.

[0007]

A multi-input video signal display device according to the present invention includes a plurality of video signal input terminals for inputting a plurality of video signals and a computer for inputting a video signal from a computer. A video signal input terminal, a bus coupling terminal for coupling with the bus of the computer, a video signal output terminal, and a video signal input to each of the plurality of video signal input terminals to reduce the display screen by digitizing the video signal. A plurality of image processing means for performing an image processing process for instructing enlargement or a display position and a scan conversion process for converting a scanning frequency, and a priority order of a plurality of video data processed by these image processing means are set. The video signal output terminal determines the priority order of the analog signal of the video data and the computer signal input to the video signal input terminal. And a monitor coupled to the video signal output terminal. The monitor superimposes a screen based on a computer signal and a plurality of video screens based on a plurality of video signals. It is characterized by doing so.

[0008]

The control command from the computer is supplied to the device through the bus connection terminal. Video signals input to a plurality of video signal input terminals are digitized by corresponding image processing means, respectively, image processing for reducing / enlarging the display screen and designating a display position, and scanning for converting the scanning frequency. A conversion process is performed.

Next, the priority order determination circuit determines the priority order of the plurality of video data processed by the plurality of image processing means, and the analog signal of the video data and the computer signal input terminal. The priority of the computer signal input to is determined and output to the video signal output terminal.

Therefore, the monitor superimposes a screen based on the computer signal input from the computer to the computer signal input terminal and a plurality of screens based on the video signals input to the plurality of video signal input terminals. indicate.

[0011]

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of a multi-input video signal display device according to the present invention will be described below with reference to the drawings. FIG. 1 shows a schematic configuration diagram of the present invention, in which reference numeral 10 is a substrate. The board 10 is provided with first, second and third video signal input terminals 12, 14, 16 and a personal computer (hereinafter simply referred to as a personal computer) 18 as an example of a computer. A personal computer signal input terminal 20 for inputting a video signal from the personal computer, and the personal computer 18
A bus coupling terminal 22 for coupling with the bus 21 and a video signal output terminal 24 are provided.

On the substrate 10, the first, second and third
Image for digitizing video signals input to the video signal input terminals 12, 14, 16 and performing image processing for reducing / enlarging the display screen and designating a display position and scanning conversion processing for converting the scanning frequency Processing means 26, 28,
30 and a BF (buffer) for temporarily storing the video data processed by these image processing means 26, 28, 30.
32, 34, 36, and a D / A (digital / analog) conversion circuit 38 commonly connected to the output side of these BFs 32, 34, 36 are provided.

The substrate 10 is further provided with the D / A.
A changeover switch circuit 40 for switching between the output signal of the (digital / analog) conversion circuit 38 and the personal computer signal input to the personal computer signal input terminal 20 and outputting it to the video signal output terminal 24, and a priority determination circuit 42. Is provided.

The priority determining circuit 42 is controlled by a control command input from the personal computer 18 via the bus 21 and the bus connecting terminal 22 to generate the BF 32, 34, 3
6 determines which of the video data in 6 is to be output to the D / A conversion circuit 38 with priority, and the changeover switch circuit 40 causes the video signal from the D / A conversion circuit 38 and the personal computer signal input terminal. It is determined which of the personal computer signals from 20 is to be output to the video signal output terminal 24 with priority. A monitor (for example, a CRT display) 44 as an output device is coupled to the video signal output terminal 24.

The connection relationship between the personal computer 18 shown in FIG. 1 and the personal computer signal input terminal 20, the bus coupling terminal 22, and the video signal output terminal 24 is specifically a slot (eg, a slot) formed on the back side of the personal computer 18 body. It is formed by inserting and connecting a substrate 10 (for example, a video card) equipped with image processing means 26, 28, 30 into a slot of an expansion unit connected to a personal computer 18 and a video card slot.

The image processing means 26 is specifically constructed as shown in FIG. That is, the AGC (automatic gain control) circuit 5 is connected to the first video signal input terminal 12.
0, A / D (analog / digital) conversion circuit 52, Y
/ C (luminance signal / color signal) separation circuit 54, AFC (automatic frequency control) circuit 56, clock conversion circuit 58 and R
The GB matrix circuits 60 are sequentially connected. An image memory 6 is provided on the output side of the RGB matrix circuit 60.
The BF 32 is connected via 2 and the output side of the BF 32 is connected to one input side of the analog switch circuit 64 via the D / A (digital / analog) conversion circuit 38.

A timing signal transmission line 66 and a personal computer signal transmission line 68 are coupled to the personal computer signal input terminal 20, and the timing signal transmission line 66 is coupled to the timing signal side of the video signal output terminal 24 to provide the video signal. The signal transmission line 68 is coupled to the other input side of the analog switch circuit 64 via an amplifier 70. The output side of the analog switch circuit 64 is coupled to the video signal side of the video signal output terminal 24.

The bus coupling terminal 22 has a FIFO (Fi
A microcomputer 74 is connected via an rst-In First-Out circuit 72, and a memory controller 78 is connected to the microcomputer 74 via a serial bus 76. The serial bus 76 is the Y / C separation circuit 54,
It is coupled to the control terminals of the AFC circuit 56, the clock conversion circuit 58, and the RGB matrix circuit 60.

A sync separation circuit 80 is coupled to the output side of the AGC circuit 50. The sync separation circuit 80 is connected to the WVSYNC terminal of the microcomputer 74 and the memory controller 7.
A sync signal is output to the write system VSYNC terminal of No. 8. The timing signal output from the Y / C separation circuit 80 is configured to be input to the WFLD terminal of the microcomputer 74 and the FLD and CLK terminals of the write system of the memory controller 78. The AFC circuit 56
The timing signal output from the memory controller is the memory controller.
It is configured to be input to the write system HSYNC terminal of the LA 78.

The timing signal transmission line 66 is connected to the read CLK terminal of the memory controller 78, VS.
It is coupled to the YNC and HSYNC terminals. Based on a control command from the personal computer 18, the microcomputer 74 outputs a priority control signal to the priority determination circuit 42, and the memory controller 78 outputs a memory control signal to the image memory 62. A control signal for switching (video image / personal computer image) is output to the priority determination circuit 42.

The priority order determination circuit 42 prioritizes the control terminals of the BFs 32, 34 and 36 and the analog switch circuit 64 on the basis of the priority order control signal and the (video image / personal computer image) switching control signal. It is configured to output the decision signal.

The image processing means 28 and 30 are constructed similarly to the image processing means 26. It is slightly different that the microcomputers constituting the image processing means 28 and 30 are not provided with a configuration for outputting a priority control signal. The FIF of the image processing means 28, 30
The bus coupling terminal 22 is coupled to the input side of the O circuit, and the personal computer signal input terminal 2 is coupled to the timing signal transmission line.
The zero timing signal transmission line 66 is coupled.

Further, the memory controller of the image processing means 28, 30 is configured to output a (video image / personal computer image) switching control signal to the priority order determining circuit 42. , 30 BF34, 3
The output side of 6 is coupled to the input side of the D / A conversion circuit 38.

Next, the operation of the above embodiment will be described with reference to FIG. (B) The video signal input to the first video signal input terminal 12 is converted into a digital signal by the A / D conversion circuit 52, separated into the Y signal and the C signal by the Y / C separation circuit 54, and the AFC circuit 56, Clock conversion circuit 58 and R
It is written in the image memory 62 via the GB matrix circuit 60.

(B) At this time, the control command from the personal computer 18 is input to the microcomputer 74 via the bus coupling terminal 22 and the FIFO 72, and the Y / C separation circuit 54 and the AFC are sent from the microcomputer 74 via the serial bus 76. The control signal is input to the circuit 56, the clock conversion circuit 58, the RGB matrix circuit 60 and the memory controller 78, and the synchronization signal from the synchronization separation circuit 80 is input to the write system timing signal input terminal of the memory controller 78. , Y / C separation circuit 54 timing signal and AF
Since the timing signal from the C circuit 56 is input, predetermined image processing processing and scan conversion processing are performed.

(C) That is, a process of varying the reduction ratio / enlargement ratio of the display screen is performed by the conversion of the sampling frequency by the clock conversion circuit 58. In addition, the writing of the digital video signal to the image memory 62 is performed by the first writing control by the memory controller 78.
This is performed in synchronization with the sync signal of the video signal input to the video signal input terminal 12.

(D) Next, the digital video signal is read from the image memory 62 by the read control by the memory controller 78 and is temporarily stored in the BF 32. At this time, a control command from the personal computer 18 is input to the microcomputer 74 via the bus coupling terminal 22 and the FIFO 72, a control signal is input from the microcomputer 74 to the memory controller 78 via the serial bus 76, and the memory is also stored. Since the timing signal from the personal computer 18 input through the personal computer signal input terminal 20 is input to the timing signal input terminal of the lead system of the controller 78, the predetermined image processing processing and scan conversion processing are performed. Done.

(E) That is, the memory controller 78
Display screen reduction rate /
Processing for varying the enlargement ratio is performed. Further, a digital video signal is read out from the image memory 62 in synchronization with the synchronization signal of the personal computer signal input to the personal computer signal input terminal 20. Therefore, the video signal is converted into a scanning frequency that matches the scanning frequency of the personal computer signal and is temporarily stored in the BF 32.

(F) Second and third video signal input terminals 1
Similar to the video signal input to the first video signal input terminal 12, the video signals input to 4 and 16 are subjected to predetermined image processing processing and scan conversion processing, and the corresponding BF3.
4 and 36 are temporarily stored.

(G) The priority order determination circuit 42 receives the priority order control signal from the microcomputer 74, the image processing means 26,
B based on the (video image / personal computer image) switching control signal from the corresponding memory controller in 28 and 30.
It is determined which output of F32, 34, and 36 has priority, and which input of the analog switch circuit 64 has priority.

(H) For example, when the priority order control signal from the microcomputer 74 corresponds to the priority mode 0 in FIG.
The order of priority is the first, second and third video signal input terminals 12,
In the order of the video signals input to 14 and 16, and when the priority mode 3 in FIG. 3 is supported, the priority order is the second,
The order of the video signals input to the third and first video signal input terminals 14, 16 and 12 is in order. In the priority mode 0, the monitor 44 displays a screen in which a video image by a video signal is superimposed on a personal computer image as shown in FIG. 4, and the video image is in the priority mode.
It is displayed with the priority of 0.

In the above embodiment, the case where three video images of three video signals are superimposed and displayed on the personal computer image has been described, but the present invention is not limited to this, and a plurality of video signals other than three. Needless to say, it can be used for displaying a plurality of video images by superimposing on a personal computer image.

[0033]

As described above, the multi-input video signal display device according to the present invention comprises a plurality of video signal input terminals, a computer signal input terminal, a bus coupling terminal and a video signal output terminal, and a plurality of video signal input terminals. Image processing is performed on the video signal input to the video signal input terminal of, and the priority order of the plurality of image-processed video data is determined,
It is equipped with a priority order decision circuit that decides the priority order of the decided signal and the computer signal input to the computer signal input terminal and outputs it to the video signal output terminal. With such a monitor, it is possible to superimpose and display a screen based on a computer signal and a plurality of video screens based on a plurality of video signals.

In addition, the video signals input to the plurality of video signal input terminals are digitized to perform image processing for reducing / enlarging the display screen and designating the display position, and scan conversion processing for converting the scan frequency. Since the plurality of image processing means are provided, the plurality of video signals input to the plurality of video signal input terminals are not synchronized with each other, and / or these plurality of video signals are supplied from the computer. -Multiple screens can be displayed in a synchronized manner on the same monitor even if they are not synchronized with the monitor signal. That is, a monitor of a computer (for example, a personal computer) can synthesize and display a plurality of asynchronous video images on a screen (for example, a personal computer image) of the computer.

In addition, the video signals input to the plurality of video signal input terminals are subjected to image processing by the corresponding image processing means and output to the video signal output terminal through the priority order determining circuit. There is no part that deteriorates.

[Brief description of drawings]

FIG. 1 is a schematic configuration diagram showing an embodiment of a multi-input video signal display device according to the present invention.

FIG. 2 is a block diagram showing a specific example of a part of FIG.

FIG. 3 is an explanatory diagram illustrating an operation of a priority order determination circuit of FIG.

FIG. 4 is an explanatory diagram illustrating a display example of the monitor in FIG.

[Explanation of symbols]

10 ... Board, 12, 14, 16 ... Video signal input terminal, 18 ... Personal computer (an example of computer), 20 ... PC signal input terminal (an example of computer signal input terminal), 22 ... Bus coupling terminal, 24 ... video signal output terminal, 26, 28, 30 ... image processing means, 32, 34, 36
BF (buffer), 40 ... Changeover switch circuit, 42 ... Priority order determination circuit, 44 ... Monitor, 58 ... Clock conversion circuit, 62 ... Image memory, 64 ... Analog switch circuit, 74 ... Microcomputer, 78 ... Memory controller ..

Claims (1)

[Claims] 1. A plurality of video signal input terminals for inputting a plurality of video signals, a computer signal input terminal for inputting a video signal from a computer, and a bus of the computer. The video signal input to each of the bus coupling terminal, the video signal output terminal, and the plurality of video signal input terminals is digitized to reduce the display screen.
A plurality of image processing means for performing an image processing process for instructing enlargement or a display position and a scan conversion process for converting a scanning frequency, and a priority order of a plurality of video data processed by these image processing means are set. A priority order determination circuit that determines the priority order of the analog signal of the video data and the computer signal input to the video signal input terminal and outputs the priority signal to the video signal output terminal; A multi-input image characterized by comprising a monitor connected to the output terminal, and by using this monitor, a screen based on a computer signal and a plurality of video screens based on a plurality of video signals are superimposed and displayed. Signal display device.