JPS63200398U

JPS63200398U -

Info

Publication number: JPS63200398U
Application number: JP9040187U
Authority: JP
Priority date: 1987-06-11
Filing date: 1987-06-11
Publication date: 1988-12-23

Description

[Brief explanation of the drawing]

第１図は本考案による一実施例の分解斜視図、
第２図は第１図の組立てた状態を示す一部破断斜
視図、第３図は従来技術による分解斜視図、第４
図は第３図の組立てた状態を示す一部破断斜視図
である。図において、１は金属ケース、１ａは底部、１
ｂは内壁、１ｂ―１は溝、１ｃは接続用端子、２
は金属蓋、３は回路基板（セラミツク基板）、３
ａはスルホール、３ｂは接地用ランド、４は混成
集積回路、５は金属仕切板、５ａは取付ピンを示
す。 FIG. 1 is an exploded perspective view of an embodiment of the present invention;
2 is a partially cutaway perspective view showing the assembled state of FIG. 1, FIG. 3 is an exploded perspective view of the prior art, and 4.
This figure is a partially cutaway perspective view showing the assembled state of FIG. 3. In the figure, 1 is the metal case, 1a is the bottom, 1
b is the inner wall, 1b-1 is the groove, 1c is the connection terminal, 2
is a metal lid, 3 is a circuit board (ceramic board), 3
3b is a grounding land, 4 is a hybrid integrated circuit, 5 is a metal partition plate, and 5a is a mounting pin.

Claims

[Scope of utility model registration request]

Hybrid integrated circuits to be shielded are placed in a box-shaped metal case 1 with an open top, and metal partition plates 5 are installed for each block.
A single circuit board 3 separated and mounted is housed with both ends of the metal partition plate 5 connected to the case inner wall 1b, and the case opening is sealed with a metal lid 5. Shield structure.