JPS63198406A - Broad band fm modulator - Google Patents

Broad band fm modulator

Info

Publication number
JPS63198406A
JPS63198406A JP2983687A JP2983687A JPS63198406A JP S63198406 A JPS63198406 A JP S63198406A JP 2983687 A JP2983687 A JP 2983687A JP 2983687 A JP2983687 A JP 2983687A JP S63198406 A JPS63198406 A JP S63198406A
Authority
JP
Japan
Prior art keywords
frequency
output
signal
frequency divider
divider
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2983687A
Other languages
Japanese (ja)
Inventor
Shigeru Ikegishi
池岸 茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Information Systems Ltd
Hitachi Shonan Denshi Co Ltd
Original Assignee
Hitachi Information Systems Ltd
Hitachi Shonan Denshi Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Information Systems Ltd, Hitachi Shonan Denshi Co Ltd filed Critical Hitachi Information Systems Ltd
Priority to JP2983687A priority Critical patent/JPS63198406A/en
Publication of JPS63198406A publication Critical patent/JPS63198406A/en
Pending legal-status Critical Current

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  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)

Abstract

PURPOSE:To improve the frequency stability over a broad band by controlling a frequency division ratio of each variable frequency divider for a frequency shift keying (FSK) signal generating circuit and a PLL loop depending on the setting. CONSTITUTION:A reference signal from a reference oscillator 12 is processed by fixed frequency dividers 13, 14, 5, a variable frequency divider 6 and an LPF 7 to form a frequency shift signal, which is synthesized with a reference signal through the fixed frequency divider 10 and an LPF 11 by a frequency synthesizer 8, becomes an FSK signal subject to frequency modulation via a BPF 9 and fed to a phase comparator 19 of a PLL provided with the variable frequency divider 17 in the feedback loop. The frequency division ratio of the frequency divider 17 and the frequency divider 6 is controlled via an arithmetic unit 21 depending on the setting from a frequency setting input terminal 20 and the frequency shift of the frequency modulation wave is subject to automatic control corresponding to the output frequency. As a result, the frequency stability over the broad band is improve and the modulation characteristic is improved.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は周波数変調(FM)器に係り、特に周波数範囲
の拡大、周波数の安定度、変調特性に好適なPLL方式
を使用した広帯域周波数変調器に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a frequency modulator (FM) device, and in particular, wideband frequency modulation using a PLL method suitable for expanding the frequency range, frequency stability, and modulation characteristics. Concerning vessels.

[従来の技術] 従来この種の変調器としては、特開昭61−71706
号公報に記載されているように基準発振器の発信出力を
分周する第1の分周器の出力に接続された可変位相器の
出力を分周する第2の分周器と、i!電圧制御発振器出
力を分周する第3の分周器の出力とを前記第2の分周器
の出力の位相を比較する位相器の不要波を除去して電圧
制御発振器の制御入力に接続するローパスフィルタを用
いたPLL方式を使用した変調器には(1)電圧制御発
振器に直接変調をかける、(2)基準発振器に直接変調
をかける等の構成が採用されている。しかしながら前記
の構成では、広帯域に動作させた場合の周波数の偏移量
の変化には配慮されていなかった。
[Prior Art] Conventionally, this type of modulator is disclosed in Japanese Patent Application Laid-Open No. 61-71706.
a second frequency divider that divides the output of the variable phase shifter connected to the output of the first frequency divider that divides the oscillation output of the reference oscillator as described in the i! Compare the phase of the output of the second frequency divider with the output of a third frequency divider that divides the output of the voltage controlled oscillator, remove unnecessary waves of the phase shifter, and connect to the control input of the voltage controlled oscillator. Modulators using a PLL system using a low-pass filter employ configurations such as (1) applying direct modulation to a voltage controlled oscillator, and (2) applying direct modulation to a reference oscillator. However, in the above configuration, no consideration was given to changes in the amount of frequency shift when operating in a wide band.

[発明が解決しようとする問題点コ 上記従来技術は周波数偏移の点について配慮がされてお
らず、設定周波数毎に周波数偏移が変化してしまうと云
う問題があった。
[Problems to be Solved by the Invention] The above-mentioned prior art does not take into account the frequency shift, and there is a problem in that the frequency shift changes for each set frequency.

本発明の目的は設定周波数に限らず周波数偏移量が一定
で、さらに周波数安定度の高い周波数変調装置を提供す
ることにある。
An object of the present invention is to provide a frequency modulation device in which the amount of frequency deviation is constant regardless of the set frequency and has high frequency stability.

[問題点を解決するための手段] 上記目的は、基準周波数発振器と前記基準周波数発振器
の出力を分周する第1の分周器と前記第1の分周器の出
力の不要波を除去する第1の濾波器と前記基準信号発振
器と前記第1の濾波器の出力と、前記基準信号発振器の
出力とを合成する周波数合成器と前記周波数合成器の出
力のうち和または差のどちらかの信号成分を選択する第
2の濾波器と、l!電圧制御発振器前記電圧制御発振器
の出力を分周する第2の分周器と前記第2の分周器の出
力の位相を比較する位相検波器と前記位相検波器の出力
の不要波を除去しそれを前記電圧制御発振器の制御入力
に接続する濾波器とを含み、前記第1と第2の分周比を
同時に変えることにより位相比較器に接続される基準入
力信号をFM変調し、さらに帰還ループにて設定した分
周比に合わせ、前記のFM変調する周波数偏移量を変化
させることにより、達成される。
[Means for solving the problem] The above object is to remove unnecessary waves from the output of a reference frequency oscillator, a first frequency divider that divides the output of the reference frequency oscillator, and the first frequency divider. a first filter, the reference signal oscillator, a frequency synthesizer that combines the output of the first filter, and the output of the reference signal oscillator; and a sum or difference of the outputs of the frequency synthesizer. a second filter for selecting signal components; and l! a voltage controlled oscillator; a second frequency divider that frequency divides the output of the voltage controlled oscillator; a phase detector that compares the phase of the output of the second frequency divider; and a phase detector that removes unnecessary waves from the output of the phase detector. a filter connecting the reference input signal to the control input of the voltage controlled oscillator; FM modulating the reference input signal connected to the phase comparator by simultaneously changing the first and second frequency division ratios; This is achieved by changing the amount of frequency deviation for FM modulation according to the frequency division ratio set in the loop.

[作 用] 本発明のFM変調器は、基準とするFM変調の偏移量の
調整を安定なFM変調出力を帰還ループの分周比と等し
い値で分周し、前記の分周されたFM変調出力を基準信
号と合成し、前記の分周されたFM変調出力と基準信号
との和、または差の信号を選別することにより電圧制御
発振器より出力される信号は、前記の基準信号の分周比
倍に前記の高安定なFM変調出力を加算又は減算したも
のとなり、分周比に比例した周波数を有するFM変調出
力が得られると共に、前記FM変調出力の周波数偏移は
分周比に影響されることが無く常に一定となる。
[Function] The FM modulator of the present invention adjusts the amount of deviation of the reference FM modulation by dividing the stable FM modulation output by a value equal to the frequency division ratio of the feedback loop. The signal output from the voltage controlled oscillator by combining the FM modulation output with the reference signal and selecting the sum or difference signal between the frequency-divided FM modulation output and the reference signal is the same as the reference signal. It is obtained by adding or subtracting the above-mentioned highly stable FM modulation output to the frequency division ratio times, and an FM modulation output having a frequency proportional to the frequency division ratio is obtained, and the frequency deviation of the FM modulation output is It remains constant without being influenced by.

[実施例] 以下、本発明の一実施例を第1図に基づいて説明する。[Example] An embodiment of the present invention will be described below with reference to FIG.

第1図は本発明によるFSに変調器の実施例を示すブロ
ック図である0図において1は変調入力端子、2はDフ
リップフロップ、3,4はナントゲート、5は固定分周
器、6は可変分周器(第1の分周器)7はローパスフィ
ルタ、8は周波数合成器、9はバンドパスフィルタ、1
0は固定分周器、11はローパスフィルタ、12は基準
発振器、13、14は固定分周器15はローパスフィル
タ、16は電圧制御発振器、17は可変分周器、18は
出力端子、19は位相比較器、20は周波数設定入力端
子、21は固定減算器をそれぞれ示している。
FIG. 1 is a block diagram showing an embodiment of a modulator for FS according to the present invention. In FIG. 1, 1 is a modulation input terminal, 2 is a D flip-flop, 3 and 4 are Nant gates, 5 is a fixed frequency divider, is a variable frequency divider (first frequency divider) 7 is a low-pass filter, 8 is a frequency synthesizer, 9 is a band-pass filter, 1
0 is a fixed frequency divider, 11 is a low-pass filter, 12 is a reference oscillator, 13 and 14 are fixed frequency dividers, 15 is a low-pass filter, 16 is a voltage controlled oscillator, 17 is a variable frequency divider, 18 is an output terminal, and 19 is a A phase comparator, 20 a frequency setting input terminal, and 21 a fixed subtractor, respectively.

前記基準周波数発振器12の発振周波数fBは、固定分
周器13.14によりそれぞれ1/A、1/Bの周波数
に分周され、ナントゲート3,4の一方の入力端子にそ
れぞれ入力される。一方、入力端子1に印加されたディ
ジタルの変調信号は、Dフロップフロップ2のD端子に
入力され、前記基準周波数発振器12の出力周波数に同
期した信号をQ端子より前記ナントゲート3の他方の入
力端子にまたは前記基準周波数発振器12の出力に同期
し、前記変調信号と180’位相の異る信号をQ端子よ
り前記ナントゲート4の他方の入力端子へ出力する。
The oscillation frequency fB of the reference frequency oscillator 12 is divided into frequencies of 1/A and 1/B by fixed frequency dividers 13 and 14, respectively, and input to one input terminal of the Nant gates 3 and 4, respectively. On the other hand, the digital modulation signal applied to the input terminal 1 is input to the D terminal of the D flip-flop 2, and a signal synchronized with the output frequency of the reference frequency oscillator 12 is sent from the Q terminal to the other input of the Nantes gate 3. A signal which is synchronized with the output of the reference frequency oscillator 12 and whose phase is 180' different from the modulation signal is output from the Q terminal to the other input terminal of the Nant gate 4.

前記ナントゲート3,4は前記Dフリップフロップ2の
基準信号に同期した180”位相の異る変調信号により
、前記固定分周器13.14にて形成されたfA/ A
 、 f^/Bの信号を切替えFSX変調し、固定分周
器5へ出力する。(この時、AとBの差が3の倍数のと
きは、位相の連続性は保たれる。)固定分周器5は、前
記アンドゲート3,4より入力されたFSX変調信号を
、位相連続で中心周波数fs = (A + B ) 
fs/ 2A BのFSK変調信号に分周し、可変分周
器6へ出力する。前記のFSX変調信号は、可変分周器
6にて後述する分周比Nにて分周された後、ローパスフ
ィルタフにより不要波が除去され1周波数合成器8へ入
力される。
The Nant gates 3 and 4 receive the fA/A signal formed by the fixed frequency divider 13 and 14 by modulation signals having a different phase of 180" synchronized with the reference signal of the D flip-flop 2.
, f^/B signals are switched and FSX modulated and output to the fixed frequency divider 5. (At this time, if the difference between A and B is a multiple of 3, the continuity of the phase is maintained.) The fixed frequency divider 5 divides the FSX modulation signal input from the AND gates 3 and 4 into a phase Continuous center frequency fs = (A + B)
The frequency is divided into an FSK modulated signal of fs/2A B and output to the variable frequency divider 6. The FSX modulated signal is frequency-divided by a variable frequency divider 6 at a frequency division ratio N to be described later, and then unnecessary waves are removed by a low-pass filter and input to a one-frequency synthesizer 8.

また、周波数合成器8のもう一方の入力信号は基準周波
数発振器12の出力を、固定分周器10にて1/Dに分
周し、ローパスフィルタ11にて不要波を除去したステ
ップ周波数fc=fA/Dが入力される。このステップ
周波数fCは前記のローバスフィルタフの出力信号と周
波数合成器8により周波数合成され、バンドパスフィル
タ9にて周波数の和成分(差の成分でも良い、)のみ抽
出さ九、中心周波数fD=fc+fBのFSK変調信号
となり、位相比較器19の一方の端子へ入力される0位
相比較器19はローパスフィルタ15.電圧制御発振器
16および可変分周器17とともにPLLループを形成
しており、電圧制御発振器16の発振周波数f0がN分
周され−f、 / Nの周波数が他方の入力端子に加え
られる0位相比較器19の出力は、前記FSK変調信号
fDと、f11/Nの周波数および位相差に応じた電圧
となり、電圧制御発振器へ帰還される。この為、出力端
子18に印加される信号はFSK変調波となり、その周
波数f6は計算により f0=((A十B)fA12AB)+fcN・・・・旧
・・(1)となる。
The other input signal of the frequency synthesizer 8 is a step frequency fc= which is obtained by dividing the output of the reference frequency oscillator 12 to 1/D by a fixed frequency divider 10 and removing unnecessary waves by a low-pass filter 11. fA/D is input. This step frequency fC is frequency-synthesized with the output signal of the low-pass filter 8 by a frequency synthesizer 8, and a band-pass filter 9 extracts only the sum component (or difference component) of the frequencies. =fc+fB is an FSK modulated signal, which is input to one terminal of the phase comparator 19.The phase comparator 19 is a low-pass filter 15. A PLL loop is formed together with the voltage controlled oscillator 16 and the variable frequency divider 17, and the oscillation frequency f0 of the voltage controlled oscillator 16 is divided by N and a frequency of -f,/N is applied to the other input terminal. The output of the generator 19 becomes a voltage according to the frequency and phase difference between the FSK modulation signal fD and f11/N, and is fed back to the voltage controlled oscillator. Therefore, the signal applied to the output terminal 18 becomes an FSK modulated wave, and its frequency f6 is calculated as f0=((A+B)fA12AB)+fcN...old...(1).

一方、周波数設定入力端子20にMと云う数値を入力し
た場合、可変分周器6,17の分周比Nは、固定減算器
21により減算され、 N=M−(A+B)D/2AB ・・・・・・・・・・
旧・・(2)となり、これを(1)式に代入すると、f
、=fc−M十(f^−Dfc)(A+B)/2AB”
=(3)又。
On the other hand, when a numerical value M is input to the frequency setting input terminal 20, the frequency division ratio N of the variable frequency dividers 6 and 17 is subtracted by the fixed subtracter 21, and N=M-(A+B)D/2AB・・・・・・・・・・
Old... (2) becomes, and when this is substituted into equation (1), f
,=fc−Mten(f^−Dfc)(A+B)/2AB”
=(3) Again.

D=fA/fcなので f、=f(H−M    ・・・・・・・・・・・・・
・・・・・・・・・・・・・・・・・(4)となり、前
記出力端子18に印加される信号の中心周波数f0は、
周波数設定入力端子20に入力された数値Mのfc倍の
周波数となる。また、前記位相比較器19に印加される
信号のシフト周波数をfizとすると、 fs、= (f^/A−fA/B)/CN−=(5)と
なる、この信号は、前記PLLループにより、電圧制御
発振器により8倍される為、出力端子18に表れる出力
信号のシフト周波数f811は、fiz == f s
−X N =(B−A )f A / A B C・・
・・” (6)となり、前記周波数設定入力端子20の
設定入力に無関係で常に一定のシフト周波数を出力する
Since D=fA/fc, f,=f(HM-M ・・・・・・・・・・・・・・・
(4) The center frequency f0 of the signal applied to the output terminal 18 is
The frequency is fc times the numerical value M input to the frequency setting input terminal 20. Further, if the shift frequency of the signal applied to the phase comparator 19 is fiz, fs, = (f^/A-fA/B)/CN- = (5), and this signal is applied to the PLL loop. Therefore, the shift frequency f811 of the output signal appearing at the output terminal 18 is multiplied by 8 by the voltage controlled oscillator, so that fiz == f s
-X N = (B-A) f A / A B C...
...'' (6), and a constant shift frequency is always output regardless of the setting input of the frequency setting input terminal 20.

本実施例によれば、1つの基準発振器で基準となるFS
X信号を形成し、または、FSX変調波は分周している
為、位相連続の高安定なFSK信号を得られると共に、
出力周波数を広範囲に可変しても、シフト周波数は変化
しない為、高安定なFSX変調信号が得られる。
According to this embodiment, one reference oscillator provides a reference FS.
Since the X signal is formed or the FSX modulated wave is frequency-divided, it is possible to obtain a highly stable FSK signal with continuous phase, and
Even if the output frequency is varied over a wide range, the shift frequency does not change, so a highly stable FSX modulation signal can be obtained.

[発明の効果] 本発明によれば、PLLループの基準入力に周波数変調
を与え、この周波数変調波の周波数偏移を出力周波数に
対応し自動的に制御するので、広い周波数範囲にわたり
周波数安定度が高く、変調特性が良好であり、スプリア
ス成分の少い周波数変調波を得ることができる。
[Effects of the Invention] According to the present invention, frequency modulation is applied to the reference input of the PLL loop, and the frequency deviation of this frequency modulated wave is automatically controlled in accordance with the output frequency, so that frequency stability is maintained over a wide frequency range. It is possible to obtain a frequency modulated wave with a high frequency, good modulation characteristics, and few spurious components.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示すFSX変調器のブロッ
ク図である。 5 、10.13.14・・・固定分周器、6,17・
・・可変分周器、 12・・・基準発振器、19・・・
位相比較器、16・・・電圧制御発振器、21・・・固
定減算器。 特許出願人  日立湘南電子株式会社 代理人弁理士  秋  本  正  実外1名 /デ 准有叱軟轟
FIG. 1 is a block diagram of an FSX modulator showing one embodiment of the present invention. 5, 10.13.14...Fixed frequency divider, 6,17.
...Variable frequency divider, 12...Reference oscillator, 19...
Phase comparator, 16...voltage controlled oscillator, 21... fixed subtractor. Patent Applicant Hitachi Shonan Electronics Co., Ltd. Representative Patent Attorney Tadashi Akimoto 1 other person

Claims (1)

【特許請求の範囲】[Claims] 1、基準周波数発振器と前記基準周波数発振器の出力を
分周する第1の分周器と前記第1の分周器の出力の不要
波を除去する第1の濾波器と前記基準信号発振器と前記
第1の濾波器の出力と、前記基準信号発振器の出力とを
合成する周波数合成器と前記周波数合成器の出力のうち
和または差のどちらかの信号成分を選択する第2の濾波
器と、電圧制御発振器と前記電圧制御発振器の出力を分
周する第2の分周器と前記第2の濾波器と第2の分周器
の出力の位相を比較する位相検波器と前記位相検波器の
出力の不要波を除去しそれを前記電圧制御発振器の制御
入力に接続する濾波器とを含み、前記第1と第2の分周
比を同時に変えることにより前記電圧制御発振器に変調
をかけるようにしたことを特徴とする広帯域FM変調器
1. a reference frequency oscillator, a first frequency divider that divides the output of the reference frequency oscillator, a first filter that removes unnecessary waves from the output of the first frequency divider, the reference signal oscillator, and the a frequency synthesizer that combines the output of the first filter and the output of the reference signal oscillator; and a second filter that selects either the sum or difference signal component from the output of the frequency synthesizer; a voltage controlled oscillator; a second frequency divider that divides the output of the voltage controlled oscillator; a phase detector that compares the phases of the outputs of the second filter and the second frequency divider; a filter that removes unnecessary waves from the output and connects it to a control input of the voltage controlled oscillator, and modulates the voltage controlled oscillator by simultaneously changing the first and second frequency division ratios. A wideband FM modulator characterized by:
JP2983687A 1987-02-13 1987-02-13 Broad band fm modulator Pending JPS63198406A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2983687A JPS63198406A (en) 1987-02-13 1987-02-13 Broad band fm modulator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2983687A JPS63198406A (en) 1987-02-13 1987-02-13 Broad band fm modulator

Publications (1)

Publication Number Publication Date
JPS63198406A true JPS63198406A (en) 1988-08-17

Family

ID=12287097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2983687A Pending JPS63198406A (en) 1987-02-13 1987-02-13 Broad band fm modulator

Country Status (1)

Country Link
JP (1) JPS63198406A (en)

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