JPH05315840A - Phase locked loop circuit - Google Patents

Abstract

PURPOSE:To attain frequency modulation for even a signal including much of DC component by inputting only a non-modulation wave to a phase comparator in the PLL circuit and controlling a frequency from a 1st voltage controlled oscillator based on the output of the phase comparator. CONSTITUTION:A signal from 1st and 2nd voltage controlled oscillators 1, 2 is modulated by a modulation signal from a terminal 9 in a phase locked loop circuit PLL. A modulated output is inputted to a balanced modulator 6, in which a non-modulation wave is synthesized and the output of the modulator 6 is given to a band pass filter 7, from which only the non-modulation wave is inputted to a phase comparator 4. The output of the phase comparator 4 is used to control the frequency of the 1st voltage controlled oscillator 1. Thus, even when the modulation signal from the terminal 9 inputted to the 1st voltage controlled oscillator 1 includes much of DC component, the frequency modulation is attained and its output signal is sent from an output terminal 12.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a phase locked loop (PLL) circuit used in digital data transmission communication equipment.

[0002]

2. Description of the Related Art A PLL circuit used in a conventional communication device or the like divides an output of a reference signal oscillator 203 by a frequency divider 210 into 1 / M to generate a comparison frequency as shown in FIG. The phase comparator 204 performs phase comparison with the frequency of the feedback signal from the voltage controlled oscillator 201,
The output from the phase comparator 204 is the loop filter 20.
The frequency control is performed by inputting the voltage to the voltage controlled oscillator 201 through 5. The voltage controlled oscillator 201 inputs a modulation signal from a modulation signal input terminal 209 to perform frequency modulation, divides its output into an output signal and a feedback signal, outputs the output signal from an output terminal 212, and divides the feedback signal. Input to the frequency divider 211, and use 1 with this frequency divider 211.
It is known that the frequency is divided into / N and then fed back to the phase comparator 204.

[0003]

However, in the conventional phase-locked loop circuit, when frequency modulation is performed by the modulation signal containing the DC component, the comparison frequency from the reference signal oscillator 203 and the voltage control modulated by the modulation signal are controlled. When the output signal of the oscillator 201 is input to the phase comparator 204, the oscillation frequency of the voltage controlled oscillator 201 is controlled by the output from the phase comparator, so that the desired oscillation frequency cannot be obtained, and therefore the DC component is not obtained. However, there is a problem that it is impossible to transmit a modulated signal containing a large amount of.

An object of the present invention is to obtain a phase locked loop circuit capable of frequency modulating even a signal containing many DC components.

[0005]

In order to solve the above problems, the present invention relates to a phase comparator for performing a phase comparison between a comparison frequency from a reference oscillator and a frequency fed back from a voltage controlled oscillator, and the phase comparator. A loop filter for removing a high frequency component of an output, a first voltage controlled oscillator whose frequency is controlled by a signal passing through the loop filter, a second voltage controlled oscillator for inputting a modulation signal from a modulation signal input terminal, and the first voltage controlled oscillator. A balanced modulator that modulates the outputs of the voltage-controlled oscillator and the second voltage-controlled oscillator, a bandpass filter that passes only the desired signal of the balanced modulator output, a signal from the bandpass filter is amplified, and the amplified signal is divided. An amplifier for outputting to the frequency divider and a frequency divider for outputting the signal from the amplifier to the phase comparator.
And a second voltage-controlled oscillator, inputs the outputs of the first and second voltage-controlled oscillators to a balanced modulator, inputs the outputs from the balanced modulator to a bandpass filter, and passes through the phase comparator. The frequency of the first voltage controlled oscillator is controlled by the signal from the bandpass filter.

[0006]

In the phase-locked loop circuit configured as described above, the first voltage-controlled oscillator 1 and the second voltage-controlled oscillator 2 are modulated with the modulation signal, and the outputs thereof are input to the balanced modulator, whereby no modulation is performed. Waves are combined, the balanced modulator output is passed through a bandpass filter, and only the non-modulated wave is input to the phase comparator, and the frequency of the first voltage controlled oscillator 1 is controlled by the phase comparator output. Even if the modulated signal to be generated contains many DC components, frequency modulation can be performed and the output signal can be transmitted.

[0007]

Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a block diagram of a phase locked loop circuit according to the present invention. Reference oscillator 3, frequency divider 10 for dividing the output thereof, phase comparator 4 for performing phase comparison between the divided comparison frequency and the frequency of the feedback signal from frequency divider 11, and high frequency of the phase comparator output. A loop filter 5 that removes components, a voltage controlled oscillator 1 whose frequency is controlled by a signal that has passed through the loop filter 5, a voltage controlled oscillator 2, and a balanced modulator 6 that modulates the outputs of the voltage controlled oscillator 1 and the voltage controlled oscillator 2. A band-lock filter 7 that passes only the desired wave of the balanced modulator output, an amplifier 8 that amplifies the desired wave, and a frequency divider 11 that divides the output thereof form a phase locked loop circuit.

Next, the operation of the phase locked loop circuit according to the present invention will be described with reference to FIG. First division ratio 1 /
M (step 401) and 1 / N (step 404) are set from the outside, and the reference oscillator 3 (step 40
2), first voltage controlled oscillator 1 (step 405), second
After starting the voltage controlled oscillator 2 (step 405),
The output of the reference signal oscillator 3 is divided into 1 / M by the frequency divider 10 (step 403) to generate a comparison frequency, and at the same time, the first frequency
The outputs of the voltage controlled oscillator 1 and the second voltage controlled oscillator 2 are modulated by the balanced modulator 6 (step 406), and the outputs are input to the bandpass filter 7 to extract the desired wave (step 40).
7).

Next, the desired wave thus taken out is amplified by the amplifier 8 (step 408), and is divided into 1 / N by the frequency divider 11 (step 409). Then, the comparison frequency and the desired wave are phase-compared. 4 and perform phase comparison (step 41
0), the control signal for eliminating the phase difference between the comparison frequency and the desired wave from the phase comparator 4 is passed through the loop filter 5 (step 411) to remove high frequency components, and then the frequency control terminal of the first voltage controlled oscillator 1 13 (Step 41
2) The time when the phase difference between the desired wave and the comparison frequency disappears is set (step 413), and when the set time is exceeded, the modulation data is input from the modulation input terminal 9 (step 414) to perform frequency modulation, At the same time, the same modulation signal is input to the second voltage-controlled oscillator 2 to perform frequency modulation having the same modulation degree as that of the first voltage-controlled oscillator 1, and the outputs thereof are modulated by the balanced modulator 6 (step 406). Then, only the unmodulated wave of the output is passed by the bandpass filter 7 (step 407), the unmodulated wave is amplified by the amplifier 8 (step 408), and after being divided by the frequency divider 11 to 1 / N (step 407). 409) It is fed back to the phase comparator 4 (step 410), and at this time, the output of the first voltage controlled oscillator 1 is taken out from the output terminal 12.

With this configuration, the effect is to input digital data containing a large amount of direct current component to the modulation terminal 9, apply frequency modulation to the first voltage controlled oscillator 1, and output a modulated wave from the output terminal 12. Can be transmitted.

[0011]

The phase-locked loop circuit of the present invention modulates the first voltage-controlled oscillator 1 and the second voltage-controlled oscillator 2 with a modulation signal in the phase-locked loop circuit, inputs the outputs thereof to the balanced modulator, and balances them. The modulator output is passed through a bandpass filter and only the desired signal is fed back and input to the phase comparator, the frequency of the first voltage controlled oscillator 1 is controlled by the phase comparator output, and the output of the first voltage controlled oscillator 1 at this time is data. Since the configuration is used for transmission, it has the following effects. It is possible to input digital data containing a large amount of DC component to the modulation terminal 9, apply frequency modulation to the first voltage controlled oscillator 1, and transmit the modulated wave from the output terminal 12. The efficiency of data transmission can be maximized.

[Brief description of drawings]

FIG. 1 is a block diagram of a phase locked loop circuit according to the present invention.

FIG. 2 is a block diagram of a conventional phase locked loop circuit.

FIG. 3 is an operation flowchart of the phase locked loop circuit according to the present invention.

[Explanation of symbols]

 1 1st voltage control oscillator 2 2nd voltage control oscillator 3 Reference oscillator 4 Phase comparator 5 Loop filter 6 Balanced modulator 7 Band filter 8 Amplifier 9 Modulation input terminal 10 Frequency divider 11 Frequency divider 12 Output terminal

Claims (1)

[Claims] 1. A reference oscillator that outputs a comparison frequency, a phase comparator that performs a phase comparison between the frequency fed back from a voltage controlled oscillator and the comparison frequency, and a loop filter that removes high-frequency components of the phase comparator output. A first voltage controlled oscillator whose frequency is controlled by a signal that has passed through the loop filter; a second voltage controlled oscillator for inputting a modulation signal from a modulation signal input terminal; and a first voltage controlled oscillator and a second voltage controlled oscillator. A balanced modulator that modulates the output, a bandpass filter that passes only the desired signal of the balanced modulator output, an amplifier that amplifies the signal from the bandpass filter, and outputs the amplified signal to a frequency divider, and the amplifier A frequency divider for outputting the signal from the phase comparator to the phase comparator, and inputting the modulated signal to the first voltage controlled oscillator and the second voltage controlled oscillator, , The output of the second voltage controlled oscillator is input to the balanced modulator, the output from the balanced modulator is input to the bandpass filter, and the first voltage control is performed by the signal from the bandpass filter via the phase comparator. A phase-locked loop circuit characterized by controlling the frequency of an oscillator.