JPS63197227A - 加算器 - Google Patents

加算器

Info

Publication number
JPS63197227A
JPS63197227A JP62030326A JP3032687A JPS63197227A JP S63197227 A JPS63197227 A JP S63197227A JP 62030326 A JP62030326 A JP 62030326A JP 3032687 A JP3032687 A JP 3032687A JP S63197227 A JPS63197227 A JP S63197227A
Authority
JP
Japan
Prior art keywords
digit
circuit
addend
signal
sum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62030326A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0528408B2 (enrdf_load_stackoverflow
Inventor
Takashi Taniguchi
隆志 谷口
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP62030326A priority Critical patent/JPS63197227A/ja
Priority to US07/086,967 priority patent/US4866657A/en
Publication of JPS63197227A publication Critical patent/JPS63197227A/ja
Priority to US03/239,243 priority patent/US5031136A/en
Priority to US07/599,275 priority patent/US5153847A/en
Publication of JPH0528408B2 publication Critical patent/JPH0528408B2/ja
Granted legal-status Critical Current

Links

JP62030326A 1986-06-27 1987-02-12 加算器 Granted JPS63197227A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP62030326A JPS63197227A (ja) 1987-02-12 1987-02-12 加算器
US07/086,967 US4866657A (en) 1986-07-18 1987-08-18 Adder circuitry utilizing redundant signed digit operands
US03/239,243 US5031136A (en) 1986-06-27 1990-05-07 Signed-digit arithmetic processing units with binary operands
US07/599,275 US5153847A (en) 1986-06-27 1990-10-16 Arithmetic processor using signed digit representation of internal operands

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62030326A JPS63197227A (ja) 1987-02-12 1987-02-12 加算器

Publications (2)

Publication Number Publication Date
JPS63197227A true JPS63197227A (ja) 1988-08-16
JPH0528408B2 JPH0528408B2 (enrdf_load_stackoverflow) 1993-04-26

Family

ID=12300686

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62030326A Granted JPS63197227A (ja) 1986-06-27 1987-02-12 加算器

Country Status (1)

Country Link
JP (1) JPS63197227A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPH0528408B2 (enrdf_load_stackoverflow) 1993-04-26

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Legal Events

Date Code Title Description
EXPY Cancellation because of completion of term