JPS63192239A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS63192239A JPS63192239A JP2575487A JP2575487A JPS63192239A JP S63192239 A JPS63192239 A JP S63192239A JP 2575487 A JP2575487 A JP 2575487A JP 2575487 A JP2575487 A JP 2575487A JP S63192239 A JPS63192239 A JP S63192239A
- Authority
- JP
- Japan
- Prior art keywords
- film
- insulating films
- melted
- insulating film
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 11
- 238000004519 manufacturing process Methods 0.000 title claims description 4
- 238000002844 melting Methods 0.000 claims abstract description 9
- 230000008018 melting Effects 0.000 claims abstract description 9
- 238000000034 method Methods 0.000 claims description 11
- 239000005368 silicate glass Substances 0.000 claims description 6
- GDFCWFBWQUEQIJ-UHFFFAOYSA-N [B].[P] Chemical compound [B].[P] GDFCWFBWQUEQIJ-UHFFFAOYSA-N 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 239000005380 borophosphosilicate glass Substances 0.000 abstract description 21
- 238000005229 chemical vapour deposition Methods 0.000 abstract description 5
- 239000000758 substrate Substances 0.000 abstract description 4
- 238000010438 heat treatment Methods 0.000 abstract description 3
- 239000005360 phosphosilicate glass Substances 0.000 abstract 4
- 238000007493 shaping process Methods 0.000 abstract 2
- 239000010410 layer Substances 0.000 description 9
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 3
- 239000011229 interlayer Substances 0.000 description 3
- 230000007935 neutral effect Effects 0.000 description 3
- 229910052698 phosphorus Inorganic materials 0.000 description 3
- 239000011574 phosphorus Substances 0.000 description 3
- 238000007796 conventional method Methods 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- PEDCQBHIVMGVHV-UHFFFAOYSA-N Glycerine Chemical compound OCC(O)CO PEDCQBHIVMGVHV-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000008280 blood Substances 0.000 description 1
- 210000004369 blood Anatomy 0.000 description 1
- 238000009792 diffusion process Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
【発明の詳細な説明】
[概要]
少なくとも一層のボロン燐シリケートガラス膜を含む絶
縁膜を複数層に分けて複数回被着し、被着毎に溶融する
。そうすると、絶縁膜内部に気泡ができなくなる。DETAILED DESCRIPTION OF THE INVENTION [Summary] An insulating film containing at least one boron phosphorus silicate glass film is divided into a plurality of layers and deposited multiple times, and is melted each time it is deposited. This prevents bubbles from forming inside the insulating film.
[産業上の利用分野]
本発明は半導体装置の製造方法のうち、絶縁膜の形成方
法に関する。[Industrial Field of Application] The present invention relates to a method of forming an insulating film among methods of manufacturing a semiconductor device.
ICやLSIなどの半導体装置には、微細化した半導体
素子の上面に多層配線が設けられており、その配線層と
配線層との間に絶縁膜(層間絶縁膜)を介在させている
。しかし、この層間絶縁膜は低温溶融できて、且つ、改
質の良いことが要望されている。BACKGROUND ART In semiconductor devices such as ICs and LSIs, multilayer wiring is provided on the upper surface of a miniaturized semiconductor element, and an insulating film (interlayer insulating film) is interposed between the wiring layers. However, it is desired that this interlayer insulating film can be melted at a low temperature and that it can be easily modified.
[従来の技術と発明が解決しようとする問題点]従来、
このような層間絶縁膜として、燐シリケートガラス膜(
PSG膜)が用いられてきたが、最近、ボロン燐シリケ
ートガラス膜(B P S G膜)が重用されるように
なってきた。それはBPSG膜の方が一層低温度で溶融
できるためで、燐を7〜9%含むPSG膜の溶融温度は
1000°C程度であるのに対して、燐を4〜6%、硼
素を3〜5%程度含むBPSG膜の溶融温度は900〜
950℃と、一層低い溶融温度であるからである。[Problems to be solved by conventional techniques and inventions] Conventionally,
As such an interlayer insulating film, a phosphorus silicate glass film (
However, recently, boron phosphorus silicate glass films (BPSG films) have been increasingly used. This is because the BPSG film can be melted at a lower temperature; the melting temperature of a PSG film containing 7 to 9% phosphorus is around 1000°C, whereas the melting temperature of a PSG film containing 7 to 9% phosphorus is about 1000°C. The melting temperature of the BPSG film containing about 5% is 900~
This is because it has a lower melting temperature of 950°C.
第2図(a)、 (b)は従来のBPSG膜を被着して
溶融する形成方法の工程順断面図を示しており、同図(
a)は半導体基板1の上に多数の配線2が設けられ、そ
の配線2を含む上面に膜厚0.7〜1μmのBPSG膜
3を被覆した工程図である。このようなりPSG膜3は
化学気相成長(CV D)法によって被着するため比較
的に被覆性(カバーレイジ)が良く、配線面の凹凸は凡
そそのまま上面に持ち越されて、同様の凹凸が表面に生
じる。FIGS. 2(a) and 2(b) show cross-sectional views of the conventional method of depositing and melting a BPSG film.
Fig. a) is a process diagram in which a large number of wiring lines 2 are provided on a semiconductor substrate 1, and the upper surface including the wiring lines 2 is coated with a BPSG film 3 having a thickness of 0.7 to 1 μm. As described above, since the PSG film 3 is deposited by chemical vapor deposition (CVD), it has relatively good coverage, and the unevenness on the wiring surface is carried over to the upper surface as it is, and similar unevenness is Occurs on the surface.
従って、通常、被覆したBPSG膜4は表面を平坦化す
るために、被着後に溶融(リフロー)が行われている。Therefore, the coated BPSG film 4 is usually melted (reflowed) after being deposited in order to flatten the surface.
このリフローは出来るだけ低温で行うことが望ましく、
それは高温でリフローすると、不純物の拡散が起こり、
既に形成した半導体素子の接合(ジャンクション)に影
響を与えて、素子特性を悪くするからである。It is desirable to perform this reflow at as low a temperature as possible.
When it is reflowed at high temperature, impurity diffusion occurs,
This is because it affects the junction of the semiconductor element that has already been formed and deteriorates the element characteristics.
第2図(b)はBPSG膜を溶融した工程断面図を示し
ており、その溶融は中性または還元性のガス雰囲気中で
900〜1000℃に加熱して溶融させている。FIG. 2(b) shows a cross-sectional view of the process of melting the BPSG film, which is heated to 900 to 1000° C. in a neutral or reducing gas atmosphere.
しかし、最近のように、ICが益々微細化されると、配
線間の間隙が狭く、且つ、凹凸が著しくなって、凹部の
隅々までBPSG膜が緻密に被着することが困難になっ
てきた。また、BPSG膜を溶融すると、被着膜内から
ガスが発生する。そのため、BPSG膜を溶融すると凹
部のBPSG膜の中に気泡Hが含まれることが判ってき
た。この気泡Hは絶縁膜の被覆性を損なうもので、信頼
性上から気泡を含有しないように形成することが重要で
ある。However, as ICs have become increasingly finer in recent years, the gaps between interconnections have become narrower and the unevenness has become more pronounced, making it difficult to adhere the BPSG film densely to every corner of the recesses. Ta. Furthermore, when the BPSG film is melted, gas is generated from within the deposited film. Therefore, it has been found that when the BPSG film is melted, air bubbles H are included in the BPSG film in the recessed portions. These bubbles H impair the coverage of the insulating film, and from the viewpoint of reliability, it is important to form the insulating film so that it does not contain bubbles.
本発明は、このような欠点を解消させる絶縁膜の形成方
法を提案するものである。The present invention proposes a method for forming an insulating film that eliminates these drawbacks.
[問題点を解決するための手段]
その目的は、少なくともボロン燐シリケートガラス膜の
一層を含む絶縁膜の複数層を複数回に分けて被着し、絶
縁膜を被着する毎に溶融を繰り換えして絶縁膜を形成す
る工程が含まれる半導体装置の製造方法によって達成さ
れる。[Means for solving the problem] The purpose is to deposit multiple layers of insulating films, including at least one layer of boron phosphorus silicate glass film, in multiple steps, and repeat melting each time the insulating film is deposited. This is achieved by a semiconductor device manufacturing method that includes a step of forming an insulating film instead.
[作用]
即ち、本発明は、少なくともボロン燐シリケートガラス
膜を含む絶縁膜を複数層に分けて被着し、被着毎に溶融
する。そうすると、絶縁膜の中に気泡ができなくなり、
絶縁膜の品質が向上する。[Function] That is, in the present invention, an insulating film containing at least a boron phosphorus silicate glass film is deposited in plural layers and melted each time it is deposited. This will prevent air bubbles from forming in the insulating film.
The quality of the insulating film is improved.
[実施例] 以下、実施例によって詳細に説明する。[Example] Hereinafter, it will be explained in detail using examples.
第1図(al〜(d)は本発明にかかる形成方法の工程
順断面図を示しており、同図(a)は半導体基板1の上
に複数の配線2が設けられ、その上面に膜厚0.3〜0
.5μmのPSG膜11をCVD法で被着した工程図で
ある。1(a) to 1(d) show step-by-step cross-sectional views of the forming method according to the present invention, and FIG. 1(a) shows a plurality of wirings 2 provided on a semiconductor substrate 1, and a film Thickness 0.3~0
.. It is a process diagram in which a 5 μm thick PSG film 11 is deposited by the CVD method.
次いで、第1図(b)に示すように、中性または還元性
のガス雰囲気中で900〜1000℃に加熱して、その
PSG膜11を溶融する。Next, as shown in FIG. 1(b), the PSG film 11 is melted by heating to 900 to 1000[deg.] C. in a neutral or reducing gas atmosphere.
次いで、第1図(C)に示すように、その上面に膜厚0
.3〜0.5 p mのBPSG膜12全12CVD法
で被着し、更に、第1図(d)に示すように、再び、中
性または還元性のガス雰囲気中で900−1000℃に
加熱して、BPSG膜12全12する。Next, as shown in FIG. 1(C), a film with a thickness of 0
.. The BPSG film 12 with a thickness of 3 to 0.5 pm was deposited by the CVD method, and then heated again to 900 to 1000°C in a neutral or reducing gas atmosphere, as shown in FIG. 1(d). Then, the entire BPSG film 12 is formed.
このように、膜厚1μmの絶縁膜を2回に分けて被着し
、2回に分けて溶融する。そうすると、気泡が発生し難
くなる。この形成法は若干工数は増加するものの、絶縁
膜が緻密になって、信頼性の高い多層配線層を形成でき
る。In this way, an insulating film with a thickness of 1 μm is deposited in two steps and melted in two steps. This makes it difficult for bubbles to occur. Although this formation method slightly increases the number of man-hours, the insulating film becomes denser and a highly reliable multilayer wiring layer can be formed.
上記の実施例は絶縁膜の第1層としてPSG膜11を被
着し、第2層としてBPSG膜12全12する方法であ
ったが、第1層および第2層を共にBPSG膜としても
同様であり、また、第1層としてBPSG膜を被着し、
第2層としてPSG膜を被着しても同様に気泡をなくす
る効果が得られる。In the above embodiment, the PSG film 11 is deposited as the first layer of the insulating film, and the BPSG film 12 is deposited as the second layer. and a BPSG film is deposited as the first layer,
A similar effect of eliminating air bubbles can be obtained by depositing a PSG film as the second layer.
[発明の効果]
従って、本発明によれば気泡が除去されて緻密な膜質の
絶縁膜が形成され、半導体装置の品質向上に大きく役立
つものである。[Effects of the Invention] Therefore, according to the present invention, air bubbles are removed and an insulating film with dense film quality is formed, which greatly contributes to improving the quality of semiconductor devices.
第1図(a)〜(d)は本発明にかかる形成方法の工程
順断面図、
第2図(a)、 [b)は従来の形成方法の工程順断面
図である。
図において、
1は半導体基板、 2は配線、
3.12はBPSG膜、 11はPSG膜、杢イメ日月
、□、か)五吟城゛方3血丙1享L’J更渚frfxy
oゴ第1図FIGS. 1(a) to 1(d) are sectional views in the order of steps of a forming method according to the present invention, and FIGS. 2(a) and 2(b) are sectional views in order of steps of a conventional forming method. In the figure, 1 is the semiconductor substrate, 2 is the wiring, 3. 12 is the BPSG film, 11 is the PSG film, the heathered sun and moon, □, ka) Goginjo ゛ Way 3 Blood 2 1 Kyou L'J Saranagi frfxy
Figure 1
Claims (1)
縁膜の複数層を複数回に分けて被着し、絶縁膜を被着す
る毎に溶融を繰り換えして絶縁膜を形成する工程が含ま
れてなることを特徴とする半導体装置の製造方法。The step includes depositing multiple layers of an insulating film including at least one layer of a boron phosphorus silicate glass film in multiple steps, and repeating melting each time the insulating film is deposited to form an insulating film. A method for manufacturing a semiconductor device, characterized in that:
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2575487A JPS63192239A (en) | 1987-02-05 | 1987-02-05 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2575487A JPS63192239A (en) | 1987-02-05 | 1987-02-05 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63192239A true JPS63192239A (en) | 1988-08-09 |
Family
ID=12174621
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2575487A Pending JPS63192239A (en) | 1987-02-05 | 1987-02-05 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63192239A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991011023A1 (en) * | 1990-01-18 | 1991-07-25 | Kabushiki Kaisha Toshiba | Method of producing semiconductor devices |
US5656556A (en) * | 1996-07-22 | 1997-08-12 | Vanguard International Semiconductor | Method for fabricating planarized borophosphosilicate glass films having low anneal temperatures |
US5716890A (en) * | 1996-10-18 | 1998-02-10 | Vanguard International Semiconductor Corporation | Structure and method for fabricating an interlayer insulating film |
US5770469A (en) * | 1995-12-29 | 1998-06-23 | Lam Research Corporation | Method for forming semiconductor structure using modulation doped silicate glasses |
-
1987
- 1987-02-05 JP JP2575487A patent/JPS63192239A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1991011023A1 (en) * | 1990-01-18 | 1991-07-25 | Kabushiki Kaisha Toshiba | Method of producing semiconductor devices |
US5770469A (en) * | 1995-12-29 | 1998-06-23 | Lam Research Corporation | Method for forming semiconductor structure using modulation doped silicate glasses |
US5656556A (en) * | 1996-07-22 | 1997-08-12 | Vanguard International Semiconductor | Method for fabricating planarized borophosphosilicate glass films having low anneal temperatures |
US5716890A (en) * | 1996-10-18 | 1998-02-10 | Vanguard International Semiconductor Corporation | Structure and method for fabricating an interlayer insulating film |
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