JPS63189916A - Constant current circuit - Google Patents

Abstract

PURPOSE:To obtain a stable constant current circuit by using a reference signal generating part, an error amplifier part, a feedback part, and a feedback control circuit having an output control part. CONSTITUTION:The titled circuit is constituted of the reference signal generating part 1 having MOSFETs 6, 7, the error amplifier part 2 having FETs 8, 9, the output control part 4 having an FET 10, and the feedback part 3. The current factors of respective FETs are respectively defined as betaP6, betaN7, betaN8, betaP9, betaP10 and respective gate threshold voltages are defined as VTP6, VTN7, VTN8, VTP9, VTP10. Consequently, the output voltage V0 of the amplifier 2 is obtained by the equality I. In this case, VDD is power supply voltage. Thereby, the output current I0 of the FET 10 in the control part 4 is approximately expressed by the equality II by setting up constants satisfying (betaP6/betaN7)<1/2<1 and betaP9=betaN8 in the equality I.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the field of electronic circuits in complementary metal oxide film technology.

[Summary of the invention]

The present invention provides a complementary metal oxide semiconductor (hereinafter abbreviated as 3MO8) integrated circuit including a reference signal generation section, an error amplification section,
A stable constant current circuit is provided by using a feedback control circuit having a feedback section and an output control section.

[Conventional technology]

Conventionally, constant current circuit technology using an aMOS circuit has been available.

Figures 3 and 4 are conventional examples. Figure 3 shows resistance 31
And N channel MO! 971! : Connect in series with T52,
Nfar channel MO8F1! ! This is an example of a constant current circuit in which a mirror circuit is formed at T35. This method has a simple circuit configuration, but since the current value at the output terminal 34 is determined by the current flowing through the resistor 51, it varies greatly depending on the temperature characteristics of the resistor 31 and manufacturing variations. A major drawback is that the output current fluctuates even when the voltage changes.

In Figure 4, Depricious MO! A constant current mirror circuit is composed of the 37EiT41 and the N-channel enhancement IFET42.45. This circuit can sufficiently suppress power supply voltage fluctuations. But what happens when the temperature changes significantly? This has the disadvantage that the gate threshold voltage of the lCT 41 decreases, and the output constant current value rapidly increases with a square characteristic with respect to temperature.

The quality of a circuit is determined not only by its characteristics but also by the degree of difficulty in its integration.1 For example, when integrating the prior art example mentioned above for low constant current use, the following problems occur.

In the method shown in FIG. 3, the constant current value depends on the resistance value of the resistance element. Therefore, if the constant current value is lowered, a large area is required to form the resistor. ■The degree of freedom in layout on integrated circuits is drastically reduced. ■There are many drawbacks, such as there is a limit to high integration. Although the method shown in FIG. 4 is suitable for integrated circuits, there is no room for improvement in the drawbacks in its characteristics.

[Problem that the invention seeks to solve]

The present invention solves the drawbacks seen in the conventional examples,
The object of the present invention is to provide a constant current circuit that can suppress the circuit scale and achieve temperature characteristics and output current accuracy with low variation.

[Means for solving problems]

In the present invention, in an electronic circuit consisting of a reference signal generation section, an error amplification section, a feedback section, and an output control section, a first conductive type deblessing circuit IFI! :T and second conductivity type enhancer)
a reference signal generating section in which IPETs are connected in series, the gate electrode and source electrode of the first 71 FETs are connected, and the gate electrode of the second FET is connected to the drain electrode; and a first conductivity type enhancement member. The Ith and 78 second conductive type enhancements are connected in series, and the second IPχT
a feedback section formed by connecting a gate electrode and a drain electrode of the reference signal generating section; Second IFII! the drain electrode interconnection point of T to the non-inverting input terminal of the error amplification section, while the first .T of the feedback section. The second? The drain electrode interconnection point at Ili is connected to the inverting input terminal of the error amplifier section, and the error term width section output terminal is connected to the output control section input terminal and the gate electrode of the first conductivity type IFmT of the feedback section. It is composed of

[Action/Example]

FIG. 1 is a basic conceptual diagram of the present invention. In the figure, 1 is a reference signal generation section, and 2 is a well-known general 0MO8 differential amplifier differential amplifier.
3 is a feedback section, 4 is an output control section, and 5 is an output terminal.

Fig. 2 shows a specific embodiment of the present invention. Purishi w7MO
8IFET, 7 and 8 are N-channel enhancement a
osymT, q and 10 are P channel enhancement MO3PF! It is T. Here, the reference voltage generating section 1 is
P channel MO5?1ftT6 and N channel MO31
F]! ! T7 are connected in series. P channel MOf9
1FInT6 operates in a saturation region exhibiting constant current characteristics by connecting the gate electrode to the source electrode. - On the other hand, in the N-channel MO37KT7, by connecting the gate electrode and the drain electrode, (drain-source voltage)>(effective gate voltage) is always established, and operation in the saturation region is possible.

Similarly, the feedback section 3 also has a P-channel MO3711! Connect T9 and N channel MO37mT8 in series, MO3IFKT
Regarding No. 8, the gate electrode is connected to the drain electrode in order to operate in the saturation region. MO87I! ! T9
The gate electrode corresponds to the input terminal of the feedback section 30 configured here.

The output terminal of the error amplification section 2 is MO8 which constitutes the output control section.
1M! : Gate electrode of T10 and MO8IFF of feedback section
! Connected to the gate electrode of T9.

Hereinafter, element parameters will be set for specific constituent elements and their effects will be explained.

Parameter β (flow coefficient) of each element un? o (gate threshold voltage) MO8IFET64βPa t vt+psMOf9F
ET7-nβN7 *V? N7M08IFET8-4
βN8 p vtssMO3IFET9nβPI e
VTP*M O3F ml! T1 0n
βF'lOt vchillt.

First, the operational amplifier inverting input side signal of the error amplification section 2 is expressed as V (-)'': vyl + (, /FIB//N?)A using the above number of elements.
・l Vrps l..."Similarly to (1), the current xPI of lFET9 enters the non-inverting input side, and V(+)=VyNs+(2Ips/βNS)/2""
(2) Therefore, since the feedback loop balances the equation (1) I (2), the output voltage v0 of the error amplifying section 2 is given by (3). Here, vDD is the power supply voltage, so in formula (3), (βpH/β87 Y” << 1 *
If you set the constant so that βPI = βNS, the MO8 of the output control section? II! T10 output current. is approximately IO:
βPIG (To-vyHo)”/2 medium βFIO(V
eNt-vtss)”/2”(4)
becomes. However, V? F6""? P10 (Since it is formed in the same process, it is generally achieved with high accuracy)
That is, the constant current value obtained. There is no power supply voltage ring in N-channel A/MO8'l/]! T's v? Only the H difference is included.

〔Effect of the invention〕

Therefore, according to the present invention, the following effects can be obtained.

(1) Since the output constant current value is controlled by the gate threshold difference of the PET operated in the saturation region in the feedback section and the reference signal generation section, it is not affected by power supply voltage fluctuations.

(2) Among the temperature characteristics that a semiconductor element originally has, changes in gate threshold voltage due to temperature are canceled out because they are used differentially, and the temperature characteristics are significantly improved.

(8) Furthermore, since manufacturing variations in the gate threshold voltage itself are fluctuations in absolute values, the present invention, which utilizes voltage differences, is less susceptible to this effect, which means that manufacturing variations are also significantly improved. .

(4) The depletion seal IF11fT used in the example is:
For example, in the silicon gate self-line process, when the P channel enhancement IFKT is made of n polysilicon, if a P+ diffusion can be introduced into a portion of the polysilicon, a depletion silicon FET can be formed. can be formed simultaneously.

(5) Gate threshold voltage difference n Polysilicon, P+
Polysilicon IFI! If realized with a gate threshold voltage difference of tT, it can be generated as a difference in the work functions of the element forming materials, and a theoretically stable bias voltage for constant current can be obtained.

(6) Although the circuit size is somewhat large, it can be composed entirely of active elements and is suitable for integrated circuits.

Also, it does not become a constraining element for layout.

(7) Is it used in the output control section to change the constant current value? All you need to do is change the current coefficient setting of 11iT. Therefore, settings can be changed with high precision.

In addition, the present invention has a wide range of applications.For example, since the temperature characteristics are excellent, if the constant current circuit of the present invention is used to drive the PN junction and the ode at a constant current, the temperature characteristics of the forward voltage of the diode can be actively utilized. Sensors can be incorporated.

If the constant current circuit of the present invention is used in a time constant circuit for charging and discharging a capacitor, it can be applied to a highly accurate timer circuit.

If applied to a constant current source for operational amplifiers, it can be expected to improve the power supply voltage fluctuation rejection ratio and stabilize the amplification degree, and current weighting can also be fully used as a constant current source for formula D/A conversion circuits. There are many other possible applications.

The effects explained so far are P channel and N channel MO! in the embodiment. It goes without saying that the same result can be obtained by replacing the connection relationships of the 91FETs.

[Brief explanation of the drawing]

FIG. 1 is a basic conceptual diagram of the present invention, FIG. 2 is an embodiment, and FIGS. 3 and 4 are diagrams showing conventional examples. In the figure, 1...Reference signal generation section 2...Error amplification section 5...Feedback section 4... ...Output control unit 5...Output terminal 6...P channel input MO5
IFE7.8...N channel enhancement MO3
IF]nT 9.111...P channel enhancement M
OsyI! ! 'r Above Applicant Seiko Epson Co., Ltd. Agent Patent Attorney Mogamisuji (1 other person) Yu 3: T41 and Ma ¥ + 1 聰n' 2 - Shame

Claims (2)

[Claims] (1) In a power supply circuit consisting of a reference signal generation section, an error amplification section, a feedback section, and an output control section, each of (a) a first conductivity type depletion field effect transistor (hereinafter referred to as FET)
) and a second conductivity type enhancement FET are connected in series, the gate electrode of the first FET is connected to the source electrode, and the gate electrode of the second FET is connected to the drain electrode. (b) a feedback section formed by connecting a first conductivity type enhancement FET and a second conductivity type enhancement FET in series, and connecting a gate electrode and a drain electrode of the second FET; (c) connecting the drain electrode interconnection point of the first and second FETs of the reference signal generating section to the non-inverting input terminal of the error amplifying section, and connecting the first and second FETs of the feedback section; connecting a drain electrode interconnection point of to the inverting input terminal of the error amplifying section;
On the other hand, the error amplification section output terminal is connected to the output control section input terminal and the first conductivity type enhancement FE of the feedback section.
A constant current circuit characterized in that it is configured by connecting to a gate electrode of a T. (2) The first and second conductivity type FETs constituting the feedback section and the error amplification section replace the first conductivity type with the second conductivity type, and replace the second conductivity type with the first conductivity type. A constant current circuit according to claim 1, comprising: