JPS63188226A - Two-screen display system - Google Patents

Abstract

PURPOSE:To realize a two-screen display at a low cost by consisting of a pair of bit map memories and a single display controller to form a two-screen display system. CONSTITUTION:A bit map memory 4 seems like plural independent screen areas from a microprocessor (in terms of logical sense). At the same time, the display data on plural screens are alternately set and stored in the memory 4 in terms of physical sense. While the horizontal display character number, i.e., a parameter set at a display controller 2 is set double as much as a normal case. Thus the output data obtained from the memory 4 are latched alternately by parallel/serial converters 5 and 6 and supplied to display monitors respectively. In such a way, the two-screen display is realized at a low cost together with reduction of the circuit scale. Then a compact double screen display system is obtained to contribute to the save of power.

Description

[Detailed description of the invention] [Purpose of the invention] (Industrial application field) The present invention relates to a two-screen display system.

(Prior art) In recent years, with the advancement of semiconductor technology, microprocessors, memories, and peripheral control LSIs have become available at low cost.
It has become possible to construct relatively high-performance computer systems simply by appropriately combining these. Above peripheral control L
One of the SIs is a CRT controller. The CRT controller has the function of generating display timing signals such as horizontal and vertical synchronization signals for the display monitor based on parameter settings by the microprocessor, and also generates and outputs memory addresses for the display memory.

On the other hand, with the development of man-machine interfaces, more advanced functions are required of the display devices that serve as the core of the interfaces, and devices that can display graphics, images, etc. in addition to the conventional character display are emerging. These devices are required to have bitmap control technology.

(Problems to be Solved by the Invention) Recently, there have been requests to display the contents of multiple screens of refresh memory in an overlapping manner, or to display two screens in one system, in addition to requests for multi-window display. . It has two display monitors and displays independent content, and is suitable for use in applications where one displays drawings and the other displays explanatory content in the form of documents. However, in such applications, the display control circuit and the display memory must be provided separately, which is problematic in terms of cost.

1- The present invention has been made in view of the above circumstances,
It is an object of the present invention to provide a two-screen display system that can realize two-screen display with an inexpensive configuration.

[Structure of the Invention] (Means and Effects for Solving the Problems) In order to achieve the above-mentioned object, the present invention comprises a two-screen display system including one set of bitmap memories and one display controller. For this reason, the bitmap memory looks like (logically) multiple independent screen areas to the microprocessor, and physically has a structure in which the display data of multiple screens is set and stored alternately. The number of horizontally displayed characters, which is one of the parameters to be set, is set to double the normal number. As a result, the output data obtained from the bitmap memory is alternately latched into a plurality of parallel-to-serial conversion circuits and supplied to each display monitor.

This makes it possible to provide a two-screen display system with a low-cost configuration, and also produces secondary effects such as compactness and power saving.

(Example) Hereinafter, an example of the present invention will be described in detail using the drawings.

FIG. 1 is a block diagram showing an embodiment of the present invention. In the figure, reference numeral 1 denotes a microprocessor (.mu.CPU) that reads/writes display data, and also sets parameters for a CRT controller 2, which will be described later. Reference numeral 2 denotes a CRT controller (CRTC) which generates read addresses for display, etc. for a bitmap memory, which will be described later. 3 is a selector (SEL). The selector 3 obtains address data from the microprocessor 1 and CRT controller 2, and selectively outputs one of the addresses. The main component is a bitmap memory (BMM) that stores display data. 5 and 6 are the bitmap memory 4 mentioned above.
A parallel-to-serial conversion circuit (P/S) that converts display data obtained from ? into serial data.・8 is the display monitor (CRT)
).

FIGS. 2 and 3 are diagrams cited to explain the operation of the embodiment of the present invention, and are a diagram showing a memory map of a bitmap memory and a diagram showing the correspondence between a microprocessor and memory addresses, respectively.

Hereinafter, the operation of the embodiment of the present invention will be explained in detail.

FIG. 2(a) is a logical configuration diagram of the bitmap memory 4 as seen from the microprocessor 1. The upper half (address θ to I PFFF) is the bitmap memory 4 corresponding to the display monitor 7, and the lower half (address 20
000 to 2 FFPF) is the bitmap memory 4 corresponding to the display monitor 8.

Now, the display monitor 7 is to display the characters "01234587", and the display monitor 8 is to display the characters "ABCDEFG■". At this time, in Figure 2 (
On the physical bitmap memory shown in b), “吋23
ABCD 4587 EPCll” is written.

In other words, the display data on the display monitors 7 and 8 are written alternately. This can be understood from the correspondence diagram of microprocessor 1 address and memory address shown in FIG. Parallel-to-serial conversion circuits 5 and 6 in Figure 1
Then, the output data of the bit map memory 4 is latched alternately in units of words (32 bits), converted into serial data in the time of two words, and output to the respective display monitors 7 and 8.

In other words, by setting a parameter in the display controller 2 that is twice the number of horizontal characters as the number of horizontal characters, only one
The two bitmap memories and only one display controller 2 make it possible to display independent contents on the two display monitors 7 and 8.

[Effects of the Invention] As explained above, according to the present invention, a two-screen display can be realized with a low-cost configuration, and the number of circuit configurations can be reduced, contributing to compactness and power saving.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIGS. 2 and 3 are diagrams cited to explain the operation of the embodiment of the present invention. FIG. 3 is a diagram showing correspondence of memory addresses. 1...Microprocessor (μCPU), 2...Display controller ((:RTC), 4...Bit map memory (BMM), 5/6...Parallel-serial conversion circuit (
P/S), 7, 8...Display monitor (CRT). Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Hill Figure 2 Figure 3

Claims (1)

[Claims] In a display system with multiple display monitors, the only display control controller that controls the display based on parameters set by a microprocessor and sets the number of horizontal display characters, one of the above parameters, to double the normal number. , a single display controller that is logically set to multiple times, a single display controller that logically has multiple independent screen areas, and a single display controller that physically stores the display data of multiple screens alternately. Alternately latching output data obtained from one bitmap memory and the above bitmap memory,
A two-screen display system comprising a parallel-to-serial conversion circuit that converts the data into serial data and supplies the data to each display monitor.