JPS63187421U - - Google Patents
Info
- Publication number
- JPS63187421U JPS63187421U JP7851787U JP7851787U JPS63187421U JP S63187421 U JPS63187421 U JP S63187421U JP 7851787 U JP7851787 U JP 7851787U JP 7851787 U JP7851787 U JP 7851787U JP S63187421 U JPS63187421 U JP S63187421U
- Authority
- JP
- Japan
- Prior art keywords
- differential amplifier
- circuit
- transistor
- amplifier circuit
- reactance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000010586 diagram Methods 0.000 description 6
Landscapes
- Networks Using Active Elements (AREA)
- Amplifiers (AREA)
Description
第１図は、本考案の可変リアクタンス回路の一
実施例を示す回路図、第２図は、第１図の可変リ
アクタンス回路の位相特性を示す図、第３図は、
トランジスタの等価回路を示す図、第４図はトラ
ンジスタのベースから見た容量を示す図、第５図
は、本考案の可変リアクタンス回路の他の実施例
を示す回路図、第６図は、従来の等価リアクタン
ス回路を示す回路図である。
Ａ１，Ａ２：差動増幅回路、ＣＭ１，ＣＭ２：
ＭＯＳ型容量素子、Ｉ１，Ｉ２：可変電流源回路
、Ｒ１，Ｒ２：負荷抵抗。
FIG. 1 is a circuit diagram showing an embodiment of the variable reactance circuit of the present invention, FIG. 2 is a diagram showing the phase characteristics of the variable reactance circuit of FIG. 1, and FIG.
FIG. 4 is a diagram showing the capacitance seen from the base of the transistor. FIG. 5 is a circuit diagram showing another embodiment of the variable reactance circuit of the present invention. FIG. 6 is a diagram showing the conventional variable reactance circuit. FIG. 2 is a circuit diagram showing an equivalent reactance circuit of FIG. A 1 , A 2 : Differential amplifier circuit, CM 1 , CM 2 :
MOS type capacitive element, I 1 , I 2 : variable current source circuit, R 1 , R 2 : load resistance.
Claims (1)
の差動増幅回路と、負の等価リアクタンスとして
動作する第２の差動増幅回路と、前記第１と第２
の差動増幅回路の夫々の入力端を共通に接続して
、その共通接続点を出力端子に接続し、前記第１
と第２の差動増幅回路に制御信号を印加すること
によつて、前記出力端子から見た等価リアクタン
スが負から正の所定値迄変化するようにしたこと
を特徴とする可変リアクタンス回路。 (2) 前記リアクタンス回路が、第１と第２のト
ランジスタからなる差動対と第１の負荷回路、及
び第１の可変電流源回路からなる第１の差動増幅
回路を含み、該第１のトランジスタのベース・コ
レクタに第１のＭＯＳ型容量素子が接続され、且
つ第３と第４のトランジスタからなる差動対と第
２の負荷回路、及び第２の可変電流源回路からな
る第２の差動増幅回路とを含み、該第３のトラン
ジスタのコレクタと該第４のトランジスタのベー
スに第２のＭＯＳ型容量素子が接続され、該第２
と第３のトランジスタのベースが共通接続されて
バイアスされ、該第１と第４のトランジスタのベ
ースが共通接続されて出力端子に接続されてなる
実用新案登録請求の範囲第１項記載の可変リアク
タンス回路。[Claims for Utility Model Registration] (1) A first device that operates as a positive equivalent reactance.
a differential amplifier circuit, a second differential amplifier circuit that operates as a negative equivalent reactance, and a differential amplifier circuit that operates as a negative equivalent reactance;
The respective input terminals of the differential amplifier circuits are connected in common, and the common connection point is connected to the output terminal, and the first
and a second differential amplifier circuit, whereby the equivalent reactance seen from the output terminal changes from a negative value to a predetermined positive value by applying a control signal to the second differential amplifier circuit. (2) The reactance circuit includes a first differential amplifier circuit including a differential pair including a first and a second transistor, a first load circuit, and a first variable current source circuit, and A first MOS type capacitive element is connected to the base and collector of the transistor, and a second transistor includes a differential pair consisting of a third and fourth transistor, a second load circuit, and a second variable current source circuit. a differential amplifier circuit, a second MOS type capacitive element is connected to the collector of the third transistor and the base of the fourth transistor;
The variable reactance according to claim 1, wherein the bases of the first and fourth transistors are commonly connected and biased, and the bases of the first and fourth transistors are commonly connected and connected to the output terminal. circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987078517U JPH0513063Y2 (en) | 1987-05-25 | 1987-05-25 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987078517U JPH0513063Y2 (en) | 1987-05-25 | 1987-05-25 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63187421U true JPS63187421U (en) | 1988-11-30 |
| JPH0513063Y2 JPH0513063Y2 (en) | 1993-04-06 |
Family
ID=30927537
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987078517U Expired - Lifetime JPH0513063Y2 (en) | 1987-05-25 | 1987-05-25 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0513063Y2 (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5957515A (en) * | 1982-09-27 | 1984-04-03 | Sanyo Electric Co Ltd | Variable reactance circuit |
-
1987
- 1987-05-25 JP JP1987078517U patent/JPH0513063Y2/ja not_active Expired - Lifetime
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5957515A (en) * | 1982-09-27 | 1984-04-03 | Sanyo Electric Co Ltd | Variable reactance circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0513063Y2 (en) | 1993-04-06 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS6214815U (en) | ||
| JPS63187421U (en) | ||
| JPS602672Y2 (en) | Semiconductor integrated circuit device | |
| JPS5827541Y2 (en) | Shingoushiyori Cairo | |
| JPS6331613U (en) | ||
| JPS59813Y2 (en) | amplifier circuit | |
| JPH01160716U (en) | ||
| JPS584327Y2 (en) | amplifier circuit | |
| JPS62158921U (en) | ||
| JPS60124045U (en) | Output transistor protection circuit | |
| JPS6421518U (en) | ||
| JPS58147317U (en) | gain control circuit | |
| JPS6415415U (en) | ||
| JPS62169521U (en) | ||
| JPS62112206U (en) | ||
| JPS6157709U (en) | ||
| JPS6344521U (en) | ||
| JPS61149430U (en) | ||
| JPS59134927U (en) | variable attenuator | |
| JPS63169716U (en) | ||
| JPS6224517U (en) | ||
| JPH01162923U (en) | ||
| JPS5873616U (en) | differential amplifier | |
| JPS6185929U (en) | ||
| JPS58189612U (en) | variable phase circuit |