JPS63186618A - Electronic endoscope apparatus - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Field of Application] The present invention relates to an electronic endoscope device that can be used even with electronic scopes using solid-state image sensors with different numbers of pixels.

[Prior Art] In recent years, image carriers using solid-state image sensors such as charge-coupled devices (hereinafter referred to as CODs) as imaging means have come into wide use.

Also, in the field of endoscopy, instead of an optical endoscope (referred to as a fiberscope) that uses an image guide to transmit optical images, there is a system that does not use an image guide.
Electronic family celebration VL (referred to as electronic scope) using COD has come into practical use.

Use of the electronic scope has the advantage that captured images can be easily recorded and reproduced.

In the electronic scope, the outer diameter of the insertion portion is limited by the size of the COD, so CODs of different sizes are used depending on the site into which the COD is inserted.

[Problems to be solved by the invention] Since the number of pixels varies depending on the size of the COD,
In the conventional example, the main body of the device to which the electronic scope is connected is C.
The OD drive (drive) circuit and signal processing circuit are fixed, and there is a drawback that it can only be used for electronic scopes using CODs of the same type and specifications.

The present applicant has filed a patent application filed in 1983 as a technical example related to the present application.
In No. 7472, a scope was proposed in which an oscillator and a drive pulse generation circuit were built into the scope so that it could be used in a common device body.

In this related technology example, since each electronic scope has the above-mentioned oscillator built-in, the cost may be high and the size may become large, so there is room for improvement.

Furthermore, in Japanese Patent Application No. 61-55512, the present applicant proposed a drive pulse generating circuit unitized into a unit that can be attached to and detached from the main body of the device housing the video processor. In this related technology example, it is necessary to use a unit compatible with the scope as a bare unit, and the operation becomes complicated when there are many types.
There is a possibility of erroneous operation, and there is room for improvement.

The present invention has been made in view of the above-mentioned points, and an object of the present invention is to provide an electronic endoscopic VT device that can be used with a single device main body and operated like an hour wheel for electronic scopes having different numbers of pixels. shall be.

[Means and effects for solving the problems] In the present invention, an electronic endoscope Sj! is constructed of a plurality of electronic scopes having different numbers of pixels and a main unit to which the electronic scopes can be connected. An electronic scope connected to the device is provided with a control means for outputting a control signal corresponding to the number of pixels, and a signal processing means for setting a frequency and characteristics corresponding to the number of pixels based on this control means. It is possible to perform signal processing appropriate for the number of pixels.

[Example] Hereinafter, the present invention will be specifically explained with reference to the drawings.

1 to 9 relate to one embodiment of the present invention, FIG. 1 is a block diagram showing the configuration of one embodiment, and FIG. 2 is an explanatory diagram showing the identifier means provided at the connection part of the electronic scope. , FIG. 3 is a circuit diagram showing a scope discrimination circuit for discriminating the identifier means in FIG. 2, FIG. 4 is a block diagram showing a COD drive circuit, FIG. 5 is a timing chart diagram for explaining the operation of FIG. Figure 6 is a configuration diagram showing the configuration of a low-pass filter.
Figure 7 is a block diagram showing the configuration of the memory control circuit;
9 is a block diagram of the horizontal contour correction circuit, and FIG. 9 is a waveform diagram for explaining the operation of FIG. 8.

As shown in FIG. 1, an electronic endoscope device (electronic scope device) 1 according to one embodiment includes an electronic endoscope (electronic scope device) in which an imaging means is incorporated.
an electronic scope) 2, a light source section 3 that supplies illumination light to the electronic scope 2, a signal processing section 4 that converts signals captured by the electronic scope 2 into video signals that can be displayed on a display device,
It consists of a main body device 6 that houses a control means for determining the electronic scope 2 that is attached and performing signal processing corresponding to the electronic scope 2 that is attached.

The electronic scope 2 has an elongated insertion section 7 for easy insertion into a body cavity, and an objective lens 8 and a CCD 9 as a solid-state image element are disposed on the distal end side of the insertion section 7. means are included.

Further, a light guide 11 for transmitting illumination light is inserted into the insertion section 7, transmits the illumination light supplied from the light source section 3, and emits it from the distal end surface, and the emitted illumination light is distributed. It is expanded by the lens 12 and illuminates the subject 13 side.

The light source section 3 that supplies illumination light to the end surface of the light guide 11 on the proximal side includes a light source lamp 14, a lens 15 that condenses and irradiates the illumination light of the light source lamp 14 onto the end surface of the light guide 11, this lens 15, and It consists of a rotating filter 16 interposed in the optical path between the end faces of the light guide 11, and a motor 17 that rotationally drives the rotating filter 16.

The light source lamp 14 is a white light source such as a xenon lamp, and the rotary filter 16 is a white light source such as a xenon lamp, and the rotary filter 16 is a light source that transmits light in red, green, and blue wavelength ranges, that is, red, green, and blue light that transmits R, G, and B, respectively. Each of the transmission filters 16R, 216G, and 16B is formed into a fan shape, and by rotating the rotary filter 16, these R and G signals can be changed.

The customer's site uses B3 primary colors and is designed to be illuminated in sequential order. The rotation of the motor 17 that rotates the rotary filter 16 is controlled by a single rotation servo circuit.

The motor 17 is equipped with a frequency reference generator and a phase reference generator. By this rotation servo circuit 19,
The rotation of the motor 17 is based on the frame frequency (NT
In the case of the SC method, the phase synchronization becomes 29.971-12).

Subject 13 illuminated sequentially with the above 8 lights of R, G, and B
is imaged by the objective lens 8 on the specific image plane of the CCD 9, and the COD
The photoelectrically converted signal is read out by application of a drive pulse for transfer and readout by the drive circuit 21 . Incidentally, this drive pulse and the signal of the rotation servo circuit 19 are synchronized signal generation'? A synchronizing signal is input to the ti22 and used to display the read signal.

The output signal of the CCD 9 is amplified by a preamplifier 23 forming the signal processing section 4, and is input to a double sampling circuit 25 via an isolation circuit 24 that protects the patient from electric shock.

This double sampling circuit 25 performs double sampling to remove 1/f and reset 1-noise included in the COD output signal, removes noise components, and performs S/N.
to an improved signal. This signal passes through a low pass filter (LPF) 26 to remove unnecessary high frequencies such as those of the CCD carrier, and is input to a γ correction circuit 27 where it is subjected to γ correction.

That is, the non-linearity (usually γ=2.2) of the electrical/optical conversion system when displaying on a display tube is corrected and then input to the A/D converter 28. This A/D converter 28 converts the signal into a digital signal, and the signal transferred under the sequential illumination is stored in the frame memories 29R, 2'9G, 2.
The signal read out from the CCD 9 is written into 9B one frame at a time. That is, for example, the image is carried under illumination with red light through the red transmission filter 16R, and the read signal is written into the frame memory 29R. Thus, when image data for one frame is written to each frame memory 29R, 29G, 29B, they are read out at the same time.
Each signal is converted into an analog signal by a D/A converter 31, unnecessary high frequencies are removed by a low-pass filter 32, and each signal is input to a horizontal contour correction circuit 33. The conversion speed of the upper Δ/D converter 28 and the input/output of data to and from each frame memory 29R, 29G, 29B are controlled by an output signal from a memory control circuit 34.

The output signal of this memory control circuit 34 is generated in synchronization with the synchronization signal of the synchronization signal generator 22.

The signals subjected to horizontal contour correction in the horizontal contour correction circuit 33 are each amplified by an output amplifier 35, and R, G, [3
It is designed so that it can be output from the output end as a three primary color signal. Further, the composite synchronization signal of the synchronization signal generator 22 is also outputted from the synchronization signal output terminal through the output amplifier 36.

R, G, B output through each output amplifier 35 and output)
By inputting the synchronizing signal output through the j amplifier 36 to an RGB compatible monitor, the subject image can be displayed in color.

By the way, when each electronic scope 2 is connected to the main unit 6, it is necessary to perform signal processing corresponding to the number of pixels of the connected electronic scope 2, and a means for outputting a signal for discrimination is provided. It is being Then, the main device 6 takes this signal into the scope discrimination circuit 41, and sends a control signal suitable for the discriminated scope to a component circuit that needs to switch the frequency and characteristics in accordance with the number of pixels when the number of pixels changes. to be applied.

The identifier means and scope discriminating circuit 41 for outputting the above-mentioned discrimination signal are shown in FIGS. 2 and 3, respectively.

As shown in Figure 2, the connector 4 (of each electronic scope 2)
2A and 428.42C are provided with two terminals 43 and 43 that output signals for detecting the number of pixels of the scope 2 (other signal terminals are omitted), and the main unit 6 The scope discrimination circuit 41 discriminates the resistance value between these two terminals 43 and 43, and based on the discrimination result, a part in the signal processing unit 4 that performs signal processing depending on the number of pixels corresponds to the number of pixels. Switch to perform signal processing.

For example, when there are three electronic scopes each having a different number of pixels, the two terminals 43, 43 of the connector 42A of the first electronic scope with the smallest number of pixels are short-circuited with the conductor 44, and the second electronic scope has the smallest number of pixels. In the connector 42B of the second electronic scope having a number of terminals 43 and 43, for example, 22
The connector 42G of the third electronic scope, which is connected with a 0Ω resistor RD and has a larger number of pixels, has two terminals 43.
43 is left open to equivalently connect an infinite resistance.

On the other hand, the scope discrimination circuit 41, as shown in FIG.
It has two connector receiver input ends 45, 45, one input end 45 is connected to a +5V power supply end, the other input end 45 is connected to a non-inverting input end of a comparator 46.47, and for example It is grounded via a 220Ω resistor RD.

To the inverting input terminal of one comparator 46, a voltage 1 of, for example, 3 to 4 cm is applied by a base Q voltage source, and to the inverting input terminal of the other comparator 47, a voltage of 1 to 2 cm, for example, is applied by a reference voltage source. Voltage V2 (2) is applied. Therefore, the output terminals 41a, 41a of each comparator 46, 47
A 2-bit signal outputted from the scope becomes a control signal outputted in accordance with the number of pixels of the scope.

In this configuration, for example, when the connector 42Δ of the first scope is connected, the comparators 46 and 47 which serve as control signals
Each output becomes ゛tobi° 11 H11, and when the connector 42B of the second scope is connected, the comparator 4
The output of 6,47 is “l l II, 11 Hl
! , and at the connector 42C of the third scope, the outputs of the comparators 46 and 47 are “L II , 11 H
Become II. The control signals output through these two output lines are transmitted to the COD drive circuit 21, the clamp pulse/sampling pulse generation circuit 48, the horizontal contour correction circuit 33, the memory control circuit 34, and the low-pass filters 26, 32, 32. .32 are applied to perform signal processing appropriate to the number of pixels of the connected scope. still,
The memory control circuit 48 controls the A/D converter 28,
And the conversion clock of each D/Δ converter 31 is controlled.

Each circuit that is controlled by the control signal to perform signal processing appropriate for the number of pixels will be described below.

The COD drive circuit 21 and the clamp pulse/sampling pulse generation circuit 48 have a block configuration shown in FIG.

The output clock of the reference clock generation circuit 51 is frequency-divided by a 1/N frequency divider 52, and this frequency-divided clock is input to the waveform generation circuit 53 on the COD drive circuit 21 side, and is also input to the double clamp pulse generation circuit 48. The signal is also input to a waveform generation circuit 54 that forms a waveform. Further, this frequency-divided clock passes through the 1/M frequency divider 55 of the COD drive circuit 21, is roughly divided in frequency, and is also input to the waveform generation circuit 56.

The 1/N frequency divider 52 and the 1/M frequency divider 55 are those whose frequency division ratios can be switched between 1/N and 1/M by the control signal. The waveform generating circuit 53 on the COD drive circuit 21 side to which the output clock of the 1/N frequency divider 52 is input generates a reset pulse as shown in FIG. 5(a) and a horizontal transfer as shown in FIG. 5(b). It outputs a pulse φF11 etc. and outputs a COD output signal as shown in the same figure (C).
Output from CD9. On the other hand, the waveform generating circuit 54 to which the clock of the 1/N frequency divider 52 is input and forming the clamp pulse/sampling pulse generating circuit 48 is connected to the fifth waveform generating circuit 54.
Clamp pulses and sampling pulses are output as shown in Figures (d) and (Q).

In other words, using the reset pulse and horizontal transfer pulse, C
The output signal read from the CD 9 has a reset pulse portion and a feed through portion mixed into the signal portion, as shown in FIG. 5(C). Therefore, a clamp pulse whose phase is slightly delayed from the reset pulse and a sampling pulse synchronized with a signal portion whose phase is roughly delayed from this clamp pulse are generated, and these clamp pulses and sampling pulses are applied to the double number combining circuit 25. to remove noise components such as reset pulses, and
/N has been improved.

The clock of the 1/N frequency divider 52 is roughly input to the waveform generator 56 via the 1/M frequency divider 55, and vertical n transfer pulses corresponding to the number of vertical pixels are generated.

As the number of pixels of the CCD 9 increases, the frequency of the COD driving pulse becomes higher, so the signal band of the COD image signal outputted by the pulse becomes wider and the maximum frequency also becomes higher.
It is also necessary to make the cutoff frequency of 6 high, and if there are few prime numbers, it is desirable to lower the cutoff frequency to prevent unnecessary harmonics from being mixed into the signal. The same can be said of the signals obtained when the image signal data written in each of the memories 29R, 29G, and 29-8 is read out and then subjected to D/Δ conversion. For this reason, in one embodiment, the filter characteristics of each low-pass filter 32 and 26 are switched by a control signal.

For example, the low-pass filter 26 has a configuration as shown in FIG. The signal inputted from the input end via the double sampling circuit 25 passes through the buffer 7 amplifier 61, and then passes through the first . 2nd degree 30th-pass filter 62a, 6
2b, 62c.

is input. Each low pass filter 62a, 62b, 6
The output terminal of 2c is grounded via matching resistors Ra, Rb, and RC, and each contact 63a of the analog switch 63
, 63b, 63C are connected. Each contact 63a of this analog switch 63.

63b and 63c are electrically connected to the switching contact 63d by the control signal, and the signals are guided to the next stage via the buffer 7 amplifier 64.

Above 1. Second. Third low-pass filter 62a, 62
b and 62c, for different numbers of pixels, unnecessary harmonics are removed by cutting off frequencies higher than the B1 frequency component included in the signal determined by the drive pulse used for readout according to the sampling theorem. There is.

Further, the control signal output from the scope discrimination circuit 41 is transmitted to the memory control circuits 34R134G and 34 shown in FIG.
B, R, 'G, and B memories 29R, 2, respectively.
The timing of filling signal data into 9G and 29B and reading out the written signal data is changed to correspond to the number of pixels. In FIG. 7, for example, the memory control circuit 34R that controls the R memory 29R will be explained, but the configurations of the other memories 29G and 29B and their respective controls will be explained.
The memory control circuits 34G and 34B have similar configurations.

The master clock of the reference clock generator within the synchronization signal generator 22 is the master clock of the reference clock generator within the synchronization signal generator 22. Second
．． Third light pulse generator 71a.

71b and 71G, and is also input to the read pulse source section 72 and the write/read control section 73.

Above 1. Second. Third light pulse generator 71a, 71
b and 71c generate write pulses corresponding to each number of pixels, and are input to the write pulse switching circuit 74, respectively.

This light pulse switching circuit 74 is connected to the scope discriminating circuit 4.
The write pulse to be output is selected by the control signal from 1, and the selected write pulse is input to the read/write switching circuit 75. This read/write switching circuit 7
5 has two digital input terminals and two digital output terminals (each having a multi-bit configuration), and has two digital input terminals and two digital output terminals (each having a multi-bit configuration).
Depending on the output signal of the read control circuit 73, the write pulse inputted from the write pulse switching circuit 74 side and the read pulse inputted from the read pulse generation section 72 side can be switched and outputted from two output terminals. . For example, when signal data imaged under R illumination is input through the A/D converter 28, the signal data is written into the R first memory 77a, for example. On the other hand, a write pulse that has passed through the write pulse switching circuit 74 (for example, when a write mode signal is applied from the write/read control circuit 73) is applied to the address end. In this state, the other R
The second memory 77b is in a state where the read pulse from the read pulse generator 72 can be applied, and the read pulse is applied at a predetermined timing (when the R first memory is in the read mode, the write mode is set), and the write The input signal data is read out. Each memory 77a.

77b is a dynamic RAM such as tri-state
It is composed of IC such as static RAM.

R 1st. Output selection circuits 78a and 78b are provided at the data output terminals of the R second memories 77a and 77b, respectively.
The on/off state is controlled by the write/read control circuit 73, for example, ``Tobi'' or L)l. These output selection circuits 78a and 78b are turned on in the write mode and later in the read mode, and the read signal data is
The data is converted into serial data via the output selection circuit 78a or 78b, and is output to the D/A converter 31 at the next stage. These output circuits 78a and 78b are also composed of tri-state ICs and the like.

Note that memory control during reading is determined by the signal format such as NTSC, regardless of the scope having a different number of pixels.
may be fixed.

On the other hand, without fixing this read pulse generating section 72, the first. Second. Third light pulse generator 71a, 71
b, 71c may have the same configuration as the write pulse switching circuit 74, and the frequency of the read pulse may be selected by the control signal of the scope discrimination circuit 41. Furthermore, R
1st. The eight memories of the second memories 77a and 77b are used so that there is no shortage when the maximum number of pixels is used, and when the number of pixels is small, a part of the eight memories is used.

Note that the same read pulse generator 72 is used for the Q memory and B memory control circuits 34G and 34B. In other words, in read mode, R, G, B memory 2
The signal data written in 9R, 29G, 29[3 will be read out simultaneously, and at that time, there will be no problem in write mode operation.
9B is provided with two memories as described above so that write operations and read operations can be performed independently.

In addition, the above read mode is for R, G, B memory 29R, 29
Since this is performed simultaneously for G and 29B, one read pulse generating section 72 may be used in common without providing three sets of the read pulse generating sections 72.

The signal data simultaneously read out from each of the memories 29R, 29G, and 29B is converted into an analog signal by the D/A converter 31 whose conversion clock number is controlled by the memory control circuit 34, and is input to the low-pass filter 32, respectively.

Each low-pass filter 32 has a circuit configuration similar to that shown in FIG. 6, and is band-controlled to a band corresponding to the number of pixels and is input to the horizontal contour correction circuit 33, respectively. Each horizontal contour correction circuit 33 is also configured to perform appropriate contour correction according to the number of pixels, and its configuration is shown in FIG. A signal inputted from the input terminal via the low-pass filter 32 is delayed by, for example, Ta in the first delay line 81, and then transferred to the second delay line 82.
However, it is delayed by Ta. Therefore, if the signal applied to the input terminal is as shown in FIG. 9(a), the delay line 8
The signals that have passed through 1.82 become as shown in (b) and 1 (c) of the same figure. The delay lines 81 and 82 are provided with taps, and each tap is connected to an analog switch 83.
．． A control signal from the scope discrimination circuit 41 is applied to both analog switches 83 and 84, and the tap to be selected is determined by this control signal.

The tap selected by this control signal, that is, the amount of delay, is set in advance to be an appropriate correction according to the number of pixels.

The signal input from the input terminal and the signal delayed by the second delay line 82 are added by the first adder 85, and
The signal becomes the signal shown in FIG. 4(d), and this signal passes through the coefficient multiplier 86 which makes it -172, becomes the signal shown in FIG. Signals are also manually inputted to this correction device 87 via the first delay line, and these signals are input to the side to become the signal shown in FIG. 9 (1'). It is input to a third adder 89. The signal that has passed through the first delay line 81 is also input to this adder 89, and these are added to form a horizontal contour-corrected signal as shown in FIG. is output to.

Incidentally, instead of the tap-type delay lines 81 and 82 used for the above-mentioned delay, a line whose delay amount can be variably substituted by voltage may be used.

Although the first embodiment has been described as having three different numbers of pixels, it can be similarly constructed with two or four or more pixels. If the number is increased, terminals 43 and 43 used for scope discrimination may be connected with terminals having roughly different resistance values, and the number of comparators in the scope discrimination circuit may be increased. Alternatively, the number of terminals may be increased and a large number of terminals may be distinguished by a combination thereof.

By the way, in the first embodiment described above, an electronic scope that can be used with a field-sequential image transport type electronic scope is described, but the present invention is an electronic scope that uses a mosaic filter placed in front of the imaging surface of the CCD 9 under white illumination. The same applies to scopes with different numbers of pixels. In this case, as shown in FIG. 1, the output of the γ correction circuit 27 is separated into color signals by three 4-non-pull hold circuits, and the output of each sample hold circuit is guided to the low pass filter 32. good. Also, in this case, the rotating filter 1
6 etc., the rotation servo circuit 19 is unnecessary. With the scope connected as in the above-mentioned embodiment, the scope can be detected by the scope discrimination circuit 41, and the output signal of the scope discrimination circuit 41 can be used to detect CO.
D drive circuit 21, double sampling circuit 25, low pass filters 26 and 32, horizontal contour correction circuit 33.
1. All you have to do is switch the numbering pulse etc. of the number hold circuit.

In the above-mentioned embodiment, the output of the scope discrimination circuit 41 automatically switches the desired circuits to change the frequency and characteristics according to the number of pixels so as to perform signal processing suitable for the number of pixels. However, the present invention is not limited to this, and it is necessary to manually switch to perform signal processing appropriate for the number of pixels based on a detection means that can determine the number of pixels of the scope. It is said that (also,
1) You may also set the circuit frequency or characteristic sound switching.

Further, in the above embodiment, if adjustment of the horizontal contour, vertical contour, etc. is not required, switching according to the number of pixels as described above or providing the contour correction circuit may be omitted. Further, the low-pass filters 26 and 32 can also be cut off at a fixed frequency if the image quality is not significantly degraded.

In addition, a part of the signal processing section is switched so that it can detect whether a field-sequential electronic scope or an electronic scope using a mosaic filter is connected, and perform signal processing suitable for the connected electronic scope. You can also make it possible to deal with it.

Note that a part of the circuit that performs signal processing may be included.

[Effects of the Invention] As described above, according to the present invention, means for performing signal processing corresponding to the number of pixels of the electronic scope is formed in the signal processing section provided on the main unit side to which the electronic scope can be connected. Therefore, it can be used in common with electronic scopes with different numbers of pixels with simple operations.

[BRIEF DESCRIPTION OF THE DRAWINGS] FIGS. 1 to 9 relate to one embodiment of the present invention, FIG. 1 is a block diagram showing the configuration of one embodiment, and FIG. 2 is a block diagram showing the configuration of the electronic scope. 3 is a circuit diagram showing a scope discrimination circuit for determining the identifier shown in FIG. 2, FIG. 4 is a block diagram showing a COD drive circuit, and FIG. 5 is an explanation of the operation of FIG. 4. Fig. 6 is a configuration diagram showing the configuration of the low-pass filter, Fig. 7 is a timing diagram for
8 is a block diagram showing the configuration of the memory control circuit, FIG. 8 is a configuration diagram of the horizontal contour correction circuit, and FIG. 9 is a waveform diagram for explaining the operation of FIG. 8. 1...Electronic endoscope device 2...Electronic scope 3.
...Light source part 4...Signal processing part 5...Control part 6...Main device 21...COD drive circuit 25...Double sampling circuit 26...Low pass filter 28...Δ/D Converters 29R, 29G, 29B...Memory 31...D/Δ converter 32...Low pass filter 33...Horizontal contour circuit 41...Scope discrimination circuit 48...Clamp pulse/sampling generation circuit No. 5
Figure 6 ￥ I18 Slow 7 ヂ 1 From separate word in the 9th Ward M -1FL -Gore Procedure Nehoho] (Sparked) July 23, 1986

Claims (1)

[Scope of Claims] An electronic endoscope that uses solid-state imaging devices with different numbers of pixels as imaging means can be mounted, and that can process signals input from the imaging means and display them on a monitor device. In an endoscope device, a means for outputting a signal corresponding to the number of pixels, a drive pulse generating means for applying a drive pulse with a different frequency to the solid-state image sensor corresponding to the number of pixels, and a drive pulse generating means corresponding to the number of pixels. An electronic endoscope apparatus comprising: memory timing control means for writing signals read from the solid-state image sensor into a memory or the like and reading written signal data.