JPS63186109A - Method and circuit for interpolation of measuring instrument - Google Patents

Abstract

PURPOSE:To take a measurement with high accuracy according to a detection signal which is outputted corresponding to variation in various physical quantities of an object of measurement and to select an in-use unit by setting an angle of interpolation to a value which divides a detection signal of plural pitches equally. CONSTITUTION:An arithmetic coefficient storage circuit 10 utilizes preset arithmetic coefficients and detection signals (a) and (b) of plural (5) pitches to find a comparison signal VC in period relation with between the phase angle thetaand angle phi of interpolation corresponding to the corresponding angle phi of interpolation, thereby dividing the detection signals (a) and (b) equally by 127 by a detector which generates the detection signals (a) and (b) whose one period (pitch) is 1 minch. Then intermediate pulses are fed back 60 to switch output addresses of the arithmetic coefficients by an arithmetic coefficient storage circuit 10, and then a comparator 43 is compares the comparison signal VC with the reference signal VS and a count pulse generating circuit 40 generates count pulses e(f) with resolution of 1mum by a processing circuit 51.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention uses human power to generate multi-phase detection signals that are output in accordance with the amount of relative movement of corresponding members, and changes the phase angle θ of the detection signals. The present invention relates to an interpolation method for a measuring device and its circuit, which generates count pulses for high-resolution measurement by interpolating at a preset interpolation angle φ.

(Background technology and its problems) Physical quantities such as length and weight are converted into relative displacement amounts of corresponding members that can be relatively displaced, and multiple phase signals are output according to the relative displacement amounts. 2. Description of the Related Art Measuring devices that measure a detection signal while subjecting it to predetermined processing are widely used. As shown in FIG. 5, such a measuring device employs, for example, a photoelectric detector 1, a main scale 2 attached to a force member, and an optical grating of the main scale 2 corresponding to the main scale 2; A detector 1 includes an index scale 3 having an optical grating and is attached to the other member, and a detector 1, and a plurality of phases (As1n θ in the case of FIG. 5) output from the detector 1. and an interpolation circuit 100 that obtains count pulses e and f for fine pitch measurement from detection signals a and b of two phases (A and cos θ), and the count pulse e.

It was possible to output f to an appropriate device 4 such as a digital display including a counter or an NC servo mechanism.

Here, the interpolation circuit 100 for implementing the interpolation method divides the phase angle θ (360°) into a preselected number of divisions N(
This method was introduced to achieve high resolution by interpolating at an interpolation angle (an integer), that is, at an interpolation angle φ, and generating count pulses e and f for measuring a pitch smaller than the pinch of the detection signal a (b). It is something that

However, the conventional interpolation method and its circuit have the following problems.

Since the detection signal a (b) is cyclic, the measurement accuracy or resolution is determined by interpolating one period (pitch) as the minimum unit to a predetermined number of divisions. Therefore, as shown in FIG. 6(A), when the optical grating is formed so that one pitch can output a detection signal a (b) of a sine wave of one winch or a waveform similar to this, for example. has an interpolation circuit 100
By dividing the pulse into 10, it was possible to generate count pulses e(f) with a resolution of 0.1 ml and 1 nch (see (B)). However, with such a configuration, it has been considered impossible to generate count pulses e(f') with a resolution of 1 μm using an interpolation method. That is, the conventional interpolation circuit 1
In the typical resistance chain system of 00 (for example, see Swiss Patent No. 407,569), 1 pitch (phase angle θ is 3
60°), so it was considered incompatible due to the difference in units. Similarly, a detection signal a (b) such as a sine wave with 1 pitch of 0.1 am, etc.
For example, 0.
It was also considered impossible to generate a count pulse e(f) of 1ml1nch.

As described above, since the configuration of the measuring device is different depending on whether the device 4 used, that is, the purpose of use is in inches or meters, it is not only a heavy economic burden for both the manufacturer and the user, but also inconvenient to handle. On the other hand, a method of converting by calculation (multiplication and division) can be considered, but this method has the problem that it is unsuitable for real-time usage such as feedback signals of NC machine tools and lacks practicality. Furthermore, it is not impossible to consider installing both inch and metric scales on the same main scale 2, but in this case, not only the main scale, index scale 3, light emitting/receiving device, etc. would become larger, but also the interpolation circuit The method itself becomes complicated and has no practical value.

Note that this problem is a common technical problem even when the detector 1 is a capacitance type detector, an electromagnetic type detector, or the like instead of a photoelectric type detector.

Therefore, there has been a strong demand for the development of an interpolation method and circuit for a measuring device that can be easily and arbitrarily selected according to the unit of equipment used without changing the equipment configuration.

[Purpose of the invention]

The present invention provides an interpolation method for a measurement device and its circuit, which can achieve high precision measurement based on detection signals output in response to changes in physical quantities of a measurement target, and can easily select units of use. The purpose is to

[Means and effects for solving the problems] The present invention has the following features:
It is possible to generate count pulses of a selected unit with high precision that is not affected by the characteristics of circuit components such as resistors, and while keeping the configuration of the detector constant.

For this reason, the first invention inputs a plurality of phase detection signals output according to the amount of relative displacement of the corresponding member, and calculates a preset interpolation angle φ based on a change in the phase angle θ of the detection signal.
An interpolation method of a measurement device for generating count pulses for measuring a pitch smaller than the pitch of a detection signal by interpolating the detection signal at a pitch, the interpolation angle φ being set to a value that equally divides the detection signal over a plurality of pitches. The above objective can be achieved with a configuration that can be used.

Therefore, for example, in a detector that generates a detection signal a (b) with one cycle (pinch) of l m1nch, the interpolation angle φ is equivalent to dividing the detection signal a (b) over a plurality of (5) pitches into 127 equal parts. It is possible to generate a count pulse e(f) with a resolution of 1 μm.

Further, the second invention receives as input a multi-phase detection signal output according to the amount of relative displacement of the corresponding member, and interpolates it at a preset interpolation angle φ based on a change in the phase angle θ of the detection signal. , an operation coefficient corresponding to an interpolation angle set to equally divide the detection signal over a plurality of pitches in an interpolation circuit of a measuring device for generating count pulses for measuring pinches smaller than the pitch of the detection signal. a computation coefficient storage circuit for storing a computation coefficient; and a comparison signal ■ which is a periodic function of the phase angle θ and the interpolation angle φ from the detection signal and the computation coefficient. and the comparison signal ■. a count pulse generation circuit for generating a formed count pulse, including an intermediate pulse generation circuit that generates an intermediate pulse synchronized with a clock pulse by comparing the reference signal Va and a reference signal Va; The above object is achieved by a configuration including a switching circuit for feeding back pulses to switch the output address of the calculation coefficient of the calculation coefficient storage circuit.

Therefore, for example, in a detector that generates a detection signal a (b) with one period (pitch) of l m1nch, the interpolation angle φ is equivalent to dividing the detection signal a (b) over a plurality of (5) pinches into 127 equal parts. A comparison signal vc, which is a periodic function of the phase angle θ and the interpolation angle φ, is obtained by using the calculation coefficients preset in the calculation coefficient storage circuit and the detection signal a (b) in correspondence with each other, and the intermediate pulse is fed back. If the output address of the calculation coefficient is switched by the comparison signal Vc
By comparing the reference signal Va and the reference signal Va, the count pulse generation circuit generates a count pulse e(f
) can be generated.

〔Example〕

DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of an interpolation method for a measuring device according to the present invention and an interpolation circuit for carrying out the method will be described in detail with reference to the drawings.

The interpolation circuit 100 of this embodiment is formed to include an arithmetic coefficient storage circuit 10, an arithmetic circuit '20, and an intermediate pulse generation circuit 41, as shown in FIG. 2 showing an overall outline and FIG. 3 showing its details. It is composed of a count pulse generation circuit 40 and a switching circuit 60.

The configuration and functions of each of these elements will be explained below.

First, the calculation coefficient storage circuit 10 stores calculation coefficients respectively corresponding to the interpolation angle φ, and
It is formed from an MII and a second ROM 12. In this embodiment, the detection signal output from the detector 1 is a two-phase signal a of a cosine wave (cos θ) and a sine wave (sin θ),
b, the calculation coefficients are a cosine wave (cosφ) and a sine wave (-
sinφ), and the first ROMII and the second RO
They are sequentially stored at predetermined addresses of M12.

Here, the interpolation angle φ, which is one of the characteristics of the present invention, is determined by converting the plurality of pinches (periods) of the detection signal a (b) to an arbitrary number N.
, and each interpolation angle φl (,,.

, 1. ! , +N-1). Specifically, since 1 pinch, that is, the phase angle θ is 2π, 10π, which is equivalent to 5 pinches, is 12
It is assumed that the interpolation angle φ is divided into seven equal parts. 1 pitch is 1 m
This is to perform interpolation to generate a count pulse e with a resolution of 1 μm by dividing the 1-nch detection signal a into 127 parts over 5 pitches as shown in FIGS. 1(A) and 1(B).

Therefore, as seen in (C), the interpolation angle Δφ is 1
It becomes 0π/127. In this embodiment, the calculation coefficient storage circuit 10 is stored in one pitch, that is, the phase angle θ of the detection signal a.
It is also switchable so that the range of 360° can be divided into N equal parts.For example, if N=100, 1/100 m
It is also possible to generate a 1 nch count pulse e.

Based on the address signal outputted from the switching circuit 60 via the address bus 74, the first ROMII transfers the calculation coefficient cos φ1 stored at the corresponding address to the calculation circuit 20 via the D/A converter 15. Output to. Similarly, based on the address signal output from the switching circuit 60, the second ROM 12 outputs -5inφ, which is the calculation coefficient stored at the corresponding address, to the calculation circuit 20 via the D/A converter 16. It is formed like this.

Further, since the switching circuit 60 is for feeding the intermediate pulse c (d) described later to switch the output address stored in the calculation coefficient storage circuit 10, the intermediate pulse c
(d) is formed from a reversible counter that can count and specify an output address, and is configured so that when the above-mentioned division number N is selected in the calculation coefficient storage circuit 10, it can be automatically switched to follow the N-advance counter. has been done.

Next, the arithmetic circuit 20 outputs the detection signals a (A sin θ),
b (Acos θ) and operational coefficient cos φ,
The comparison signal ■ is a periodic function of the phase angle θ and the interpolation angle φ. It is composed of two multipliers 21 and 22 and an adder 23. Therefore, as shown in FIG. 3, the multiplier 21
θ・cos φ, and the multiplier 22 calculates −Acos θ・
sin φ, are calculated and output. As a result, the adder 23 can calculate and output the comparison signal vc shown in the first equation.

VC=A sin θ' cos φr −A cos
e 0sin φdirection = Asin(θ−φ,)
(1) The count pulse generation circuit 40 is composed of an intermediate pulse generation circuit 41, an oscillator 48, and a processing circuit 51, and generates count pulses e and f for measurement.
This outputs the following. Here, intermediate pulse generation circuit 4
1 is a comparison signal■. is the reference signal (reference value) ■.

In this embodiment, the comparator 43 and the launch circuit 44 . First and second AND gates 45 and 46 are formed.

A predetermined reference value V8 is set in the comparator 43, and a comparison signal (2) is calculated and output from the adder 23. When exceeds the reference value (■), an H level signal is output.

Further, the first AND gate 45 performs an AND operation on the output of the comparator 43 and the clock pulse CP output from the oscillator 48, and outputs an up pulse C. Further, the second AND gate 46 inputs the inverted output of the comparator 43, performs an AND operation on this input signal and the clock pulse CP output from the oscillator 48, and calculates the down pulse d.
Output.

Note that the output of the comparator 43 is temporarily held in a latch circuit 44. This is to expand the applicable range of the frequency of the clock pulse CP.

Another feature of the present invention is that each time the up pulse C or the down pulse d as an intermediate pulse is output, the first ROM 11 and the second ROM
The objective is to sequentially switch and control 12 read addresses.

Therefore, in this embodiment, as described above, the switching circuit 60 is used as the addressing means, and the switching circuit 60 receives the output from the first AND gate and the second AND gate 45, 46. Intermediate pulses, that is, up pulse C and down pulse d, are respectively input.

Therefore, every time the amplifier pulse C or the down pulse d is output, the switching circuit 6 formed from a reversible counter
0 increments or decrements the added value, and controls switching of the read addresses of the first and second ROM II and 12 to the adjacent address.

In other words, the detection signals a (sin θ), b(cos θ
) is the interpolation angle φ, and φ8. ．． Assuming that the multiplier 21 of the arithmetic circuit 20 has an interpolation angle φ8. Operation coefficient cos based on I
φ4.1 is input, and similarly, the multiplier 22 receives an operation coefficient -5in φ3. ．． is input. At this time,
Comparison signal ■ output from adder 23. From the first equation, (V, =) As1n (θ-φ8.l).

In this case, the phase angle θ becomes ■cζ0 when it becomes φ1 times θ and φi11. Therefore, if the reference signal Vs of the comparator 43 is set to O, when θ=φ8°, an H level signal is output from the comparator 43 at the same time, and the first AND gate 45 is output in synchronization with the clock pulse CP. Amplifier pulse C is output from. Subsequently, by the up pulse C, the calculation coefficients cos φl+2, - based on the interpolation angle φ4.2 are sent from the calculation coefficient storage circuit 10 via the switching circuit 60.
3ln φi+2 is output, and the comparison signal ■ is output from the adder 23. becomes a negative value again, and the output of the comparator 43 is also switched to L level.

Therefore, the phase angle θ becomes the interpolation angle φ, and φ,. 1, intermediate pulses c and d are output alternately, and the processing circuit 5
1 eliminates alternate intermediate pulses.

In the following, the phase angle θ is the interpolation angle φ, When crossing 1, the intermediate pulse C is continuously output, so the processing circuit 51 outputs the count pulse e.

Furthermore, in this embodiment, the processing circuit 51 of the count pulse generation port B40 is formed as a damper circuit in consideration of the actual operation of the measuring device. In other words, in the case of the measuring device shown in FIG. The first AND gate 45 and the second AND gate 46 of the circuit 41 alternately output the amplifier pulse C and the down pulse d as shown in FIGS. 4(F) and 4(G).

In the interpolation circuit 100 of this embodiment, the damper circuit is used in order to prevent the output of such wasteful count pulses.

In the embodiment, the damper circuit as the processing circuit 51 is
It is formed from a set reset flip-flop 52, a third AND gate 53, and a fourth AND gate 54.

This damper circuit operates only when the up pulse C or the down pulse d is continuously outputted from the first or second antagonal gate 45, 46 as shown in FIG.
Third AND gate 53 or fourth AND gate 54
Outputs an up pulse C or a down pulse d from.

When the amplifier pulse C and the down pulse d are alternately output from the first and second AND gates 45 and 46, the third AND gate 53
And the fourth AND gate 54 does not output any count pulse.

This embodiment has the above configuration, and its operation will be explained next.

First, for convenience of explanation, 3 laps 81M (pitch) is N (8)
The case of division will be explained using FIG. 4. Therefore, each ROM 11.12 of the calculation coefficient storage circuit 1o has an interpolation angle φl when the pitch is "°3" and N is 8".
(+"l+2+ff+..., 8) is stored, and the switching circuit 6o is set as N (=8) base.

Here, the detection signal sin θ output from the detector 1,
For example, the phase angle θ of cos θ is the interpolation angle φ. and φ1, the first ROMII and the second ROM 12 of the calculation coefficient storage circuit 1° determine the interpolation angle
Cosine wave signal cos φ as an arithmetic coefficient based on 1
1 and a sine wave signal -5in φ, respectively, are output.

Therefore, the signal output from the adder 23 at this time is -V, =Asin (θ-φ,).

At this time, the phase angle θ is φ. Since θ and φ1, the calculated value (comparison signal) ■o becomes smaller than the reference signal VS, the down intermediate pulse d is output, and the output address of the switching circuit 60 is moved down. Then, the interpolation angle φ is sent to the comparator 43. Comparison signal corresponding to ■.

and reference signal (2) are output, amplifier intermediate pulse C is generated, and thereafter temporary intermediate pulses c and d are output alternately.

Therefore, as shown as CI in (F), θ=φ
1, an H level signal is successively output from the comparator 43, and an up pulse C as an intermediate pulse is subsequently output from the first AND gate 45 in synchronization with the clock pulse CP.

In this way, the detection signals sin θ and cos
Almost at the same time when the phase angle θ of θ becomes θ=φ, an up pulse C is successively output from the first AND gate 45, and the address signal of the switching circuit 60 formed from a reversible counter is incremented.

Thereafter, the first and second ROM IIs and 12 output a cosine wave signal cos φ2 and a sine wave signal sin φ2 based on the interpolation angle φ2, and the adder 23 outputs a signal ■. becomes a negative value again, and the output of the comparator 43 also switches to L level.

In this way, according to the interpolation circuit 100 of this embodiment,
The phase angle θ of the detection signals sin θ and cos θ is the interpolation angle φ. , φ1. Every time it passes through φ2..., an up pulse C is outputted successively, and a count pulse e for measurement can be outputted via the processing circuit 51 (same (H)
reference). Also, the detector 1 stops and the detection signal sin θ
Even if the phase angle θ of CQS θ does not change, since the processing circuit 51 is formed of a damper circuit, the count pulse e for amplifier counting and the count pulse f for down counting will not be generated alternately.

In this embodiment, the case where the phase angle θ of the detection signals sin θ and CO3θ changes in the positive direction has been explained as an example. Member or scale 2.3
, the second AND gate 46 outputs a count pulse f for down counting corresponding to the amount of displacement of the scale 2.3.

As a result of this operation, as shown in Fig. 4, if the detection signal a (b), which has a phase angle θ (=ωL) with one period (pinch) of 2π, is divided into N(8), the result is 135° (Δφ -6
An amplifier count pulse e (down count pulse r) can be output every π/8). Therefore, one lap as shown in Figure 1! 111 (pinch) is 1 m1nch
A detector l is formed which outputs a detection signal a(b) of (25,4II m), and this interpolation circuit outputs a detection signal a(b) of 5 periods (25,4II m).
By interpolating N (=127) by dividing X5・127 μm), the resolution is 1 for each angle determined by Δφ=10π/127.
It is possible to output an amplifier count pulse e of μm.

Therefore, according to the interpolation method of the measuring device and the interpolation circuit 100 according to this embodiment, the detection signals sin θ and cos
The number N of divisions of θ can be arbitrarily set as the number of interpolation angles φ stored in the calculation coefficient notation t12 circuit 10. Therefore, it is possible to generate high-resolution count pulses without adding any special circuit configuration.Also, since no complicated arithmetic processing is required, the detection signal s
in θ and c.

Count pulses can be output in real time based on changes in the phase angle θ of S θ. Therefore, for example, NC
It can be used in a very wide range as a displacement measurement device for feedbank control of machinery and other real-time control devices.

In addition, the division accuracy of the detection signals sin θ and CO3θ is not affected by variations in components as in conventional resistance divider circuits, and even if the number of divisions is increased or decreased, the number of components does not increase. do not have. Therefore, with the circuit of the present invention, it is possible to perform highly accurate measurements without being affected by the components used and always with a constant circuit configuration.

In particular, the calculation coefficient storage circuit 10 determines an interpolation angle φ so as to equally divide the detection signal a(b) by an arbitrary number N over a plurality of pitches (periods) of the detection signal a(b), and each interpolation angle φ
Detector 1 (in the case of photoelectric type, especially the configuration of the optical grating provided on the main scale)
It is possible to output a count pulse e(f) in a unit that is adapted to the specifications of the device 4 used regardless of the situation. In other words, it is possible to mutually switch between inch and metric units without having to provide scales for metric units and inch units on the detector 1, and without performing arithmetic processing for conversion that would impede the use of real time. Alternatively, it has an excellent effect of being able to perform any desired division.

Furthermore, since the switching circuit 60 is formed to function as an N-ary ring counter when the number of divisions is N in the calculation coefficient storage circuit 10, automation and reliable interpolation operation are guaranteed from this point as well.

Furthermore, the processing circuit 5 of the count pulse generation circuit 40
Since 1 is formed from a damper circuit, unnecessary count pulses e (f) are not output alternately even if there is no change in the detection signal, so there is no need to attach an input pulse monitoring circuit, etc. to the device using the servo mechanism, for example. It also has the effect of being able to provide reliable control. Furthermore, since the intermediate pulse generating circuit 41 is provided with a latch circuit 44, it can be applied as is even if the frequency of the clock pulse CP from the oscillator 4 is low due to the purpose of the measuring device, etc., thereby increasing the usability.

Furthermore, regarding the entire interpolation circuit 100, I
Since it is easy to convert into C and can be made compact and power saving, it is extremely advantageous especially as a portable measuring device.

Note that in the above embodiment, the calculation coefficient storage circuit 10
For example, the phase angle θ is the interpolation angle φ.

and φ, then the interpolation angle is φ1
Although the explanation has been given by taking as an example the case where φ is set, the present invention is not limited to this, and in this case, the interpolation angle is set to φ. It is also possible to set In this case, the phase angle θ is θ=φ. The reference value V may be set so that at the same time, the comparator 43 outputs an H level signal.

Furthermore, even if the detection signals a and b are not sine waves or cosine waves, the above configuration can be applied as is as long as the comparison signal vo is within a range that can be approximately approximated by sin (θ-φ). on the other hand,
Although the detection signal is of two phases (a, b), it may be of multiple phases, such as four phases, for example.

Furthermore, in the embodiment, the detection signals a and b are A s in
When θ, A c, os θ, the calculation coefficient is co
s φ, -5in φ and the comparison signal VC is As1.
n (θ-φ), but the point is that the comparison signal vc only needs to be a periodic function of the phase angle θ and the interpolation angle φ, so the calculation coefficients are selected as cos φ and sin φ, and the comparison signal ■. Acos (θ−φ) [=Acos θ' cos
φ+As1n θ・sin φ], and similarly, the calculation coefficients are tanφ and l/lan φ, and the comparison signal ■.

As in θ(1/lanθ−1/lan φ
) (=Acos θ-Asin θ・1ha anφ)
You can also use it as However, −π/4≦φ, π/4 and 3
/4 π≦φ<5/4 When π, the comparison signal VC is A cos θ(tan θ−tan φ) (=A
sin θ−A cos θ・tan φ).

Furthermore, in configuring the interpolation circuit 100 of the present invention, the arithmetic circuit 20. Although the comparator 43 is used for analog calculation and comparison, it may also be a digital type. Further, although the count pulse generation circuit 4o is provided with a processing circuit 51 consisting of a damper circuit, the type of the processing circuit 51 can be freely selected depending on the equipment 4 used.

Therefore, the present invention is applicable even when the damper circuit is omitted. In addition, in not only linear type but also rotary type detectors, it is possible to calculate the minute
The present invention is also applicable to cases where count pulses are generated in units of seconds.

Of course, in the above embodiments, the detection signal a (b) output from the photoelectric detector 1 is interpolated, but the point is to generate an italic signal with a certain period (pitch). The detector 1 may be of a capacitance type, an electromagnetic type, etc. since it is applied to various objects. Also, the period (pitch)
A setter for the number and division number N is provided or ROMII, 1
It is also within the scope of the present invention to configure and implement the system so that the base number of the switching circuit 60 is automatically switched when the number 2 is replaced.

〔Effect of the invention〕

The present invention provides an interpolation method and its circuit for a measuring device that achieves highly enjoyable measurement based on detection signals output in response to changes in physical quantities of a measurement target and that allows easy selection of units of use. can do.

[Brief explanation of the drawing]

FIG. 1 is a principle explanatory diagram showing an example of an interpolation method for a measuring device according to the present invention, FIG. 2 is a schematic overall configuration diagram of an interpolation circuit for implementing the interpolation method, and FIG. 3 is a similar interpolation circuit. 4 is a timing chart of each signal when three periods are divided into 8, FIG. 5 is an overall configuration diagram of a measuring device including a conventional interpolation circuit, and FIG. 6 is a conventional interpolation method. FIG. 10... Arithmetic coefficient storage circuit, 20... Arithmetic circuit, 4
0...Count pulse generation circuit, 41...Intermediate pulse generation circuit, 51...Processing circuit used as a damper circuit, 60...Switching circuit.

Claims (3)

[Claims] (1) Input multi-phase detection signals output according to the amount of relative displacement of the corresponding member, and interpolate with a preset interpolation angle φ based on the change in the phase angle θ of the detection signal. An interpolation method for a measuring device for generating a count pulse for measuring a pitch smaller than a pitch, characterized in that the interpolation angle φ is set to a value that equally divides the detection signal over a plurality of pitches. Interpolation method for measuring equipment. (2) In claim 1, the interpolation angle φ is 10π when the pitch of the detection signal is 2π.
The interpolation method of the measuring device is set to a value of /127. (3) Input the multi-phase detection signals output according to the amount of relative displacement of the corresponding member, and interpolate with a preset interpolation angle φ based on the change in the phase angle θ of the detection signal. In an interpolation device of a measurement device for generating count pulses for measuring pitches smaller than a pitch, an operation for storing operation coefficients corresponding to interpolation angles set to equally divide the detection signal over a plurality of pitches. a coefficient storage circuit; an arithmetic circuit that calculates a comparison signal V_c that is a periodic function of the phase angle θ and the interpolation angle φ from the detection signal and the arithmetic coefficient; and a clock signal that compares the comparison signal V_c and the reference signal V_a. a count pulse generation circuit for generating a formed count pulse including an intermediate pulse generation circuit that generates an intermediate pulse synchronized with the pulse; and a calculation coefficient storage circuit that feeds back the intermediate pulse from the intermediate pulse generation circuit. An interpolation circuit for a measuring device, comprising: a switching circuit for switching an output address of a calculation coefficient;