SU1742740A1 - Harmonic signal frequency meter - Google Patents

Abstract

This invention relates to a measurement technique and is intended to measure the frequency of a harmonic signal. The aim of the invention is to improve the accuracy of frequency measurement. The invention includes a converter 1, calculators 2, 4, registers 3, 6, meter 5, decoder 7, memory element 8, generator 9, element 10. A feature of the invention is the introduction of elements 8, 10, registers 3, 6, calculator 4, decoder 7, with their connections. 2 Il.

Description

The invention relates to a measurement technique and is intended to measure the frequency of a harmonic signal in a wide frequency range.

The aim of the invention is to improve the accuracy of frequency measurement.

FIG. 1 shows a block diagram of a device for measuring the frequency of a harmonic signal; in fig. 2 is a structural diagram of the prototype with the calculator of the argument and the half-period meter highlighted in it.

A device for measuring the frequency of a harmonic signal contains an analog-to-digital converter (ADC) 1, calculator 2 arguments, first shift register 3, calculator 4, half-time meter 5, second shift register 6, decoder 7, memory element 8, pulse generator 9, element 10 delays. If necessary, an exemplary meter of 11 time intervals may be included in the device, which will make it possible to correct the numbers recorded in the storage element 8.

The output of the A / D converter 1, whose information input, combined with the information input of the half-period meter 5, is the device input, through the serially connected calculator 2 arguments, the first shift register 3 is connected to the first input of the calculator 4, the output of which is the device output, and the second and third the inputs are connected respectively to the first and third outputs of the decoder 7, the first input of which is connected to the output of the second shift register 6, the input of which is connected to the information output of the half-time meter 5, tact the first input of which is combined with the ADC clock inputs 1, 2 of the argument calculator is connected to the output of the pulse generator 9, the first and second control inputs of which are connected respectively to the control and enable output meter 5 half cycle, allowing the output of which is connected

fe

also through the element 10 delay to the clock inputs of the shift registers 3, 6, while the output of the storage element 8 is connected to the second input of the decoder 7.

The calculator 2 arguments contains the second and third blocks 12, 13 delays, the second, third and fourth registers 14, 15, 16 of memory, adders 17, divisor 18.

The information input of the calculator 2 argument is the information input of the second register 14 of the memory, the clock input of the fourth register of the 16 memory register, combined with the input of the second delay unit 12, and the output of the calculator 2 argument is the output of the divider 18.

Half time meter 5 contains shift register 19, element IL1 / 1-NOT, pulse generator 21, trigger 22, AND 23 element, pulse counter 24, clock generator 25, first memory register 26, first delay block 27.

The information input of the half-cycle meter 5 is the pulse generator 21 input, the clock input is the input of the shift register 19, the information output is the output of the first memory register 26, the enabling output is the third output of the shift register 19, the control output is the output of the AND 23 element.

A device for measuring the frequency of a harmonic signal operates as follows.

In the initial state, the value T0 / 2 is stored in the storage element 8, where T0 is the period of the following clock pulses at the output of the pulse generator 9. The measured signal does not arrive at the information input of the half-time meter 5, the half-time meter has 1 at the resolving output, O is at the control output, the code corresponding to 0 is at the information output. The internal oscillator 9 of the pulse generator runs continuously, but the clock pulses the output of the latter is missing.

The device measures the frequency of the harmonic signal based on the expression

one

f (2n + 1) +

2n: That (-1G.K..P (

frequency) provides, using expression (1), a frequency measurement in a wide range;

Ui, lJ2, U3 are the instantaneous values of the input signal voltage of the device, obtained respectively at the instants of time ti, t2, and xs, which follow through the interval T0.

Upon arrival at the device input of the first positive half-period of the measured harmonic signal, pro-. a measurement of the duration of this half-period 1 / (2f) Tn.n is carried out with a half-time meter 5, at the information output of which then the result appears

measurement, and at the control output a negative voltage drop, which is fed to the first control input of the generator 9 pulses, from the output of which the clock pulses begin to flow to

clock inputs of ADC 1, calculator 2 arguments and half-time meter 5. At the output of the A / D converter 1, at intervals T0, the values Ui, U2, and Uz appear in digital form, respectively, which are sequentially recorded in the memory registers of the calculator 2 argument.

After the arrival of the third clock pulse, i.e. After receiving the ADC 1 Oz, the positive output of the half-period meter 5 appears at the output of the meter, which is fed to the second control input of the pulse generator 9, which stops outputting clock pulses to its output. At this point, the argument 2 calculator calculates the value (U3 + Ui) / (2 U2), which is fed to the input of the first shift register 3, while the half-period measurement is present at the input of the second shift register 6. The value (U3 + Ui) / (2 -Da) is written to the first shift register 3 in the delayed delay element 10 by a positive pulse, and the half-period 1 / (2 -f) to the second register

6 shift. The value 1 / (2 -f) is fed to the first input of the decoder 7, to the second input of which from the storage element 8 the value T0 / 2 is applied. The decoder 7 calculates the value of 2 TgT0, the ratio

YY / 2) (2 -f) l To-f

and according to the following rule, 5, 0,, 0, p-1 1,, 5,

where f is the estimate of the measured frequency;

, 1415926 ...;

, 1,2,3 ... are numbers whose change depending on the value of T0f (f is the measurable

determine the value of

From the first and second outputs of the decoder 7, respectively, the values of n and 2 TgT0

served on the second and third inputs of the calculator 4, the first input of which from the output of the first shift register 3 receives the result of the division (U3 + Ui) / (2 Ite). Based on these values, calculator 4 calculates an estimate of the frequency of the harmonic signal using formula (1) and outputs the measurement result to the device output.

In this case, the half-period meter 5, until the end of the current measurement cycle, does not respond to the positive half-period of the input signal arriving at its input. The next measurement cycle begins only after obtaining the measurement result with the arrival of the first positive half-period of the harmonic signal.

In the invention, the crystal oscillator operates continuously and without frequency tuning, which allows realizing the potential capabilities of the generator in terms of the stability of the intervals between clock pulses, and thus improves the accuracy of the frequency measurement.

Claims (1)

Invention Formula A device for measuring the frequency of a harmonic signal containing an analog-to-digital converter and a half-period meter, the inputs of which are combined and are the input of the device, calculator L r1  and iij 0 five 0 five 0 the argument, whose input is connected to the output of the analog-digital converter, the pulse generator, the output of which is connected to the clock inputs of the analog-digital converter, the calculator of the argument and the half-cycle meter, the control and enabling outputs of which are connected respectively to the first and second controlled inputs of the generator pulses, characterized in that, in order to improve the measurement accuracy, a delay element, a first shift register and a calculator connected in series, a second shift register and g a decoder connected in series, a storage element whose output is connected to the second input of the decoder, the input of the delay element connected to the resolving output of the half-cycle meter, the input of the first shift register connected to the output of the argument calculator, the information output of the half-cycle meter connected to the input of the second shift register, clock input which is connected to the output of the delay element, the first and second outputs of the decoder are connected respectively to the second and third inputs of the calculator, the output of which Is the output of the device. h 1 Fig 2