JPS63185574A - Polishing control system for semiconductor wafer - Google Patents

Abstract

PURPOSE:To improve the polishing precision of a finished wafer by installing a controller for calculating the optimum polishing time of a semiconductor based on each accumulative value of the polishing quantity and polishing time in the past cycles. CONSTITUTION:The setting thickness of a semiconductor wafer transported by a transport part 2 is measured by a measurement part 3. Then, the wafer is polished by a polishing device 5, and the finishing thickness of the semiconductor wafer after polishing is measured in a measurement part 7. The values measured by the measurement parts 3 and 7 are input into a controller 8, and the polishing portion is calculated from an aimed thickness of the semiconductor wafer which is previously input in an input device 9 and the measurement values, and a polisher 5 is drive-controlled. The controller 8 successively integrates the polishing quantity and polishing time in each cycle, and the average polishing speed is calculated on the basis of the accumulative value. Then, the optimum polishing time is calculated on the basis of the speed and the polishing portion of the semiconductor wafer in the next cycle.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention is applied to semiconductor wafers that are used for mirror boring processing (MP processing) of semiconductor wafers after slicing the semiconductor wafers that are the basis of integrated circuits and after various cleanings. This invention relates to a polishing control system.

(Prior Art) Conventionally, a semiconductor wafer is produced by slicing a columnar single-crystal silicon ingot, performing various cleanings, and then polishing it to a target thickness by mirror boring. In this case, the preparation thickness of the sliced wafer is measured, the wafer is divided into polishing margins (for example, every 5 μm), and the wafer is polished for a polishing time set for each division.

(Problem to be solved by the invention) However, in the past, polishing was performed uniformly using a polishing time set in advance for each division, so the difference in wafer thickness within each division and polishing Depending on the consumption of polishing materials such as abrasive liquid and cloth during the process, even if wafers are in the same category, the polishing eIa may change and the polishing may not be uniform. As a result, there is a loss of time during polishing operations, which reduces productivity, and also causes variations in finished thickness, which limits the ability to improve finishing accuracy.

Therefore, in the present invention, the cumulative value of each data is used to determine the polishing time that takes into consideration the polishing of the wafer and the consumption status of the polishing material, thereby reducing the variation in the finished thickness of the semiconductor wafer and improving accuracy. The purpose is to improve productivity by reducing polishing loss time and increasing productivity.

(Means for Solving Problems and Their Effects) A semiconductor wafer polishing control system according to the present invention includes an input device for inputting data such as a target thickness of a semiconductor wafer;
A preparation thickness measurement unit that measures the preparation thickness of the semiconductor wafer carried by the transfer device, a polishing device that polishes the semiconductor wafer to a target thickness, and a finishing thickness measurement unit that measures the finished thickness of the semiconductor wafer after polishing. It is equipped with a measuring section and a control device that calculates a polishing margin based on the data of the input device and the measured value from the preparation thickness measuring section and drives and controls the polishing device, and the control device controls the polishing in each cycle. (Accumulate the polishing time by 1llft, calculate the average polishing speed based on these cumulative values, and calculate the optimal polishing time based on this average polishing speed and the polishing margin of the semiconductor wafer in the next cycle. , the semiconductor wafer of the next cycle is polished by the polishing apparatus based on this optimum polishing time.

Therefore, since the average polishing speed for the next cycle is calculated based on the cumulative amount of polishing and polishing time from the previous cycle, the polishing time gradually increases as the number of cycles increases, corresponding to the degree of wear and tear of the polishing material. As a result, variations in finished wafers are reduced and finishing accuracy is improved, and time loss during polishing operations is reduced and productivity is improved.

(Example) An embodiment of the present invention will be described below based on the drawings.

FIG. 1 is a schematic diagram of the polishing system of this embodiment. From left to right in the figure, there is a loader section l that supplies wafers, a transport section 2,
A charging thickness measuring section 3 for measuring the charging thickness of a wafer, a transport section 4. A polishing device 5 for polishing a wafer, a transport section 6, and a finished thickness measuring section 7 for measuring the finished thickness after polishing are arranged in sequence, and a control device 8 is electrically connected to each of these. Also connected to the control device 8 is an input device 9 for inputting specification data such as target thickness. As shown in FIG. 2, the control device 8 includes an A/D converter 11, a microcomputer (CPU) 12, and a drive unit 13.
Detection signals d, d, from each measuring section 3, 7,
is an input signal d from the keyboard (input device) 9 via the A/D converter 11. are respectively input to the microcomputer 12. The microcomputer 12 includes an I10 board, a memory, a calculation section, a control section, etc., and has a target thickness d as shown in FIG. A polishing margin calculation means 12a calculates polishing margin Δd from Δd=d−d0 from ,
), the cumulatively stored polishing time Tn
Polishing rate calculation means 12b that calculates the average polishing rate from
and the output signal Δd of both arithmetic means, tn=
(d-do)/v, the current polishing time t
. and a polishing time calculating means 12c for calculating the polishing time.

The above average polishing speed is 9=(cumulative value of polishing amount Dn
)/(cumulative polishing time Tn). Furthermore, when replacing the polishing material, the average polishing speed 9 is calculated using an initial value v1 that is preset for each material. And the above microcomputer 1
2 to the drive unit 13. Output. This drive unit 13 is constituted by, for example, a transistor circuit, etc., and controls the drive unit for each polishing amount by a control signal t.
. The polishing is controlled based on the polishing time tn, and the polishing time tn is sequentially stored in the memory.

Next, the operation of this system will be explained based on FIG.

FIG. 3 is a flowchart showing an outline of polishing control processing in the microcomputer.

First, when power is applied to the entire system.

Step P, the microcomputer has each register,
The data in the RAM is cleared and an index indicating the number of cycles is set to n or n=o. In the first polishing cycle, n=1 in step P2, and target thickness d of the wafer in step P. , the preparation thickness d is read, and in step P, the polishing amount Δd is determined by processing Δd=d−do.

In step P5, it is determined whether n=1.
In the case of , that is, in the case of the first time, proceed to step P6 and polish with the preset polishing speed initial value v1.
d and then tn=Δd/v, and the polishing time is t. seek. Note that even when the abrasive is replaced, tn can be determined by resetting the index n=o and using the initial polishing speed value v1 similar to the above. Then, in step P, the polishing time is t.

The polishing device 5 is driven based on this, and the wafer polishing work of this cycle is completed. After that, in step P, the finished thickness d□ of the wafer after polishing is read, and in step P9, d
A process is performed in which n=dd, and the polishing amount dn actually polished in this cycle is determined, and the polishing nd is performed in step P1o. and polishing time t. are cumulative values Dn and T, respectively.
, and return to step P2.

Furthermore, when moving to the next polishing cycle, step P
2, set n=2, and perform step P3 as above. ,d
is read, and in step P, Δd of the current cycle is determined. In step P5, the process proceeds to step pH in the second and subsequent cycles.

At the step pH, the cumulative value Dn of the polishing amount stored cumulatively up to the previous cycle and the cumulative value Dn of the polishing time hi (
#T. Then, the calculation v=Dn/Tn is performed to find the average polishing rate Q. In step PI2, to=△d based on the average polishing speed Q and the current polishing margin △d
/9 is performed to obtain the current polishing time tn, and in step P, the polishing operation is performed using the currently determined polishing time tn. Then, in step P8, the current finished thickness d is read, and in step P9, the polishing amount d is determined. seek,
In step PIQ, each data is stored cumulatively and the process moves to the next cycle. Therefore, as the polishing cycle increases, the consumption of the abrasive material increases.As shown in FIG. 4, as the polishing cycle increases, the polishing time tn is adjusted to correspond to the consumption of the abrasive material. , it can be gained as time gradually increases.

In this way, in this embodiment, from the second and subsequent polishing operations, the average polishing speed is calculated based on the polishing ldn and polishing time t of each past cycle. Accurate polishing time t corresponding to the degree of change in wear of the abrasive material with increase in polishing cycles can be determined by calculating based on each accumulation (1fiD, , Tn).
By obtaining n, the wafer can be used, and variations in the thickness of finished wafers can be reduced, and polishing accuracy can be improved. Also, the polishing time t. Since the wafer is polished in each cycle, polishing loss and polishing operation loss are reduced, and productivity can be improved.

(Effects of the Invention) As explained above, according to the present invention, the polishing time of the semiconductor wafer is determined based on the respective cumulative values of the polishing amount and the polishing time of the past cycles, so that the wafer polishing margin and polishing time can be reduced. It can be obtained as a polishing time corresponding to the degree of wear and tear of the material.

As a result, it is possible to improve the polishing accuracy of finished wafers and to improve productivity.

[Brief explanation of the drawing]

1 to 4 show an embodiment of the present invention, FIG. 1 is a schematic diagram of a polishing control system, FIG. 2 is a block diagram of a control device, and FIG. 3 is a schematic diagram of polishing control processing. Flowchart, FIG. 4 is a diagram showing the relationship between the polishing cycle and the polishing time. 2... Conveyance device 3... Preparation thickness measuring section 5
...Amount of polishing 21 7. Finished thickness measuring section 8.
...Control device 9...Input device do...Target thickness d...Finish thickness △d...Polish
Ma... Average polishing speed dn, D,... Polishing amount and its cumulative value tn, To... Polishing time and its cumulative value Patent applicant: Kyushu Electronic Metals Co., Ltd. (541j!3)

Claims (1)

[Claims] An input device for inputting data such as a target thickness of a semiconductor wafer, a preparation thickness measuring section for measuring the preparation thickness of a semiconductor wafer transported by a transport device, and a polishing device for polishing a semiconductor wafer to a target thickness. , a finished thickness measuring section that measures the finished thickness of the semiconductor wafer after polishing, and a polishing margin calculated based on the data of the input device and the measurement value from the preparation thickness measuring section, and driving and controlling the polishing device. The control device sequentially accumulates the polishing amount and polishing time in each cycle, calculates the average polishing speed based on these accumulated values, and calculates the average polishing speed and the semiconductor polishing rate in the next cycle. A semiconductor wafer polishing control system that calculates an optimum polishing time based on a wafer polishing margin, and causes the polishing apparatus to polish a semiconductor wafer in the next cycle based on the optimum polishing time.