JPS63185323U - - Google Patents

Info

Publication number
JPS63185323U
JPS63185323U JP7590687U JP7590687U JPS63185323U JP S63185323 U JPS63185323 U JP S63185323U JP 7590687 U JP7590687 U JP 7590687U JP 7590687 U JP7590687 U JP 7590687U JP S63185323 U JPS63185323 U JP S63185323U
Authority
JP
Japan
Prior art keywords
counter
pulse
output
exclusive
gate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7590687U
Other languages
English (en)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7590687U priority Critical patent/JPS63185323U/ja
Publication of JPS63185323U publication Critical patent/JPS63185323U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Pulse Circuits (AREA)

Description

【図面の簡単な説明】
第１図は本考案の一実施例を示すブロツク図で
、第２図はその各部のパルス波形を示すタイムチ
ヤートである。第３図は従来の３分周回路を示す
ブロツク図で、第４図はその各部のパルス波形を
示すタイムチヤートである。 ４……カウンタ、６……遅延回路、７……イク
スクルーシブオアゲート。

Claims (1)

    【実用新案登録請求の範囲】
  1. Ｎを自然数として２Ｎ分周を行なうカウンタと
    、このカウンタの応答時間をＴ１としデユーテイ
    比５０％の入力パルスのパルス幅をＴ２としたと
    きＴ１＜Ｔｄ＜Ｔ２なる遅延時間Ｔｄを有する遅
    延回路と、この遅延回路に前記カウンタの２Ｎ分
    周出力を入力して得るパルスと前記入力パルスと
    を入力とするイクスクルーシブオアゲートとを備
    え、このイクスクルーシブオアゲートの出力を前
    記カウンタに入力し、このカウンタの出力として
    前記入力パルスを２Ｎ―１分周したデユーテイ比
    ５０％の出力パルスを得るようにした２Ｎ―１分
    周回路。
JP7590687U 1987-05-20 1987-05-20 Pending JPS63185323U (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7590687U JPS63185323U (ja) 1987-05-20 1987-05-20

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7590687U JPS63185323U (ja) 1987-05-20 1987-05-20

Publications (1)

Publication Number Publication Date
JPS63185323U true JPS63185323U (ja) 1988-11-29

Family

ID=30922486

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7590687U Pending JPS63185323U (ja) 1987-05-20 1987-05-20

Country Status (1)

Country Link
JP (1) JPS63185323U (ja)

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429955A (en) * 1977-08-10 1979-03-06 Seiko Epson Corp Frequency devider circuit
JPS56129431A (en) * 1980-03-17 1981-10-09 Nec Corp Frequency dividing circuit for odd number
JPS57159129A (en) * 1981-03-26 1982-10-01 Fujitsu Ltd Odd-numbered multiple frequency dividing output circuit

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5429955A (en) * 1977-08-10 1979-03-06 Seiko Epson Corp Frequency devider circuit
JPS56129431A (en) * 1980-03-17 1981-10-09 Nec Corp Frequency dividing circuit for odd number
JPS57159129A (en) * 1981-03-26 1982-10-01 Fujitsu Ltd Odd-numbered multiple frequency dividing output circuit

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