JPS63184726A - Liquid crystal display and its production - Google Patents
Liquid crystal display and its productionInfo
- Publication number
- JPS63184726A JPS63184726A JP62016077A JP1607787A JPS63184726A JP S63184726 A JPS63184726 A JP S63184726A JP 62016077 A JP62016077 A JP 62016077A JP 1607787 A JP1607787 A JP 1607787A JP S63184726 A JPS63184726 A JP S63184726A
- Authority
- JP
- Japan
- Prior art keywords
- ito
- film
- ito film
- pattern
- etching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004973 liquid crystal related substance Substances 0.000 title claims description 13
- 238000004519 manufacturing process Methods 0.000 title claims description 8
- 238000005530 etching Methods 0.000 claims abstract description 29
- 239000000758 substrate Substances 0.000 claims abstract description 21
- 238000004544 sputter deposition Methods 0.000 claims abstract description 12
- 239000000203 mixture Substances 0.000 claims description 14
- 229910021417 amorphous silicon Inorganic materials 0.000 claims description 8
- 238000000034 method Methods 0.000 claims description 8
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims description 6
- 239000011521 glass Substances 0.000 claims description 4
- GRYLNZFGIOXLOG-UHFFFAOYSA-N Nitric acid Chemical compound O[N+]([O-])=O GRYLNZFGIOXLOG-UHFFFAOYSA-N 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 229910017604 nitric acid Inorganic materials 0.000 claims description 3
- JZDJWEKMXXNNIM-UHFFFAOYSA-N nitric acid hydrate hydrochloride Chemical compound O.[N+](=O)(O)[O-].Cl JZDJWEKMXXNNIM-UHFFFAOYSA-N 0.000 claims 1
- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 claims 1
- 229910001887 tin oxide Inorganic materials 0.000 claims 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims 1
- 238000000059 patterning Methods 0.000 abstract description 7
- 238000002441 X-ray diffraction Methods 0.000 abstract description 6
- 238000006243 chemical reaction Methods 0.000 abstract description 4
- 238000010828 elution Methods 0.000 abstract description 4
- 238000007788 roughening Methods 0.000 abstract description 2
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 abstract 1
- 239000010408 film Substances 0.000 description 57
- 239000000243 solution Substances 0.000 description 16
- 239000007789 gas Substances 0.000 description 12
- 239000010410 layer Substances 0.000 description 5
- 239000011159 matrix material Substances 0.000 description 5
- 238000001259 photo etching Methods 0.000 description 5
- XMPZTFVPEKAKFH-UHFFFAOYSA-P ceric ammonium nitrate Chemical compound [NH4+].[NH4+].[Ce+4].[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O.[O-][N+]([O-])=O XMPZTFVPEKAKFH-UHFFFAOYSA-P 0.000 description 4
- 229910052786 argon Inorganic materials 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 3
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- OAKJQQAXSVQMHS-UHFFFAOYSA-N Hydrazine Chemical compound NN OAKJQQAXSVQMHS-UHFFFAOYSA-N 0.000 description 2
- 239000007864 aqueous solution Substances 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000000151 deposition Methods 0.000 description 2
- 230000008021 deposition Effects 0.000 description 2
- 230000018109 developmental process Effects 0.000 description 2
- 238000001312 dry etching Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000007738 vacuum evaporation Methods 0.000 description 2
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 238000002425 crystallisation Methods 0.000 description 1
- 230000008025 crystallization Effects 0.000 description 1
- 230000002950 deficient Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000002542 deteriorative effect Effects 0.000 description 1
- 238000004090 dissolution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 239000011229 interlayer Substances 0.000 description 1
- 229940110676 inzo Drugs 0.000 description 1
- 239000012528 membrane Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000002161 passivation Methods 0.000 description 1
- 230000036647 reaction Effects 0.000 description 1
- 230000007261 regionalization Effects 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 239000010409 thin film Substances 0.000 description 1
- 238000002834 transmittance Methods 0.000 description 1
- 239000011653 vitamin D2 Substances 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明はａ−５ｉ：Ｈ薄膜トランジスタ（ａ −５ｉ
ＴＦＴ）を用いた液晶ディスプレイおよびその製造方
法に関する。特に、Ａｌを主体とするソース・ドレイン
電極を形成した後にＩＴＯ画素電極を形成するのに好適
な液晶ディスプレイおよびその製造方法に関する。[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a-5i:H thin film transistor (a-5i
This invention relates to a liquid crystal display using TFT (TFT) and a manufacturing method thereof. In particular, the present invention relates to a liquid crystal display suitable for forming ITO pixel electrodes after forming source/drain electrodes mainly made of Al, and a method for manufacturing the same.
近年の情報化社会の進展に伴なって、携帯に便利で、薄
型かつ高品位画質のカラーディスプレーパネルの開発が
盛んである。中でも、各画素毎にａ−８ｉ ＴＦＴ
をスイッチング素子としてマトリックス状に配列し、駆
動するアクティブマトリックス方式液晶平面ディスプレ
ーは２００Ｘ２００画素以上の高精細化を行っても、コ
ントラスト比が劣化せず、高性能カラー表示用平面ディ
スプレーとして注目されている。このことは、例えば、
ジャーナル・オブ・ノンブリスタリン・ソリッズ７ファ
ンド７８．第１３８３頁から第１３８８頁（１９８５年
） （Ｊｏｕｒｎａｌ ｏｆ Ｎｏｎ−Ｃｒｙｓｔａｌ
ｌｉｎａ ５ｏｌｉｄｓ７７＆７８ （１９８５） ｐ
ｐ１３８３−１３８８）において論じられている。2. Description of the Related Art With the recent development of the information society, there has been active development of color display panels that are convenient to carry, thin, and have high image quality. Among them, a-8i TFT for each pixel
Active matrix liquid crystal flat displays, which are driven by arranging them in a matrix as switching elements, do not deteriorate in contrast ratio even when the resolution is increased to 200 x 200 pixels or more, and are attracting attention as flat displays for high-performance color display. . This means, for example,
Journal of Non-Blistering Solids 7 Funds 78. Pages 1383 to 1388 (1985) (Journal of Non-Crystal
lina 5olids77 & 78 (1985) p
p 1383-1388).
第１図は本発明に係る液晶平面ディスプレーの製造工程
において、ＩＴＯ透明電極のパターン形成が終了した段
階のａ−８ｉ ＴＦＴ近傍の断面図を示したものであ
る。第１図において、透光性ガラス基板１上にゲート電
極パターン２を形成し、次に、グロー放電ＣＶＤ法を用
いて、ＳｉＮゲート絶縁膜３およびａ−Ｓｉ：Ｈ膜４を
連続的に形成し、所望の形状パターン化する。さらに、
Ａｌを主体とする金属膜を真空蒸着法或いはスパッタ法
により堆積し、ホトエツチングによりソース電極パター
ン５およびドレイン電極パターン６を形成し、ａ−Ｓｉ
ＴＦＴ素子部分が完成する。この上に、ＩＴＯｆｆ
ｌを高周波スパッタ法にて堆積し、ホトエツチングによ
りソース電極５と電気的に接続した画素電極パターン７
とする。ＩＴＯ膜をＡｌ膜の後に堆積する理由はａ−Ｓ
ｉ：Ｈ膜とソースおよびドレイン電極との電気的なコン
タクト特性を劣化させないためである。また、Ａｌは安
価で比抵抗が低く、ソース・ドレイン電極配線の抵抗増
大による液晶ディスプレーの表示性能の低下を防ぐ意味
で必須の材料であり、ＩＴＯ膜も、光透過率が高く、か
つ、低抵抗な点で液晶平面ディスプレー用の画素電極と
して必須の材料である。FIG. 1 shows a cross-sectional view of the vicinity of an a-8i TFT at a stage where pattern formation of ITO transparent electrodes has been completed in the manufacturing process of a liquid crystal flat display according to the present invention. In FIG. 1, a gate electrode pattern 2 is formed on a transparent glass substrate 1, and then a SiN gate insulating film 3 and an a-Si:H film 4 are successively formed using a glow discharge CVD method. and pattern it into the desired shape. moreover,
A metal film mainly composed of Al is deposited by vacuum evaporation or sputtering, a source electrode pattern 5 and a drain electrode pattern 6 are formed by photoetching, and a-Si
The TFT element part is completed. On top of this, IT Off
pixel electrode pattern 7, which is deposited by high-frequency sputtering and electrically connected to the source electrode 5 by photoetching.
shall be. The reason why the ITO film is deposited after the Al film is a-S.
This is to prevent deterioration of the electrical contact characteristics between the i:H film and the source and drain electrodes. In addition, Al is inexpensive and has a low specific resistance, and is an essential material in the sense of preventing the display performance of liquid crystal displays from deteriorating due to an increase in the resistance of source/drain electrode wiring.ITO films also have high light transmittance and low resistivity. Due to its resistance, it is an essential material for pixel electrodes in liquid crystal flat displays.
上記の製造工程において、Ａｊｉを主体とするソース・
ドレイン電極パターンを形成した後、 ＩＴＯ画素電極
パターンをＨＣＡ −ＨＮ Ｏａ−ＨｚＯ系のエツチン
グ液で加工すると、しばしば、加工終了時点でＡｌパタ
ーンが溶出するという事故が発生した。これは、本来、
Ａｌも、ＩＴＯのエツチング液であるＨ Ｃｎ −ＨＮ
Ｏａ −ＨｚＯ系のエツチング液に溶解する性質を持
っていることに起因する。In the above manufacturing process, Aji-based sources and
When the ITO pixel electrode pattern was processed using an HCA-HN Oa-HzO-based etching solution after forming the drain electrode pattern, an accident often occurred in which the Al pattern was eluted at the end of the processing. This is originally
Al is also H Cn -HN, which is an etching solution for ITO.
This is due to its ability to dissolve in Oa-HzO etching solutions.
エツチング液中のＨＮｏａはＡ１２表面に薄いＡｌ酸化
膜を形成し、Ａｌの溶出を防止する意味で添加されてい
るが、ＩＴＯ膜のエツチング時間が長かったり、Ａｌ堆
積中に混入したＡｌ模膜中不純物、異物などの欠陥部分
が存在すると、局部電池反応などにより、上記のＡｌの
酸化効果が十分に作用しないものと考えられる。HNoa in the etching solution is added to form a thin Al oxide film on the A12 surface and prevent the elution of Al. It is thought that if defective parts such as impurities and foreign substances exist, the above-mentioned oxidation effect of Al does not work sufficiently due to local cell reactions and the like.
そこで本発明の目的は、ＨＣλ−ＨＮｏａ−Ｈｚ Ｏ系
のエツチング液に対するＩ Ｔｏ／Ａ ｆｌエッチレー
ト比を十分に大きくするＩＴＯ膜を開発し、Ａｌソース
・ドレイン電極パターン上でのＩＴＯ画素電極のパター
ン化を容易ならしめる方法を提供することにある。Therefore, the purpose of the present invention is to develop an ITO film that has a sufficiently high ITo/A fl etch rate ratio with respect to an HCλ-HNoa-Hz O-based etching solution, and to The object of the present invention is to provide a method that facilitates patterning.
上記の目的は第２図に示す如く、ＩＴＯ画素電極として
、非晶質状態のＩＴＯｇを用いることにより達成される
。非晶質状態のＩＴＯ膜を得るためには、スパッタ時の
基板温度を２５℃から１５０℃の範囲内に選び、かつ、
エツチング液の組成を第３図のＨＣ４Ｂ −ＨＮ Ｏｓ
−ＨｚＯ系の三成分系において、Ａ、Ｂ、Ｃ，Ｄ点で
囲まれる斜線で示した領域を選択することにより、達成
される。第３図において、ＨＣｊｌとは通常の濃塩酸（
濃度３６％、比重１．１８）であり、ＨＮＯｓとは通常
の濃硝酸（濃度６４％、比重１．４．０）である、第３
図は上記の濃塩酸および濃硝酸を１００％ＨＣＱおよび
１００％ＨＮ Ｏａとして、三成分系の２つの頂点にと
って記述している。The above object is achieved by using ITOg in an amorphous state as the ITO pixel electrode, as shown in FIG. In order to obtain an ITO film in an amorphous state, the substrate temperature during sputtering is selected within the range of 25°C to 150°C, and
The composition of the etching solution was changed to HC4B-HNOs in Figure 3.
This is achieved by selecting the shaded region surrounded by points A, B, C, and D in the -HzO three-component system. In Figure 3, HCjl stands for ordinary concentrated hydrochloric acid (
HNOs is normal concentrated nitric acid (concentration 64%, specific gravity 1.4.0).
The figure describes the above concentrated hydrochloric acid and concentrated nitric acid as 100% HCQ and 100% HN Oa, two vertices of a ternary system.
ちなみに、Ａ、Ｂ、Ｃ，Ｄ点の組成はＨＣｌ２：ＨＮＯ
ａ：ＨｚＯの組成比で、それぞれ、２５：２５：５０，
２：２５ニア３，２．ニア８：２０および１５：６５：
２０に対応する。By the way, the composition of points A, B, C, and D is HCl2:HNO
The composition ratio of a: HzO is 25:25:50, respectively.
2:25 Near 3, 2. Near 8:20 and 15:65:
Corresponds to 20.
ＩＴＯ膜は通常Ｉ ｎｚｏａ： Ｓ ｎｏｔ ＝９１
： ９（醜ｏｆｉ比）組成の結焼体をターゲットとして
用い、純Ａｒもしくは若干のＯｘを添加したＡｒガを放
電ガスとして高周波スパッタ法にて堆積する。第２図は
エツチング液組成として第３図におけるＥ点（ＨＣｍ
： ＨＮＯｓ： ＨｘＯ＝ １ ： ６ ： ３） ｔ
ｔＲび、ＩＴＯ膜堆積時の基板温度を変化させた時のＩ
ＴＯ／ＡΩエツチングレート比を示したものである。第
２図から、ＩＴＯ／Ａｌエッチレート比は基板温度１５
０℃以上で急激に低下することがわかる。それに対して
基板温度２５℃から１５０℃の範囲で堆積したＩＴＯ膜
はＩ Ｔｏ／Ａ ｆｉエツチレート比が３０以上であり
、Ａｍ電極パターン上でのＨｔＯ膜のホトエツチングが
容易な膜であることがわかる。基板温度１５０℃以上で
堆積したＨｔＯ膜と１５０℃以下で堆積した膜をＸ線回
折で調べたところ、１５０℃以上で堆積したＨｔＯ膜は
通常のＩｎ５Ｏｎの多結晶に元ずく回折パターンが現わ
れたのに対し、１５０℃以下で堆積した膜は明確な回折
パターンが現われず、Ｘ線回折の立場から見て結晶化の
進んでいない非晶質状態に近い膜であることが判明した
。しかも、とのＨｔＯ膜は比抵抗が５ＸＩＯ−４Ω備以
下であり、通常の多結晶状態のＨｔＯ膜の比抵抗と比較
しても、大きな遜色は認められなかった。ITO film usually has Inzoa: S not =91
: A sintered body having a composition of 9 (ugly OFI ratio) is used as a target, and pure Ar or Ar gas added with a small amount of Ox is used as a discharge gas to deposit by high frequency sputtering. Figure 2 shows the composition of the etching solution at point E (HCm) in Figure 3.
: HNOs: HxO= 1 : 6 : 3) t
tR and I when changing the substrate temperature during ITO film deposition.
This shows the TO/AΩ etching rate ratio. From Figure 2, the ITO/Al etch rate ratio is 15 at the substrate temperature.
It can be seen that the temperature decreases rapidly at temperatures above 0°C. In contrast, the ITO film deposited at a substrate temperature in the range of 25°C to 150°C has an I To/A fi etch rate ratio of 30 or more, indicating that the HtO film on the Am electrode pattern can be easily photoetched. . When examining HtO films deposited at substrate temperatures of 150°C or higher and films deposited at 150°C or lower using X-ray diffraction, it was found that the HtO film deposited at 150°C or higher exhibited a diffraction pattern based on normal In5On polycrystals. On the other hand, the film deposited at 150° C. or lower did not show a clear diffraction pattern, and from the standpoint of X-ray diffraction, it was found that the film was in a nearly amorphous state with little progress in crystallization. Moreover, the specific resistance of the HtO film was less than 5XIO-4Ω, and no significant inferiority was observed when compared with the specific resistance of a normal polycrystalline HtO film.
基板温度１５０℃以上で堆積する通常のＩＴＯ膜ＩＴＯ
を使用するデバイスで通常良く用いられているが、第１
図に示した本発明に係る構成の液晶平面ディスプレイＴ
の製造においては、ＩＴＯ／ＡＪエッチレート比が低下
するために使用することができない。Ordinary ITO film ITO deposited at a substrate temperature of 150°C or higher
It is usually used in devices that use
Liquid crystal flat display T having the configuration according to the present invention shown in the figure
It cannot be used in the production of ITO/AJ because the etch rate ratio decreases.
そこで、基板温度２５℃から１５０℃の範囲で堆積した
ＩＴｏ／Ａｌエッチレート比の高い膜を用いて、第３図
に示したＨ ＣＱ −ＨＮ Ｏａ−ＨｔＯ系で、加工性
の良好な組成範囲を調べた。その結果、前に述べたよう
に、Ａ、Ｂ、Ｃ，Ｄ点で囲まれる斜線で示した領域の組
成がＡｌパターン上のＨｔＯ膜のホトエツチングに適し
ていることが判明した。この時のエツチング液の液温は
１５℃〜２５℃の範囲である。Therefore, using a film with a high ITo/Al etch rate deposited at a substrate temperature in the range of 25°C to 150°C, we developed a composition range with good processability using the H CQ -HN Oa-HtO system shown in Figure 3. I looked into it. As a result, as mentioned above, it was found that the composition of the shaded area surrounded by points A, B, C, and D is suitable for photoetching the HtO film on the Al pattern. The temperature of the etching solution at this time is in the range of 15°C to 25°C.
上記の組成領域の設定に致った理由を以下に述べる。ま
ず、線分Ａ、Ｂの外側の領域ではＡｌのエッチレートが
小さく、ＩＴＯ／Ａｌエッチレート比を大きが、電池反
応によって１局部的なＡｌの溶解現象が発生しやすい。The reasons for setting the above composition range are described below. First, the etch rate of Al is low in the regions outside the line segments A and B, and even if the ITO/Al etch rate ratio is high, a local dissolution phenomenon of Al tends to occur due to the battery reaction.
線分ＣＤの外側の領域はＨｔＯ膜のエッチレートが０．
５ｉｍ／ｓ 以下と小さくなりすぎて、実用的ではな
い。線分ＣＤの外側の領域ではＡｌ表面が不均一にエツ
チングされ、ザラザラに荒れた表面になる。線分ＤＡの
Ｄ点に近い外側の領域ではＩＴＯ／Ａｆｌエツチングレ
ート比が最も小さくなり、ＩＴＯとＡｎの選択エツチン
グに適さない、また、線分ＤＡのＡ点に近い外側の領域
では、ＨｔＯ膜のエツチングレートがｌＱｎｍ／ｓ以上
と大きくなりすぎて、エツチングの制御が困難となり、
実用上使用できない領域である。In the area outside the line segment CD, the etch rate of the HtO film is 0.
The speed is too small, 5 im/s or less, and is not practical. In the area outside the line segment CD, the Al surface is etched non-uniformly, resulting in a rough and rough surface. In the outer region near point D of line segment DA, the ITO/Afl etching rate ratio is the smallest, making it unsuitable for selective etching of ITO and An. In the outer region near point A of line segment DA, the HtO film is The etching rate becomes too large, exceeding lQnm/s, and it becomes difficult to control the etching.
This is an area that cannot be used practically.
従って、第２図で述べた堆積時の基板温度を２５℃から
１５０℃の範囲内で堆積したｘｍ回折的に見て非晶質状
態のＩＴＯ［［をＡｌパターン上） で直接選択的に
エツチングするためには、第３図のＡ、Ｂ、Ｃ，Ｄ点で
囲まれる斜線で示した領域内のＨＣ１１−ＨＮ Ｏａ−
ＨｘＯ系エツチング液組成を使用することが必要である
。Therefore, the deposited ITO, which is in an amorphous state as seen by xm diffraction, is directly selectively etched on the Al pattern when the substrate temperature during deposition is within the range of 25°C to 150°C as described in FIG. In order to do this, the HC11-HN Oa-
It is necessary to use an HxO based etchant composition.
本発明の方法はａ−８ｉ ＴＦＴ を用いたアクティ
ブマトリックス方式の液晶ディスプレイの製造方法に適
用できるばかりでなく、ＡΩパターン上でＩＴＯ透明電
極をパターン化する他のデバイスにも適用できることは
言うまでもない。It goes without saying that the method of the present invention can be applied not only to a method for manufacturing an active matrix type liquid crystal display using a-8i TFT, but also to other devices in which ITO transparent electrodes are patterned on an AΩ pattern.
以下、本発明の一実施例を第１図による説明する。 An embodiment of the present invention will be described below with reference to FIG.
透光性のガラス基板１上に金属Ｃｒを高周波スパッタ法
により膜厚０．１５μｍに堆積する。これを硝酸第２セ
リウムアンモニウム水溶液をエツチング液として用いた
ホトエツチング法により所望の形状のゲート電［２およ
びゲート電極配線とする０次に、グロー放ｆｆ１ｃＶＤ
法により、窒化シリコン（Ｓ ｉ Ｎ）膜となるゲート
絶縁膜３を膜厚０．３μｍに堆積し、引き続いて、連続
的に、ａ−８ｉ ： Ｈ（ｉ） １Ｉｕ４を膜厚０．３
５μｍ、ｕ−Ｓｉ：Ｈ（ｎ）膜４を膜厚０．０４μｍ
に堆積する。この時、放電ガスとして、ＳｉＮ膜３は５
ｉＩ（ａ−ＮＨａ−Ｎｚ系の混合ガスを用い、ａ−Ｓｉ
：Ｈ（ｉ）膜は５ｉＨａ−Ｎｚ系の混合ガス、ａ−Ｓｉ
：Ｈ（ｎ）膜はＳ ｉ Ｈａ −Ｈｚ −Ｐ Ｈａ系の
混合ガスをそれぞれ用いる。このＳｉＮ、ａ−８ｉ ：
Ｈ膜をＣＩ（Ｆガスを用いたドライエツチングおよび
ヒドラジン（ＮＨｚＮＨ工・ＨｔＯ）水溶液を用いたウ
ェットエツチングを併用することにより、所望のパター
ンのａ−Ｓｉ：Ｈ４のパターンおよび８１Ｎゲート絶縁
膜３のパターンとする。Metal Cr is deposited on a transparent glass substrate 1 to a thickness of 0.15 μm by high frequency sputtering. This is then photo-etched using an aqueous ceric ammonium nitrate solution as an etching solution to form a gate electrode [2] and gate electrode wiring in a desired shape.
A gate insulating film 3, which is a silicon nitride (S i N) film, is deposited to a thickness of 0.3 μm by a method, and then a-8i:H(i) 1Iu4 is continuously deposited to a thickness of 0.3 μm.
5μm, u-Si:H(n) film 4 with a film thickness of 0.04μm
is deposited on. At this time, as a discharge gas, the SiN film 3 is
iI (using a-NHa-Nz-based mixed gas, a-Si
:H(i) film is 5iHa-Nz mixed gas, a-Si
The :H(n) film uses a mixed gas of S i Ha -Hz -P Ha system. This SiN, a-8i:
By using a combination of dry etching using CI (F gas) and wet etching using a hydrazine (NHzNH-HtO) aqueous solution for the H film, the desired pattern of a-Si:H4 and the 81N gate insulating film 3 are formed. Make it a pattern.
通常、このａ−Ｓｉ：Ｈ４のパターンおよびＳｉＮ膜３
のパターンは下層のゲート電極配線パターン、上層のド
レイン電極６の層間絶縁膜も兼ねている。Usually, this a-Si:H4 pattern and the SiN film 3
The pattern also serves as the gate electrode wiring pattern in the lower layer and the interlayer insulating film for the drain electrode 6 in the upper layer.
次に、この上に、Ｃｒ ／ ＡΩ二層膜を膜厚０．１μ
ｍのＣｒ、０．３μｍのＡｌの順に真空蒸着法、或いは
スパッタにより堆積する。この二層膜をＡｌはＨｓ Ｐ
Ｏａ −ＣＨａ ＣＯＯＨ−ＨＮ Ｏａ −Ｈｘ Ｏ
系エツチング液、Ｃｒは硝酸第二セリウムアンモニウム
水溶液を用いて、ホトエツチング法で所望のソース電極
５のパターンおよびドレイン電極６のパターンとする。Next, on top of this, a Cr/AΩ two-layer film is applied to a thickness of 0.1 μm.
Cr of 0.3 μm and Al of 0.3 μm are deposited in this order by vacuum evaporation or sputtering. This two-layer film is Al is HsP
Oa -CHa COOH-HN Oa -Hx O
A desired source electrode 5 pattern and drain electrode 6 pattern are formed by photo-etching using a ceric ammonium nitrate aqueous solution as the Cr-based etching solution.
この金属Ａｌからなるソース電極５およびドレイン電極
６パターンが形成された基板上に、ＩＴＯ透明電極膜を
スパッタリング法で堆積する。ターゲットはＩ ｎｚｏ
ａ： ５ｎｏｔ＝９１ ： ９ （−Ａｌ比）の焼結体
をプレーナマグネトロン型のカソードに設置して用い、
放電ガスは純アルゴン又は０．５ｖｏＱ％程度の微量の
０２ガスを混入させたＡｒガスを用いる。基板を赤外線
ヒータで約５０℃に加熱しながら、３Ｘ１０−’Ｔｏｒ
ｒ以下の高真空に排気した後、上記の放電ガスを導入し
て、１３．５６ＭＨｚ の高周波スパッタリングを行
って、膜厚０．２μｍのＩＴＯ膜を堆積する。このＩＴ
Ｏ膜はＸ線回折法で分析すると多結晶のＩ’ｎｚＯａの
回折パターンが現われず、Ｘ線回折的には非晶質であっ
た。また、このＩＴＯ膜の比抵抗は４Ｘ１０−ＢΩｌ程
度であり、通常の基板温度１５０℃以上で堆積する結晶
性のＩＴＯ膜の比抵抗と比較して、大きな抵抗の増大は
認められない膜であった。このＩＴＯ膜を第３図のＥ点
で示したＨＣＱ ：ＨＮＯａ：ＨｚＯ＝１ ： ６ ：
３組成のエツチング液を用いて、ホトエツチング法に
より、少なくとも表面にＡｌの存在するソース電ｔ６５
のパターンと電気的に接続するように所望の非晶質状態
のＩＴＯ膜７よりなる画素電極パターンとした。この時
、Ａｌのソースおよびドレイン電極パターンが上記ＨＣ
Ｑ ： ＨＮＯｓ： Ｈｚ○系のエツチング液で溶出す
る事故は発生しなかった。An ITO transparent electrode film is deposited by sputtering on the substrate on which the source electrode 5 and drain electrode 6 patterns made of metal Al are formed. The target is Inzo
A: 5 not = 91: 9 (-Al ratio) sintered body is installed and used in a planar magnetron type cathode,
As the discharge gas, pure argon or Ar gas mixed with a trace amount of 02 gas of about 0.5 voQ% is used. While heating the substrate to approximately 50°C with an infrared heater,
After evacuation to a high vacuum below r, the above discharge gas is introduced and high frequency sputtering is performed at 13.56 MHz to deposit an ITO film with a thickness of 0.2 μm. This IT
When the O film was analyzed by X-ray diffraction, a polycrystalline I'nzOa diffraction pattern did not appear, and it was found to be amorphous in terms of X-ray diffraction. Furthermore, the specific resistance of this ITO film is about 4×10-BΩl, and compared to the specific resistance of a crystalline ITO film deposited at a normal substrate temperature of 150°C or higher, the film does not exhibit a large increase in resistance. Ta. This ITO film is shown at point E in FIG. 3: HCQ:HNOa:HzO=1:6:
The source voltage t65 where Al exists at least on the surface is etched by a photoetching method using an etching solution having three compositions.
The pixel electrode pattern was made of the ITO film 7 in a desired amorphous state so as to be electrically connected to the pattern. At this time, the Al source and drain electrode patterns are
Q: HNOs: There were no incidents of elution with Hz○ type etching solution.
この後、ＣＦ４ガスを用いたドライエツチング法にて、
ソースおよびドレイン電極間のａ−Ｓｉ：Ｈ（ｎ）層を
除去し、ＳｉＮパッシベーション膜および遮光膜パター
ンを形成して、ａ−８ｉＴＰＴアクテイブマトリツクス
基板が完成する。After that, by dry etching method using CF4 gas,
The a-Si:H(n) layer between the source and drain electrodes is removed, and a SiN passivation film and a light shielding film pattern are formed to complete an a-8iTPT active matrix substrate.
この基板を用いて、アクティブマトリック方式液晶平面
ディスプレイを製造した。Using this substrate, an active matrix liquid crystal flat display was manufactured.
本発明によれば、ＩＴＯ膜スパッタ時の基板温度を２５
〜１５０℃の範囲に設定して、Ｘ線回折的に見て非晶質
状態のＩＴＯＩｉｌを用いているので、Ａｌパターン上
でＩＴＯ膜をＨＣｎ −ＨＮ Ｏａ −Ｈｘ Ｏ系エツ
チング液でパターン化する時に、第２図に示す如＜、Ｉ
ＴＯ／Ａｎエッチレート比（選択比）が３０倍以上とれ
、Ａｌを溶解することなしに、ＩＴＯｌｌのパターン化
が容易にできる。According to the present invention, the substrate temperature during ITO film sputtering is set to 25
Since the temperature is set in the range of ~150°C and ITOIil is used which is in an amorphous state in terms of X-ray diffraction, the ITO film is patterned on the Al pattern using an HCn -HN Oa -Hx O based etching solution. Sometimes, as shown in FIG.
The TO/An etch rate ratio (selectivity) is 30 times or more, and ITOll can be easily patterned without dissolving Al.
また、このＩＴＯ膜のエツチングを行う時のＨＣｊｌｌ
−ＨＮ Ｏａ −Ｈｚ Ｏ系エツチング液の組成は、第
３図のＡ、Ｂ、Ｃ，Ｄ点で囲まれる斜線の範囲内を選べ
ば、電池反応によるＡｌの溶出、ＡΩ表面の荒れが発生
せず、また、ＩＴＯＩＩＩのエッチレートが異常に大き
過ぎたり、小さ過ぎてパターン化が困難になることもな
く、Ａｌに対して適当な選択比でＩＴＯ膜をパターン化
することができる。Also, when etching this ITO film, the HCjll
-HN Oa -Hz O If the composition of the O-based etching solution is selected within the diagonally shaded range surrounded by points A, B, C, and D in Figure 3, elution of Al and roughening of the AΩ surface due to the battery reaction will not occur. Furthermore, the ITO film can be patterned with an appropriate selectivity to Al without the etch rate of ITO III being abnormally high or low, thereby making patterning difficult.
第１図は本発明の一実施例のａ−８ｉ ＴＦＴ近傍の
断面を示した図、第２図はＩＴＯ膜スパッタ時の基板温
度とＩ Ｔｏ／Ａ ｆｉのエツチングレート比の関係を
示した図、第３ｍは本発明のＩＴＯ膜をエツチングする
ためのＨＣ７１−ＨＮ Ｏｓ−Ｈｚ Ｏ系エツチング液
の組成範囲を示した図である。
１・・・ガラス基板、２・・・ゲート電極、３・・・ゲ
ート絶縁膜、４・・・ａ−Ｓｉ：Ｈ膜、５・・・ソース
電極、６・・・ドレイン電極、７・・・非晶質状態のＩ
ＴＯ膜。Fig. 1 is a diagram showing a cross section near an a-8i TFT according to an embodiment of the present invention, and Fig. 2 is a diagram showing the relationship between the substrate temperature during ITO film sputtering and the etching rate ratio of ITo/Afi. , No. 3m is a diagram showing the composition range of the HC71-HN Os-Hz O-based etching solution for etching the ITO film of the present invention. DESCRIPTION OF SYMBOLS 1...Glass substrate, 2...Gate electrode, 3...Gate insulating film, 4...A-Si:H film, 5...Source electrode, 6...Drain electrode, 7...・I in amorphous state
TO membrane.
Claims (1)
、ａ−Ｓｉ：Ｈパターン、少なくともＡｌを主体とする
金属を含むソース・ドレイン電極パターン、ＩＴＯ（Ｉ
ｎｄｉｕｍＴｉｎＯｘｉｄｅ）画素電極パターンを順次
形成してなる液晶ディスプレイにおいて、ＩＴＯ画素電
極に非晶質状態のＩＴＯ膜を用いることを特徴とする液
晶デイスプレイ。 ２、ＩＴＯ膜のスパッタ時の基板温度が２５℃から１５
０℃の範囲にあり、ＩＴＯパターンを形成する時のエッ
チング液組成が塩酸−硝酸−水の三成分系において、塩
酸：硝酸：水の比率で２５：２５：５０、２：２５：７
３、２：７８：２０および１５：６５：２０の組成点で
囲まれる四辺形の領域内にあることを特徴とする液晶デ
ィスプレイの製造方法。[Claims] 1. A gate electrode pattern, a gate insulating film, an a-Si:H pattern, a source/drain electrode pattern containing at least a metal mainly composed of Al, and an ITO (ITO) pattern on a glass substrate.
1. A liquid crystal display formed by successively forming pixel electrode patterns (Tin Oxide), characterized in that an amorphous ITO film is used for the ITO pixel electrodes. 2. The substrate temperature during sputtering of ITO film is from 25℃ to 15℃.
The etching solution composition when forming an ITO pattern is a three-component system of hydrochloric acid-nitric acid-water, and the ratio of hydrochloric acid:nitric acid:water is 25:25:50, 2:25:7.
3. A method for manufacturing a liquid crystal display, characterized in that the liquid crystal display is within a quadrilateral region surrounded by composition points of 2:78:20 and 15:65:20.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62016077A JP2644743B2 (en) | 1987-01-28 | 1987-01-28 | Manufacturing method of liquid crystal display device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62016077A JP2644743B2 (en) | 1987-01-28 | 1987-01-28 | Manufacturing method of liquid crystal display device |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63184726A true JPS63184726A (en) | 1988-07-30 |
| JP2644743B2 JP2644743B2 (en) | 1997-08-25 |
Family
ID=11906494
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62016077A Expired - Lifetime JP2644743B2 (en) | 1987-01-28 | 1987-01-28 | Manufacturing method of liquid crystal display device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2644743B2 (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0376232A (en) * | 1989-08-18 | 1991-04-02 | Oki Electric Ind Co Ltd | Manufacture of display device |
| JPH0941158A (en) * | 1995-07-31 | 1997-02-10 | Asahi Denka Kogyo Kk | Production of oxide etching product and device therefor |
| EP0782039A2 (en) * | 1995-12-27 | 1997-07-02 | Canon Kabushiki Kaisha | Display device and process for producing same |
| JP2003043508A (en) * | 2001-07-27 | 2003-02-13 | Hitachi Ltd | Liquid crystal display device |
| US7547916B2 (en) | 1992-12-09 | 2009-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Electronic circuit |
| US8038857B2 (en) | 2004-03-09 | 2011-10-18 | Idemitsu Kosan Co., Ltd. | Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this, transparent electrode, and related devices and processes |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58147069A (en) * | 1982-02-25 | 1983-09-01 | Sharp Corp | Thin film transistor |
| JPS61145529A (en) * | 1984-12-19 | 1986-07-03 | Matsushita Electric Ind Co Ltd | Formation of transparent electrode pattern |
-
1987
- 1987-01-28 JP JP62016077A patent/JP2644743B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS58147069A (en) * | 1982-02-25 | 1983-09-01 | Sharp Corp | Thin film transistor |
| JPS61145529A (en) * | 1984-12-19 | 1986-07-03 | Matsushita Electric Ind Co Ltd | Formation of transparent electrode pattern |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0376232A (en) * | 1989-08-18 | 1991-04-02 | Oki Electric Ind Co Ltd | Manufacture of display device |
| US7547916B2 (en) | 1992-12-09 | 2009-06-16 | Semiconductor Energy Laboratory Co., Ltd. | Electronic circuit |
| US7897972B2 (en) | 1992-12-09 | 2011-03-01 | Semiconductor Energy Laboratory Co., Ltd. | Electronic circuit |
| US8294152B2 (en) | 1992-12-09 | 2012-10-23 | Semiconductor Energy Laboratory Co., Ltd. | Electronic circuit including pixel electrode comprising conductive film |
| JPH0941158A (en) * | 1995-07-31 | 1997-02-10 | Asahi Denka Kogyo Kk | Production of oxide etching product and device therefor |
| EP0782039A2 (en) * | 1995-12-27 | 1997-07-02 | Canon Kabushiki Kaisha | Display device and process for producing same |
| EP0782039A3 (en) * | 1995-12-27 | 1998-06-17 | Canon Kabushiki Kaisha | Display device and process for producing same |
| US6310674B1 (en) | 1995-12-27 | 2001-10-30 | Canon Kabushiki Kaisha | Method of making a display device with electrode characteristics |
| JP2003043508A (en) * | 2001-07-27 | 2003-02-13 | Hitachi Ltd | Liquid crystal display device |
| US8038857B2 (en) | 2004-03-09 | 2011-10-18 | Idemitsu Kosan Co., Ltd. | Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this, transparent electrode, and related devices and processes |
| US8507111B2 (en) | 2004-03-09 | 2013-08-13 | Idemitsu Kosan Co., Ltd. | Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this, transparent electrode, and related devices and processes |
| US8773628B2 (en) | 2004-03-09 | 2014-07-08 | Idemitsu Kosan Co., Ltd. | Thin film transistor, thin film transistor substrate, processes for producing the same, liquid crystal display using the same, and related devices and processes; and sputtering target, transparent electroconductive film formed by use of this, transparent electrode, and related devices and processes |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2644743B2 (en) | 1997-08-25 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| KR910003885B1 (en) | Sputtering alloy target | |
| US5760854A (en) | Liquid crystal display apparatus | |
| KR900004732B1 (en) | Method for production of thin film transistor array substrates | |
| JP2814155B2 (en) | Method of forming ITO film pattern and method of manufacturing substrate for liquid crystal display element | |
| US5366588A (en) | Method of manufacturing an electrically conductive pattern of tin-doped indium oxide (ITO) on a substrate | |
| JPH08146446A (en) | Active matrix type liquid crystal display device | |
| JPH05323373A (en) | Production of thin film transistor panel | |
| JP2002280391A (en) | Semiconductor device using self-aligned crystallization by metal induction in silicon layer for tfts, top-gate type tft and top-gate type tft manufacturing method | |
| JPS63184726A (en) | Liquid crystal display and its production | |
| JPS63289533A (en) | Liquid crystal display device | |
| JPH08248442A (en) | Liquid crystal display device | |
| JPH11264995A (en) | Manufacture of liquid crystal display device | |
| JP3780100B2 (en) | Transparent conductive film with excellent processability | |
| JPH0743744A (en) | Liquid crystal display device and its production | |
| JP2823178B2 (en) | Metal wiring board and manufacturing method thereof | |
| JP2005258115A (en) | Thin film transistor type substrate, thin film transistor type liquid crystal display and manufacturing method of thin film transistor type substrate | |
| KR20070088886A (en) | Display substrate and method of manufacturing the same | |
| JP2001318389A (en) | Transparent electrode substrate, its manufacturing method and liquid crystal device | |
| JP3035101B2 (en) | Electrode substrate and manufacturing method thereof | |
| JPH09266179A (en) | Tungsten alloy electrode and interconnection | |
| JPH0612781B2 (en) | Manufacturing method of active matrix substrate | |
| JPH02132833A (en) | Thin film wiring | |
| JPH04240824A (en) | Array substrate for liquid crystal display device | |
| JPH06301054A (en) | Production of thin-film transistor array substrate for liquid crystal display device | |
| JPH039569A (en) | Thin film transistor |