JPS6318390B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a television receiver capable of simultaneously projecting images of two channels on a cathode ray tube screen of one television receiver.

In a television receiver that simultaneously displays television signals from two different channels on a cathode ray tube screen, two tuners are used, one tuner transmits the first television signal, and the other tuner transmits the second television signal. The image from the other television signal is compressed into a part of the image based on one television signal and inserted as a sub-screen so that they can be displayed at the same time.
If either or both of the above-mentioned second and second television signals has an extremely weak electric field (including an empty channel), the other image or both images will become extremely unsightly. In particular, if the image that becomes the child screen is disturbed, there is a problem in that it greatly affects the image on the main screen, making it difficult to see the main screen.

In view of the above-mentioned problems, the present invention aims to always obtain a high-quality image by replacing the cathode ray tube screen when the received electric field strength of the television signal that creates the sub-screen is weak.

In order to achieve the above object, the present invention provides a means for detecting the received electric field strength of the television signal that creates the sub-screen, and when the first and second television signals are simultaneously displayed, one of the television signals that creates the sub-screen is When the received electric field strength of the television signal is weak, the detection output of the detection means is used to stop displaying one television signal that creates a sub-screen, and returns the television signal that is creating the main screen to that part to eliminate the missing part. This is to obtain a parent screen that does not have a parent screen. Therefore, according to the present invention, it is possible to eliminate the unsightly appearance of an image when a child screen with a distorted image is displayed, and to obtain a high-quality image that is easy to view.

An embodiment of the present invention will be described below with reference to the drawings.

As a method of projecting images of two channels A and B on the same projection surface, the method shown in FIG. 2 can be considered. In other words, the B channel is approximately 1/1 vertically of the entire screen.
2. The width is 1/2 and the area is 1/4 and is projected in the lower right corner of the screen. The basic idea of this method is that every other horizontal scan of the B channel, samples are stored in the memory circuit corresponding to that scanning line every other picture element (sample points necessary to reproduce an image) during one horizontal scan. The horizontal scan of channel A is stored as B in Figure 2.
When sweeping the part shown in FIG. 2, the image signal of the B channel is compressed to approximately 1/2 in length and width by reading out the contents of the memory circuit at twice the speed of writing. It is based on the principle of projection.

Fig. 1 shows the specific configuration, in which 1 is an antenna, 2 and 6 are tuners that receive broadcasts on different channels A and B, respectively, 3 and 7 are video intermediate frequency amplification circuits, and 4 and 8 are video Detection circuit, 5,
9 is a video amplifier circuit; 10 is a synchronization signal generation circuit that generates the vertical synchronization signal V _B and horizontal synchronization signal H _B of channel B; and 11 is a synchronization circuit that generates the vertical synchronization signal V _A and horizontal synchronization signal H _A of channel A. This is a signal generation circuit. 12 is a flip-flop that inverts its state every time the horizontal synchronization signal H _B is generated and generates an output signal d; 13 is a flip-flop that is applied with the signal N ₁ ;
The signal selection circuit selects one of the inputs P, q, r, and s according to N ₂ , N ₃ , and C' and generates an output at the output terminal 23, and operates as shown in FIG. Note that the mark in the figure indicates that it may be arbitrary. 14 and 17 are RS flip-flops each having a reset terminal and a set terminal, and outputs a and b.
occurs. 15 and 16 are counters, and 18 is a gated oscillator, which stops oscillation while the horizontal synchronizing signal H _A is being generated, and makes the phase relationship of its output pulse with respect to the horizontal synchronizing signal H _A equal in horizontal scanning. Can be done. A gated oscillator 19 generates an output and has a similar relationship to the horizontal synchronizing signal H _B. 20 is writing image information,
A control circuit including a storage circuit that performs reading;
The circuits shown in FIG. 7, FIG. 8, and FIG. 9 are included. 21 and 22 are ungates, respectively. 24 and 25 are detection circuits that detect the respective electric field levels of both signals by the output signals of the video amplifiers 5 and 9, and 26 is a positive logic C only when the electric field levels of both the output signals of the video amplifiers 5 and 9 are strong. This is a gate circuit that opens the gate of the signal, and its output is C'.

The oscillation frequency of the gated oscillator 18 described above is 450 _H [Hz] when the number of picture elements per horizontal scan is 450, and the horizontal scanning frequency is _H.
The oscillation frequency of gated oscillator 19 is 1/2 of that.
It is 225 _H [Hz]. The counter 15 is a counter of 525/2 x 2 ≒ 132 [bits] for the number of horizontal scans of one field, 525/2, and 132 horizontal synchronizing signals H _A
When it is counted, the flip-flop 14 is set and the output a becomes a high potential state. Counter 15 and flip-flop 14 are reset by vertical synchronization signal V _A . The counter 16 is a counter of 450/2=225 [bits] for 450 picture elements during one horizontal scan, and outputs the output pulse of the gated oscillator 18.
When 225 pieces have been counted, the flip-flop 17 is set and its output b goes to a high potential state. Counter 16 and flip-flop 17 are reset by horizontal synchronization signal _HA . With this configuration, when sweeping the part B shown in FIG. 2, the outputs a and b are in a high potential state, and the output of the oscillator 18 appears at the output e of the ungate 22.

Next, the operation of the embodiment configured as above will be explained. The broadcast signal of channel A selected for reception by tuner 2 is transmitted to the fourth channel via circuits 3, 4, and 5.
The signal is applied to the signal selection circuit 13 as a video signal P shown in FIG. In addition, for the broadcast signal of channel B selected for reception by the tuner 6, the video signal V of channel B is sampled as shown in FIG. Read out at speed. Then, as shown in FIG. 4C, a video signal whose time axis is compressed to 1/2 is obtained. This video signal appears as p, r, and s for each field. The signal selection circuit 13 selects signals p, q,
By appropriately selecting and switching r and s, the video signal of channel A and the video signal of channel B are combined and appear at the output terminal 23 as shown in FIG. 4D.

Next, the circuits included in the control circuit 20 will be explained. FIG. 7 shows a ring counter, and if the vertical synchronization signal V _B triggers these flip-flops FF _{1 to} FF ₃ several times from any state of each flip-flop FF 1 , FF ₂ , FF ₃ , ,output
M ₁ , M ₂ , M ₃ are _first
The state shown in Figure 1 will be repeated. These outputs M ₁ , M ₂ , and M ₃ are used as signals for selecting the write circuit. Figure 8 shows the signals M ₁ , M ₂ , M ₃ , signal a, and synchronization signal obtained by the circuit shown in Figure 7.
This circuit obtains signals N ₁ , N ₂ , and N ₃ from V _A , and is configured using flip-flops FF ₄ to FF ₆ as main circuits. N ₁ , N ₂ , N ₃ are signals for selecting the readout circuit and signals p, q, r,
It is used as a signal to select one of s.

Further, FIG. 9 shows that either the output e of the oscillator 18 or the output of the oscillator 19 is selected via the AND gate 22 by the signals M ₁ , M ₂ , M ₃ , N ₁ , N ₂ , and N ₃ . Therefore, it is a circuit for obtaining a write clock or a read clock for each write/read circuit.

FIG. 5 shows an embodiment of a memory circuit included in the control circuit 20 and a circuit for writing and reading image information therein. 206 is a memory circuit, 205 is a shift circuit;
It is a register. 502 and 503 are circuits having the same configuration as 501, and M ₁ ,
For N ₁ and U ₁ , the circuits 502 and 503 become M ₂ , N ₂ , U ₂ , M ₃ , N ₃ and U ₃ , respectively. (M ₁ ,
When M ₂ , M ₃ ) = (1, 0, 0), the circuit 501
When (M ₁ , M ₂ , M ₃ ) = (0, 1, 0), the circuit 502 is applied, and when (M ₁ , M ₂ , M ₃ ) = (0, 0, 1), the circuit 503 is applied. Writing is performed in each. Also, when (N ₁ , N ₂ , N ₃ ) = ( ₁ , ₀ , ₀ ), the circuit 501
When , the circuit 502 (N ₁ , N ₂ , N ₃ )=(0,
0, 1), the circuit 503 is read out. As can be seen from FIG. 8, Mi≠Ni. circuit 5
The write and read operations for 01 will be described. When M ₁ = 1, AND gates 201, 203
is open, and AND gates 202 and 204 are closed. Therefore, the shift register 205 receives the synchronization signal
_VB sets the first flip-flop and resets the other flip-flops. In other words, the state becomes 10...0. This state changes from 010...0, 0010...0 depending on the signal d. U ₁ is equal to the output of oscillator 19, which creates the write clocks φ ₁ and φ ₂ to storage circuit 206. Since d shifts the shift register 205 every other horizontal scan of the synchronization signal H _B , each storage circuit stores information for every other horizontal scan. V is a video signal. When N ₁ =1, AND gates 201 and 203 are closed, and AND gates 202 and 204 are open. At this time, the shift register 205 is set to the state of 100...0 by V _A , and 0100...0, 0010...0 by H _A.
and the state changes. U ₁ is equal to the output e of AND gate 22, which creates the read clocks φ ₁ and φ ₂ from storage circuit 202. The read speed is equal to the oscillation frequency of the oscillator 18.

FIG. 3 shows the relationship between the vertical synchronizing signal of the A channel, the vertical synchronizing signal of the B channel, and the writing and reading of image information of the B channel. In other words, the part with the number B ₁ is connected to the circuit 501, and the part with the number B ₁ is connected to the circuit 501.
That of B 3 goes to circuit 502, and that of B ₃ goes to circuit 503.
, and it will be read in the corresponding numbered part of the A channel. The dotted line in the figure means that on the right side, the horizontal sweep is performed in the part B of FIG. 2.

FIG. 6 shows an embodiment of the memory circuit. The shift signals φ ₁ and φ ₂ are composed of rectangular waves having mutually opposite phases. The voltages on the capacitors are V ₁ , V ₂ , and V ₃ . The sample value of the signal is Uk. When the base of the transistor reaches the voltage U, the transistor starts conducting, and current flows from the capacitance immediately following it until the capacitance of the previous stage reaches U. The voltage of its own stage is instantaneously
2U, and the charge is transferred until the voltage becomes U+Uk. Therefore, the information contained in this stage is transmitted to the next stage. Note that G is a gate signal.

In the above embodiment, a case was explained in which another channel is displayed in the lower right corner of the screen of the television receiver at a size of 1/2 in height and width. By replacing 12 with a counter having an appropriate count value, its size can be changed in various ways. The position to be displayed is not limited to the lower right corner, but may also be the upper right corner, the upper left corner, or the lower left corner.

In the above embodiment, while the broadcast signal of channel A is received by the tuner 2 and displayed, the broadcast signal of channel B is received by the tuner 6, and this channel B image is used as a sub-screen to display a part of the channel A image. Although we have described the case where channels A and B are inserted and projected, it would be very convenient if the projection positions of channels A and B could be switched using the above configuration. That is, the signals of the two channels may be exchanged using a switch or the like before the circuits 10 and 11 that separate the horizontal synchronizing signal and vertical synchronizing signal of each channel. It is best to install the above-mentioned switch at a position where the output of the amplifier circuit 5 and the output of the amplifier circuit 9 are exchanged. By doing this, the screen of the channel that was displayed small can be immediately enlarged and viewed, which is very convenient. It's practical.

FIG. 12 shows a concrete circuit of the detection circuits 24 and 25. In FIG. 12, an input video signal is added from A, passed through an emitter follower circuit consisting of resistors R ₁ , R ₂ , and transistor Q ₁ , and then connected to capacitor C ₁ ,
When clamped by a clamp circuit consisting of resistor R ₃ and diode D ₁ , the cathode side of diode D ₁ becomes high level when there is an input signal. When this is inverted and amplified by transistor Q ₂ and resistor R ₄ and passed through a peak hold circuit consisting of transistor Q ₃ , resistor R ₆ , diode D ₂ , capacitor C ₂ and resistor R ₇ , the anode side of diode D ₂ becomes strong. It becomes low level when there is an electric field, and becomes high level when there is a weak electric field. This is passed through an emitter follower circuit consisting of a transistor Q ₄ and a resistor R ₈ to obtain an output signal from B. FIG. 13 shows a specific configuration of the gate circuit 26. This gate circuit 26 is connected to the detection circuits 24 and 25.
A NOR circuit 26a whose input is the output of
The output of the NOR circuit 26a and the signal C are input.
It is composed of an AND gate 26b. Therefore, if either of the outputs of the detection circuits 24 and 25 is at a high level, the output of the NOR circuit 26a is at a low level, and the AND gate 26b is closed to output the signal C.
Does not pass. In other words, if the electric field of at least one of the signals of channels A and B is a weak electric field, AND
Gate 26b is closed, and AND gate 26b is opened only when the electric fields of both signals are strong electric fields. As a result, the signal C' is applied to the signal selection circuit 13 only when the electric field strengths of both signals are strong, and a video signal that is a combination of the video signal of channel A and the video signal of channel B is output from its output terminal. Images of both channels A and B are displayed simultaneously on the cathode ray tube screen, with the image of channel B serving as a sub-screen. On the other hand, if the electric field strength of either signal is weak, the gate circuit 26 is closed and the signal C' does not appear, so only the video signal of channel A, which is the main screen, is output from the output terminal of the signal selection circuit 13. Ru. In particular, when the electric field strength of the video signal of channel B that creates the sub screen is weak, the influence of the disturbance of the image on the main screen (video signal of channel A) is large, so as mentioned above, the electric field of the video signal of channel B is weak. When an electric field occurs, if this video signal is erased and the channel A video signal is returned and displayed in that area, the screen will become unsightly, which is extremely effective in practice. This sub-screen is generally used to monitor other programs.
Since the desire to continue viewing the screen is lower than that of the main screen, there is almost no problem even if it is deleted.

Note that if the electric field strength of the channel B signal that creates the sub screen is strong and the electric field strength of the channel A signal that creates the main screen is weak, the images of channels A and B will be projected directly on the cathode ray tube screen. It's okay.

As described above, according to the present invention, the second television signal that creates the child screen is synchronized with its synchronization signal, the scanning lines and pixels are thinned out, and the stored signal is written into the storage means. A second television signal with a compressed time axis is obtained by reading out the second television signal in synchronization with the synchronization signal of the television signal, and the second television signal with a compressed time axis is read out in synchronization with the synchronization signal of the television signal. By deleting and inserting a part of the signal into the signal, it is possible to project a composite signal of two television signals on one cathode ray tube screen, making it possible to monitor alternate programs on one screen. In this state where the first and second television signals are displayed simultaneously on one screen, if the received electric field strength of the second television signal becomes weak, the second television signal will not be displayed. Since the display stops and only the image of the first television signal is projected on the cathode ray tube screen, the screen does not look unsightly when the electric field is weak, and the first television signal that you originally want to watch can be displayed in the correct state. You can watch it. The second television signal mentioned above is often used as a monitor for alternate programs, and compared to the main screen, it is not something that you want to watch continuously, so there is almost no problem in erasing it. be.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a television receiver according to an embodiment of the present invention, FIG. 2 is a diagram showing how images are projected onto a television picture tube, and FIG. 3 is a diagram showing how images are projected onto a television picture tube at the same time. FIG. 4 is a diagram showing the relationship between the vertical synchronization signal and B channel writing to and reading from the storage circuit; FIG. 4 is a diagram showing the relationship between the A channel and B channel video signals; FIG.
The figure is an explanatory diagram of a memory circuit and a circuit that writes to and reads from it, Figure 6 is an explanatory diagram of the operation of the memory circuit, and Figures 7, 8, and 9 respectively refer to the circuit in Figure 5. A circuit diagram that creates the signal to be supplied,
Fig. 10 is an explanatory diagram of the operation of the signal selection circuit, Fig. 11 is an explanatory diagram of the operation of the ring counter, Fig. 12,
FIG. 3 is a specific circuit diagram of a part of FIG. 1. 2, 6... tuner, 13... signal selection circuit,
20... Control circuit including a memory circuit for writing and reading image information, 24, 25... Detection circuit, 2
6...Gate circuit.

Claims (1)

[Claims] 1 means for simultaneously receiving first and second television signals having different synchronization relationships, storage means for storing the second television signal, and storing the second television signal in the storage means as the synchronization signal. a control means for synchronously thinning and writing scanning lines and pixels, and reading out a second television signal whose time axis has been compressed from the storage means in synchronization with a synchronization signal of the first television signal; a detection means for detecting the received electric field strength of the second television signal; and a detection means for detecting the received electric field strength of the second television signal; A second television signal is displayed on a part of the screen as a monitor, and when the detection output of the detection means indicating that the received electric field strength of the second television signal is input is input, the second television signal is displayed as a monitor. A television receiver comprising means for erasing the signal and returning and displaying the first television signal on that portion.