JPS5855713Y2 - Still image receiving device - Google Patents

Description

[Detailed description of the invention] The present invention is capable of receiving a still image signal sent using a part of the vertical retrace period of a television signal and displaying this received signal as a television image. Regarding a device that displays a still image on a picture tube by storing and reading out the stored contents, in particular, after storing the image signal of one screen worth of still images in a memory circuit, the still image is rolled onto a part of the screen. The present invention provides an apparatus that can sequentially display all still images using only a portion of the screen.

Hereinafter, the present invention will be explained with reference to the accompanying drawings.

First, FIG. 1 shows an example of a television signal sent from a television broadcasting station or the like for displaying still images.

In the following description, it is assumed that a signal as shown in FIG. 1 is received and a still image is displayed.

FIG. 1 shows one horizontal period during the vertical blanking period of a television signal, for example, the 20th (or 283rd) counting from the start of the vertical blanking period of an arbitrary field.
The horizontal period of the H-th (hereinafter, only the 20th H-th will be described) is shown.

Of course, this period is during the vertical retrace period, so it does not appear on the picture tube screen.

During this horizontal period, the image signal X for one horizontal scan of the still image is newly superimposed and transmitted, and immediately before this image signal X, the image signal A program code signal Y (for example, a binary 4-bit code signal) indicating the type of program among the image programs and the image signal X for one horizontal scan display a still image. In this case, a line number signal Z (for example, a binary 8-bit code signal) indicating the number of the horizontal scanning line counted from the top on the picture tube is transmitted.

For example, when displaying a still image as shown in FIG. 2, this image signal .

Next, the basic structure of a receiving apparatus for receiving the above-mentioned television signal and displaying it on a picture tube will be explained with reference to FIG.

In the figure, 1 is a video detection circuit 2 is a video amplification circuit, 3 is a picture tube, 4 is a synchronization separation circuit, and 5 is a deflection circuit, which are similar to those of a normal television receiver.

Further, 6 is a video signal switching circuit which appropriately switches between the output video signal from the video amplification circuit 2 and the video signal for displaying a still image read out from the image signal storage circuit section 7 and supplies it to the picture tube 3. It is something.

8 is a signal extraction circuit for extracting an image signal X, a program code signal Y, and a line number signal Z as shown in Fig. 1 for displaying a still image from the transmitted television signal; A sampling pulse generation circuit 9 generates a signal sampling pulse that is at a high level only during the 20th and 283rd horizontal periods counted from the starting point, and a sampling pulse generation circuit 9 receives this pulse and the detected video signal as input. It has a gate 10 for extracting the 20H and 283H image signals X, etc.

Part of the signal extracted in this way is sent to the program detection circuit 11, where it receives the program code signal Y as shown in FIG.
The program code signal is read based on the start signal S1 inserted and sent immediately before the start signal S1, and is compared in the program designation circuit 12 with a signal indicating a specific type of program preset to be received by the viewer. , a detection output is generated from the program detection circuit 11 and transmitted to the gate 13 only when the designated type of program is received.

Since the signal extracted from Game I.10 is also added to this Game I.13, the image signal X and line number signal Z of the specified program are extracted from the output, and the line number detection circuit 14 and The signal is sent to the image signal storage circuit section 7.

In the line number detection circuit 14, the line number signal Z is temporarily stored, and on the other hand, the start signal S2 sent immediately before the image signal X is detected by the start signal detection circuit 16, and the subsequent image signal is the buffer memory 17
is temporarily stored.

On the other hand, 15 is a line number counter, which counts the horizontal synchronizing signal based on the starting point of the vertical retrace period, supplies the counting output to the line number detection circuit 14, and
The 42nd H (and 305th H) and 178th H (
and ``441st H'', 241st H (and ``5th
04H), etc., and generates a count output.

Therefore, when the image signal X to which the 8-digit binary line number Z indicating the nH-th line number is currently received and stored in the buffer memory 17, the line number counter 1
When the nHth counting output from 5th to This nHth image signal X is read out from the buffer memory 17 and is correctly stored in the nth (th) (th) position of the main memory 19 constituted by a digital field memory.

This memory 19 is a memory capable of storing image signals for one field, and sequentially stores 0 or 1 for each picture element obtained by subdividing a still image.

In this way, the image signal sent one scanning line per vertical retrace period of the television signal is stored in the main memory 1.
9 in scanning line order.

Next, the image signal stored in the main memory 19 in this manner is read out from the main memory 19 in synchronization with the horizontal and vertical image deflection of the picture tube 3, and is supplied to the picture tube 3 via the switching circuit 6. A still image is displayed.

For example, in the case of a display as shown in FIG. 2, one still image screen is composed of 200 horizontal scanning lines, and the still image is displayed for a period of 45 μsec at the center of one horizontal period.

Based on this principle, the present invention further improves the screen 3 of the cathode ray tube by displaying still images in roll mode.
It is an object of the present invention to provide a device capable of sequentially displaying still images on only a portion of the image.

Hereinafter, one embodiment of the present invention will be explained in detail.

First, let us assume that the content of the still image signal sent is to display a still image as shown in FIG.

Therefore, it is displayed that the sent still image signal has been stored in the main memory 19 for one screen, and the time t
The fourth circuit configuration is such that the entire screen can be memorized and the state can be maintained even when the still image signal of the n-th arbitrary horizontal scanning line is written to the main memory 19 starting from memory 19.
As shown in FIG.

Here, when the program designation circuit 12 designates the th program at time t1, the output as shown in FIG. 5A from the program designation circuit 12 resets the flip-flop 23 via the NOR gate 22. The Q output becomes high level as shown in FIG. 5B.

After that, at time (tx + △t), when the still image signal for 1H of the (nth) program from the top is received, the programs match again, so the NAND gate 13 outputs When a still image signal appears and the line numbers match, the still image signal is temporarily stored in the buffer memory 17, and when the electron beam of the cathode ray tube 3 scans the (41+n)th Hth, the gate 24 becomes conductive and the still image is displayed. The signal is stored in the nth 1H position of the main memory 19.

Since the Q terminal of the flip-flop 23 is at a high level as described above, the gate 24 is rendered conductive by the pulse generated from the flip-flop 14C of the line number detection circuit 14 during the (41+n)Hth scan.

Next, when the signal of line number 1 is received, a negative pulse appears at the 1 detection gate 26 in FIG.

In this case, the line number detection circuit 14 is the same as that shown in FIG. 2, and 14A is a circuit for extracting the line number from the received signal.

Further, 14B is a comparison circuit for comparing the received signal line number and the line number of the line number counter 15;
4C is a flip-flop, and this flip-flop 14
C is reset by a horizontal pulse every H, and is set by the match output of the comparison circuit 14B when the line numbers match.

Further, 26 to 32 are inverting circuits, which invert this O, that is, a low level signal when the output representing an 8-digit binary number 1, that is, 00000001, is present, and supplies it as a high level to the 8-man NAND gate 26. Therefore, the output of gate 26 changes from high to low level only when the line number is 1, and this output causes a flip-flop.

33 is set, and the output of the Q terminal becomes high level.

Next, when the 200H-th still image signal is received, the outputs of the line number detection circuit 14A become 1 for 23, 26, and 27, so at time t4, the output from the NAND gate 34 for 200H detection as shown in FIG. 200H detection output like F is high →
The output of the gate 35 becomes a high level at time t4.

At this time, it is assumed that the output of the manual roll control circuit 36 is at a high level.

Since line number 1 is detected first and the Q terminal output of the flip-flop 33 is at a high level, the gate 37
The output becomes low level at time t4, setting the flip-flop 23.

Therefore, the Q terminal output of the flip-flop 23 remains at a low level until it is reset by manually operating the reset circuit 38, and the gate 24 is closed.

Further, when the Q terminal output of the flip-flop 23 becomes a low level, the flip-flop 33 is reset, while the display circuit 39 detects that the Q terminal output becomes a low level and displays it by a lamp display or the like.

This display liquid is manually operated by the manual roll control circuit 36 to set its output to a low level, and thereafter the output of the flip-flop 23 is kept at a low level so that the memory contents do not change.
Block 4.

On the other hand, the Q terminal output of the flip-flop 23 becomes high level from time t4, and its waveform becomes as shown in the fifth diagram.

When the Q terminal output of the flip-flop 23 becomes high level, the NAND gate 1-40 opens and the vertical synchronizing pulse applied to the vertical synchronizing pulse input terminal 41 passes through.

Therefore, after time t4 when the 200th signal is received,
Since the vertical synchronization pulse will appear at time t5,
Since the flip-flop 42 is set at time t5, its Q terminal output becomes high level, and the NAND gate 43
conducts.

On the other hand, the roll pulse generation circuit 44 is a circuit that generates a pulse that clocks the main memory 19 for 1H only once per field.

That is, as shown in FIG. 6G, when the last 200H still image signal of one screen worth of still image signals is stored in the memory,
The still image signals in the main memory 19 are stored in a G-shape, and when these are sequentially read out and displayed on the cathode ray tube 3, still images of 200 H worth of still image signals are displayed from the top. .

Generally, when one screen worth of still image signals is stored in the main memory 19 using a MOS dynamic shift register or the like, if only one field is considered, for example, 1H
is composed of 320 bits, from the 42nd H to the 241st H (200 x 320 = 64 K
Bit clock is ゛Memory contents are main memory 19
Go around inside.

Here, if the output of the roll pulse generation circuit 44 is clocked at 320 bits during the 242nd IH, the contents of the main memory 19 will shift by <IH as shown in FIG. 6J after one field has elapsed.

A clock for performing such an operation is called a roll clock.

If the roll clock is performed for each field in the same manner until after the 64th field, then after the 64th field, the
The result will be as shown in .

Therefore, at time t6 after 64 fields, a negative pulse is generated at the output of the 64-field detection circuit 45, and the output is used to set the flip-flop, cut off the gate 43, and reset the flip-flop 46 at the same time. and an 8-field detection circuit 4 that generates a pulse every 8 fields with the Q output of the flip-flop 46.
Start operation 7.

The 8-field detection circuit 47 used here is, for example, a ripple counter, and the Q terminal output of the flip-flop 46 is added as a load signal.

This load signal is a signal that enables the counting operation of the ripple counter of the 8-field detection circuit 47 only while it is at a high level, and continues to be reset while it is at a low level.

In addition, this ripple counter has NAND gate 40.
A vertical pulse is added as an input for counting.

In this manner, the 8-field detection circuit 47 generates an output pulse when 8 fields have elapsed to set the flip-flop 48.

Since this flip-flop 48 is reset by the next vertical synchronization pulse, the flip-flop becomes high level and the roll clock pulse is set to IH 320.
Only the bit is supplied to the main memory 19 via the NAND gate 49 and the NOR gate 50.

As a result, the contents of the main memory] 9 are displayed in a roll manner so as to move upward on the screen 3' of the cathode ray tube 3 by IH every 8 fields.

On the other hand, the Q terminal output of the flip-flop 46 becomes high level after time t6, and the output of the blanking pulse generation circuit 51 is supplied to the NAND gate 52 as shown in FIG. It is displayed only between the 178th H and the 241st H on the screen 3' of the cathode ray tube 3.

Therefore, after time t6, the 178th to 241st H parts of the memory contents as shown in FIG. It is displayed in 1/3 part.

From then on, every 8 fields, or 8/60 seconds, as shown in the 6th diagram
The memory contents are incremented by H minutes to 108 from time t6.
From 8 fields, FIG. 6G, the state shown in FIG. 6M is reached after 1152 fields, or 19.2 seconds, and returns to the original state after 1160 fields.

That is, a still image for one screen is slowly rolled and displayed in the lower one-third of the screen in about 20 seconds.

During this time, a normal television program is displayed on the upper 2/3 of the screen 3' of the cathode ray tube 3, and a still image based on a still image signal is superimposed on the television program on the lower 1/3. or displayed alone.

The display circuit 39 in FIG. 4 is a circuit that displays that one screen worth of data has been stored in the main memory 19.

The above-described operations after time t6 are repeated until the reset switch 38 is operated, and the same still image continues to be displayed.

Next, when the reset switch 38 is manually operated to issue a reset command and the manual roll control circuit 36 is reset,
First, the flip-flop 23 is reset, and the flip-flop 46 is also reset, so that the output of the main memory 19 is no longer transmitted to the cathode ray tube 3.

Also, since the flip-flop 23 is reset, the gate 40 is cut off, and the Q terminal output of the flip-flop 48 becomes low level, and the roll stops.

Further, the Q terminal output of the flip-flop 36 is maintained at a high level, and the flip-flops 33 and 42 can be set, returning to the state before time t1.

In addition, the roll advancing speed can be changed by increasing or decreasing the number of vertical pulses counted by the ripple counter 47 in the above explanation, instead of every 8 pulses.

Furthermore, the display section can be freely selected even if it is not the lower 1/3.

As detailed above, according to the present invention, after storing and accumulating image signals for one screen of a still image in memory, the storage position is rolled to display the still image on a part of the screen of the picture tube. Therefore, it is possible to sequentially display one screen's worth of still images using only a portion of the screen, making it possible to realize an apparatus with high screen usage efficiency.

[Brief explanation of drawings]

Fig. 1 is a waveform diagram of the main part of the television signal that can be received by the still image receiving device of the present invention, Fig. 2 is a front view of an example of the display in the device, and Fig. 3 is the principle of the device. FIG. 4 is a block diagram showing the configuration of a still image receiving device according to an embodiment of the present invention, and FIG.
B, C, D, E. F, FIG. 6, G, I, L, M, and P are a waveform diagram and a principle diagram, respectively, for explaining the operation of the device. 3...Cathode ray tube, 7...Memory circuit section,
12...Program designation circuit, 14...Line number detection circuit, 18...AND gate, 19
...Main memory, 23...Flip-flop, 24...Gate, 25...
Line number l detection gate, 33...Flip-flop, 34...Line number 200 detection gate, 36...Manual roll control circuit, 38
... Reset switch, 42 ... Flip-flop, 44 ... Roll pulse generation circuit, 45.47 ... Counter, 46.48 ...
...Flip-flop, 51...Blanking pulse generation circuit.

Claims (1)

[Scope of utility model registration request] A still image signal transmitted during a vertical retrace period of a television signal is received, a designated image signal from among the received still image signals is stored and accumulated in a storage circuit, and this image signal is transferred from the storage circuit. A device for reading and displaying a still image on the screen of a picture tube, comprising a memory for storing and accumulating all the image signals for one screen of the still image as the storage circuit, and sequentially changing the storage positions of the image signals in the memory. A roll pulse generation circuit generates a roll pulse for moving to an upper line or a lower line, and after all image signals for one screen have been stored in the memory, the roll pulse is generated by manual control. It includes a roll control circuit that is applied to the memory, and a blanking pulse generation circuit that reads an image signal corresponding to a portion of the still image from the memory circuit and applies it to the picture tube. A still image receiving device that sequentially rolls and displays portions of the still images one by one on a portion of the screen, and sequentially displays all of the still images.