JPS63181065U - - Google Patents

Info

Publication number
JPS63181065U
JPS63181065U JP1987072117U JP7211787U JPS63181065U JP S63181065 U JPS63181065 U JP S63181065U JP 1987072117 U JP1987072117 U JP 1987072117U JP 7211787 U JP7211787 U JP 7211787U JP S63181065 U JPS63181065 U JP S63181065U
Authority
JP
Japan
Prior art keywords
video signals
monostable circuit
horizontal
circuit
retrace pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP1987072117U
Other languages
Japanese (ja)
Other versions
JPH0450706Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP1987072117U priority Critical patent/JPH0450706Y2/ja
Publication of JPS63181065U publication Critical patent/JPS63181065U/ja
Application granted granted Critical
Publication of JPH0450706Y2 publication Critical patent/JPH0450706Y2/ja
Expired legal-status Critical Current

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  • Studio Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例におけるモニターテ
レビのブロツク図、第2図は同動作を示す波形図
、第3図は従来のモニターテレビのブロツク図、
第4図は同波形図である。 1,2……アナログスイツチ、3……単安定回
路、4……映像増幅回路、5……水平帰線パルス
発生回路。
FIG. 1 is a block diagram of a monitor television according to an embodiment of the present invention, FIG. 2 is a waveform diagram showing the same operation, and FIG. 3 is a block diagram of a conventional monitor television.
FIG. 4 is a waveform diagram of the same. 1, 2...analog switch, 3...monostable circuit, 4...video amplification circuit, 5...horizontal retrace pulse generation circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 複数の映像信号をブラウン管に時分割してそれ
ぞれ表示する手段を有するとともに、前記映像信
号の切換タイミングを決定する単安定回路と、前
記単安定回路の遅延量を制御する積分波形信号に
対して水平偏向帰線パルスを重畳させる水平帰線
パルス発生回路とを有し、前記水平帰線期線期間
内で前記複数の映像信号の切換えを行なうことを
特徴とするモニターテレビ。
It has means for displaying a plurality of video signals on a cathode ray tube in a time-divided manner, a monostable circuit that determines the switching timing of the video signals, and a monostable circuit that is horizontal to the integrated waveform signal that controls the amount of delay of the monostable circuit. A monitor television comprising: a horizontal retrace pulse generation circuit that superimposes a deflection retrace pulse, and switches the plurality of video signals within the horizontal retrace period.
JP1987072117U 1987-05-14 1987-05-14 Expired JPH0450706Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1987072117U JPH0450706Y2 (en) 1987-05-14 1987-05-14

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1987072117U JPH0450706Y2 (en) 1987-05-14 1987-05-14

Publications (2)

Publication Number Publication Date
JPS63181065U true JPS63181065U (en) 1988-11-22
JPH0450706Y2 JPH0450706Y2 (en) 1992-11-30

Family

ID=30915287

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1987072117U Expired JPH0450706Y2 (en) 1987-05-14 1987-05-14

Country Status (1)

Country Link
JP (1) JPH0450706Y2 (en)

Also Published As

Publication number Publication date
JPH0450706Y2 (en) 1992-11-30

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