JPS63177471A - Mos-type semiconductor device - Google Patents

Mos-type semiconductor device

Info

Publication number
JPS63177471A
JPS63177471A JP866787A JP866787A JPS63177471A JP S63177471 A JPS63177471 A JP S63177471A JP 866787 A JP866787 A JP 866787A JP 866787 A JP866787 A JP 866787A JP S63177471 A JPS63177471 A JP S63177471A
Authority
JP
Japan
Prior art keywords
formed
gate electrode
semiconductor substrate
source
drain
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP866787A
Inventor
Keiichi Higashiya
Yasuaki Inoue
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP866787A priority Critical patent/JPS63177471A/en
Publication of JPS63177471A publication Critical patent/JPS63177471A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To enhance the controllability of the effective channel length and to prevent a punch-through phenomenon from occurring at a miniaturized MOS transistor by a method wherein a source-drain region is formed on a semiconductor substrate and only on both side-walls of a gate electrode.
CONSTITUTION: A gate insulating film 3 and a gate electrode 4 are formed on one main face of a semiconductor substrate 1; impurity regions 5, 6 whose conductivity type is opposite to that of the semiconductor substrate 1 are formed on the semiconductor substrate 1 and only on both sides of the gate electrode 4. For example, after a gate oxide film 3 and a gate electrode 4 have been formed, an oxide film 7 is coated only on the periphery of the gate electrode 4, and polysilicon is then deposited. This polysilicon film is to contain phosphorus or arsenic. Then, said polysilicon film is left only on the side walls of the gate electrode 4 in the channellength direction by using an etching method or the like; a source 5 and a drain 6 are formed. In addition, impurities are diffused into silicon from the source 5 and the drain 6 during a subsequent heat-treatment process so that shallow junction regions 8, 9 are formed.
COPYRIGHT: (C)1988,JPO&Japio
JP866787A 1987-01-16 1987-01-16 Mos-type semiconductor device Pending JPS63177471A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP866787A JPS63177471A (en) 1987-01-16 1987-01-16 Mos-type semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP866787A JPS63177471A (en) 1987-01-16 1987-01-16 Mos-type semiconductor device

Publications (1)

Publication Number Publication Date
JPS63177471A true JPS63177471A (en) 1988-07-21

Family

ID=11699284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP866787A Pending JPS63177471A (en) 1987-01-16 1987-01-16 Mos-type semiconductor device

Country Status (1)

Country Link
JP (1) JPS63177471A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH02201931A (en) * 1989-01-31 1990-08-10 Oki Electric Ind Co Ltd Manufacture of mos transistor
US4994869A (en) * 1989-06-30 1991-02-19 Texas Instruments Incorporated NMOS transistor having inversion layer source/drain contacts
US5024959A (en) * 1989-09-25 1991-06-18 Motorola, Inc. CMOS process using doped glass layer
JPH03268436A (en) * 1990-03-19 1991-11-29 Toshiba Corp Mos device and manufacture thereof
US5108940A (en) * 1987-12-22 1992-04-28 Siliconix, Inc. MOS transistor with a charge induced drain extension
US5132758A (en) * 1988-02-12 1992-07-21 Hitachi, Ltd. Semiconductor device and manufacturing method thereof
US5208471A (en) * 1989-06-12 1993-05-04 Hitachi, Ltd. Semiconductor device and manufacturing method therefor
US5264380A (en) * 1989-12-18 1993-11-23 Motorola, Inc. Method of making an MOS transistor having improved transconductance and short channel characteristics
EP1280191A2 (en) * 2001-07-25 2003-01-29 Chartered Semiconductor Manufacturing Pte Ltd. A method to form elevated source/drain regions using polysilicon spacers

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5108940A (en) * 1987-12-22 1992-04-28 Siliconix, Inc. MOS transistor with a charge induced drain extension
US5132758A (en) * 1988-02-12 1992-07-21 Hitachi, Ltd. Semiconductor device and manufacturing method thereof
JPH02201931A (en) * 1989-01-31 1990-08-10 Oki Electric Ind Co Ltd Manufacture of mos transistor
US5208471A (en) * 1989-06-12 1993-05-04 Hitachi, Ltd. Semiconductor device and manufacturing method therefor
US4994869A (en) * 1989-06-30 1991-02-19 Texas Instruments Incorporated NMOS transistor having inversion layer source/drain contacts
US5024959A (en) * 1989-09-25 1991-06-18 Motorola, Inc. CMOS process using doped glass layer
US5264380A (en) * 1989-12-18 1993-11-23 Motorola, Inc. Method of making an MOS transistor having improved transconductance and short channel characteristics
JPH03268436A (en) * 1990-03-19 1991-11-29 Toshiba Corp Mos device and manufacture thereof
EP1280191A2 (en) * 2001-07-25 2003-01-29 Chartered Semiconductor Manufacturing Pte Ltd. A method to form elevated source/drain regions using polysilicon spacers
EP1280191A3 (en) * 2001-07-25 2003-08-06 Chartered Semiconductor Manufacturing Pte Ltd. A method to form elevated source/drain regions using polysilicon spacers

Similar Documents

Publication Publication Date Title
US5548143A (en) Metal oxide semiconductor transistor and a method for manufacturing the same
US4198250A (en) Shadow masking process for forming source and drain regions for field-effect transistors and like regions
US5595919A (en) Method of making self-aligned halo process for reducing junction capacitance
JPH0294477A (en) Semiconductor device and manufacture thereof
JPH03248433A (en) Manufacture of semiconductor device
GB1529297A (en) Self-aligned cmos process for bulk silicon device
JPH02304982A (en) Surface field effect transistor having dropped source and/source area for ultra-large scale integration
EP0921563A4 (en) Semiconductor device incorporating mos element and method for manufacturing the same
JPS6312168A (en) Ldd mis type field effect transistor
EP0827205A3 (en) Method for manufacturing a semiconductor device
US5389557A (en) Process for formation of LDD transistor, and structure thereof
JPS60241256A (en) Semiconductor device and manufacture thereof
JPS60194568A (en) Semiconductor ic device
JPS61216364A (en) Semiconductor device
JPH02100326A (en) Manufacture of mos type semiconductor device high in breakdown strength
JPS5681972A (en) Mos type field effect transistor
JPH0414880A (en) Manufacture of non-volatile semiconductor memory device
JPS63244776A (en) Manufacture of insulated-gate field-effect transistor
JPH02192723A (en) Manufacture of semiconductor device
JPS6055665A (en) Manufacture of semiconductor device
JPH0217675A (en) Semiconductor device
JPS57196573A (en) Manufacture of mos type semiconductor device
JPS5972759A (en) Semiconductor device and manufacture thereof
JPH03293763A (en) Self-alignment ion implantation method for semiconductor device with multi-gate type mos transistor structure
JPH04118936A (en) Manufacture of semiconductor device