JPS63177441A - Working method for wirings - Google Patents

Working method for wirings

Info

Publication number
JPS63177441A
JPS63177441A JP800187A JP800187A JPS63177441A JP S63177441 A JPS63177441 A JP S63177441A JP 800187 A JP800187 A JP 800187A JP 800187 A JP800187 A JP 800187A JP S63177441 A JPS63177441 A JP S63177441A
Authority
JP
Japan
Prior art keywords
wiring
wiring layer
ion beam
wirings
cvd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP800187A
Other languages
Japanese (ja)
Other versions
JP2533510B2 (en
Inventor
Akira Shimase
朗 嶋瀬
Satoshi Haraichi
聡 原市
Fumikazu Ito
伊藤 文和
Katsuro Mizukoshi
克郎 水越
Mikio Hongo
幹雄 本郷
Takahiko Takahashi
高橋 貴彦
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62008001A priority Critical patent/JP2533510B2/en
Publication of JPS63177441A publication Critical patent/JPS63177441A/en
Application granted granted Critical
Publication of JP2533510B2 publication Critical patent/JP2533510B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Abstract

PURPOSE:To obtain a working method for wirings at the time of opening a window at a wiring layer by ion beam for precipitating a CVD film with a laser beam of low energy for causing no damage by varying an ion beam deflection signal at a stage in which the wiring layer is exposed to form a wiring layer surface in which an optical reflectivity is reduced. CONSTITUTION:When the wiring layer 15 of a semiconductor device is formed by an ion beam working apparatus, a deflection signal of an ion beam 2 is varied at a stage in which the layer 15 is exposed to form a wiring layer surface in which its optical reflectivity is reduced. For example, continued to a step of opening a window for exposing wirings 15 in a semiconductor device by an ion beam 2, a step of surface treating for reducing the reflectivity of the surface of wirings 15 is conducted, the device is conveyed to a laser CVD side to execute a wiring forming step. The wiring layer surface in which the optical reflectivity is reduced uses many groove, one or more wedgeshaped grooves, or one or more conical holes. Thus, preferable CVD wirings 17 are formed on the surface of the exposed layer 15 with a laser beam 14 of low energy.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置表面番こ配線を付加する方法に係り
、特に付加配線形成の前処理工種であるイオンビーム加
工において、付加配線形成に好適な半導体装置内配線層
の加工方法に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a method for adding a number wire on the surface of a semiconductor device, and is particularly suitable for forming additional wires in ion beam processing, which is a pre-treatment process for forming additional wires. The present invention relates to a method of processing a wiring layer in a semiconductor device.

〔従来の技術〕[Conventional technology]

半導体装置を開発する場合、通常、種々の要因により、
配線ミス等が発生する。このため、半導体の開発工程に
は検査、不良解析、配線修正工程が含まれている。この
デバッグ工程の短縮は半導体装置の開発期間の短縮に直
結するため、現在、多くのデバッグ手段の検討が進めら
れている。その中の1つの方法として第4図に示す様に
、集束したイオンビームによる半導体装置の配線切断と
、半導体装置表面への配線付加し集束イオンビームで配
線層を露出させた所へ、ガス雰囲気中で、例えば、イオ
ンビーム、電子ビーム、レーザービームの様なエネルギ
ービームを照射し、CVDを行なうことで配線を形成す
る手法を組み合わせた方法が有効である。この配線形成
の方法としてエクステンデッド・アブストラクツ・オン
・ザ・セブンティーンス・コンファレンス・オン・ソリ
ッドステイト・デバイセズ・アンド・マテリアルズ(1
985年)第193頁から第196頁(Extende
d Abs−tracts of the 17th、
Confaren*e on 5olid 5tate
 Devi−ces and Materials、T
okyo 1985. p、 193〜196)等で論
じられているレーザCVDが現在、配線形成速度、配線
抵抗の面で秀れているため、研究が活発になっている。
When developing semiconductor devices, usually due to various factors,
Wiring errors, etc. occur. For this reason, the semiconductor development process includes inspection, failure analysis, and wiring correction processes. Since shortening the debugging process is directly linked to shortening the development period of semiconductor devices, many debugging means are currently being studied. As shown in Figure 4, one of the methods is to cut the wiring of the semiconductor device using a focused ion beam, add wiring to the surface of the semiconductor device, and place the exposed wiring layer in a gas atmosphere using the focused ion beam. Among these methods, effective is a method that combines methods of forming wiring by irradiating energy beams such as ion beams, electron beams, and laser beams and performing CVD. As a method for forming this wiring, Extended Abstracts on the Seventeenth Conference on Solid State Devices and Materials (1
985), pages 193 to 196 (Extende
d Abs-tracts of the 17th,
Conferen*e on 5solid 5tate
Devices and Materials, T
okyo 1985. Currently, laser CVD, which is discussed in 2003, p. 193-196), is currently being actively researched because it is superior in terms of wiring formation speed and wiring resistance.

ところが発明者らの実験によれば、イオンビームで配線
層への窓開けを行なった上でレーザ照射によりCVD膜
を析出させる際、下記の様な問題が明らかになった。つ
まり、通常、配線にはアルミが使用されるが、アルミは
光の反射率が高く、レーザーエネルギーの10%しか吸
収されない。このためCVD膜を析出させるにはレーザ
ーエネルギーを高める必要がある。
However, according to experiments conducted by the inventors, the following problems were found when depositing a CVD film by laser irradiation after opening a window in the wiring layer with an ion beam. In other words, aluminum is normally used for wiring, but aluminum has a high light reflectance and absorbs only 10% of laser energy. Therefore, it is necessary to increase laser energy to deposit a CVD film.

一方、CVD膜の吸収率は50%程度で、CVD膜析出
と同時に吸収されるレーザーエネルギーが一度に5倍に
増加するため、レーザ照射部の温度が急激に上昇し、ア
ルミが突沸する等のダメージが生ずる。したがって、低
エネルギーのレーザビームでCVD膜を析出させる方法
を開発する必要があった。
On the other hand, the absorption rate of the CVD film is about 50%, and the laser energy absorbed at the same time as the CVD film is deposited increases five times at once, so the temperature of the laser irradiated area increases rapidly, causing bumping of the aluminum, etc. Damage will occur. Therefore, it was necessary to develop a method for depositing CVD films using a low energy laser beam.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術では半導体装置内配線の反射率とCVD膜
の反射率の差によりて生ずる上記ダメージについての配
慮がなされておらず、実際に半導体装置内から配線を引
き出すことは困難である。
In the above-mentioned conventional technology, no consideration is given to the damage caused by the difference between the reflectance of the wiring inside the semiconductor device and the reflectance of the CVD film, and it is difficult to actually draw out the wiring from inside the semiconductor device.

本発明の目的は上記ダメージが生じない低エネルギーの
レーザービームでCVD膜を析出させるためのイオンビ
ームによる配線層への窓開は時における配線加工方法を
提供することにある。
An object of the present invention is to provide a wiring processing method in which a window is formed in a wiring layer using an ion beam for depositing a CVD film using a low-energy laser beam that does not cause the above-mentioned damage.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的はアルミの反射率を低下させることで達成され
る。このため露出させたアルミ表面にアルミの反射率を
低下させる様な加工を施す方法を採用する。
The above objective is achieved by reducing the reflectance of aluminum. For this reason, a method is adopted in which the exposed aluminum surface is processed to reduce the reflectance of the aluminum.

〔作用〕[Effect]

イオンビーム加工による半導体装置内配線への窓開けを
行ないアルミ等の配線表面を露出させる。
A window is opened in the wiring inside the semiconductor device using ion beam processing to expose the surface of the wiring such as aluminum.

次にイオンビームの偏向信号を窓開けまでのビーム走査
状態から配線表面に凹凸を形成して配線表面での光の反
射率を低下させる偏向信号に切り替えて配線表面を加工
する。次に、CVDガス雰囲気中で配線の露出部へレー
ザービームを照射する。
Next, the wiring surface is processed by switching the ion beam deflection signal from the beam scanning state until the opening of the window to a deflection signal that reduces the reflectance of light on the wiring surface by forming unevenness on the wiring surface. Next, the exposed portion of the wiring is irradiated with a laser beam in a CVD gas atmosphere.

この時、配線表面の反射率は上記加工によって低下させ
であるため、レーザーエネルギーが効率良く吸収され、
低エネルギーのレーザービームでCVD膜の析出が可能
で、CVD膜の析出に伴いレーザエネルギーを吸収する
面が配線表面からCvD膜表面にかわっても突沸等に起
因するダメージが生じることはなく、半導体内配線から
CVD配線を引き出すことが可能となる。
At this time, the reflectance of the wiring surface is reduced by the above processing, so the laser energy is efficiently absorbed.
It is possible to deposit a CVD film with a low-energy laser beam, and even if the surface that absorbs laser energy changes from the wiring surface to the CVD film surface as the CVD film is deposited, damage due to bumping etc. will not occur, and the semiconductor It becomes possible to draw out the CVD wiring from the internal wiring.

〔実施例〕〔Example〕

以下、本発明の実施例を図を用いて説明する。 Embodiments of the present invention will be described below with reference to the drawings.

第3図は半導体装置の配線を切断・接続する配線切断、
接続装置の概略構成を示した図である。
Figure 3 shows wiring cutting for cutting and connecting semiconductor device wiring.
FIG. 2 is a diagram showing a schematic configuration of a connecting device.

配線を加工するイオンビーム加工装置側と配線を形成す
るレーザCVD装置側の2つを中央のゲートバルブ8で
分離した構成をとっている。通常、イオンビーム2は液
体金属イオン源の様な高輝度なイオン源1を用い、そこ
から引き出したイオンビーム2を静電レンズ3でターゲ
ットである半導体装置5上に1μm以下のスポットに集
束する。イオンビーム2は静電レンズ3の下に設置した
偏向器4によって偏向し、ステージ6の移動と組み合わ
せ、半導体装置5上の任意の位置に任意の形状の加工を
行なうことが可能である。また、レーザCVD側ではガ
ス供給装置比からCVDガスを供給し、レーザ発振器1
0から真空チャンバ13内にレーザービーム14をレン
ズ9で集束しつつ窓11を通して導入し、半導体装置5
上の所定の位置にステージを移動させ照射することでC
VD配線を形成する。
The configuration is such that the ion beam processing equipment side that processes the wiring and the laser CVD equipment side that forms the wiring are separated by a central gate valve 8. Usually, the ion beam 2 uses a high-intensity ion source 1 such as a liquid metal ion source, and the ion beam 2 extracted from the source is focused with an electrostatic lens 3 to a spot of 1 μm or less on the target semiconductor device 5. . The ion beam 2 is deflected by a deflector 4 installed under the electrostatic lens 3, and in combination with the movement of the stage 6, it is possible to process an arbitrary shape at an arbitrary position on the semiconductor device 5. In addition, on the laser CVD side, CVD gas is supplied from the gas supply device ratio, and the laser oscillator 1
A laser beam 14 is introduced into the vacuum chamber 13 from 0 through the window 11 while being focused by the lens 9, and the semiconductor device 5 is
By moving the stage to a predetermined position above and irradiating the
Form VD wiring.

第1図は実際の配線接続工程を示した図である。FIG. 1 is a diagram showing an actual wiring connection process.

最初の工程はイオンビーム2によって半導体装置5内の
配線15を露出させる窓開は工程である。従来、窓開は
工程後、すぐに半導体装置をレーザCVD側へ搬送し、
配線形成工程に入ることが考えられていた。しかし、前
述した様なダメージが生じる。そこで、前述した様に配
線表面の反射率を下げるための表面処理工程を挿入する
。表面処理工程で行なう加工は第2図に示す様に配線表
面に凹凸を形成する加工である。第2図(a)は細い溝
を加工した実施例である。溝巾はレーザ光の波長と同程
度以下であることが望ましい。−例として、アルゴンレ
ーザを使用する場合、レーザ光の波長は488nmと5
14.5nm である。したがって、溝巾も0.5μm
以下に形成する。この巾の溝はイオンビームが0.1μ
mまで集束できるため、形成可能である。また、第2図
(b)は深いくさび形の溝、第2図(C)は円錐状の穴
を形成した例である。どちらも、入射したレーザ光は加
工溝、または、加工穴内で反射するが最終的には吸収さ
れるため、低エネルギーでも配線露出部にCVD膜を析
出できる。このうち円錐状の穴を堀る方法は、0.1μ
m程度に集束したイオンビームを窓開は工程終了後、一
定時間、配線露出部中心に固定して照射するだけで比較
的容易に、かつ、蝮時間で加工できるため、実用的であ
る。ただし、1点で充分に反射率が低下しない場合には
第2図(d)の様に多数の穴を形成すると有効である。
The first step is a window opening step in which the wiring 15 in the semiconductor device 5 is exposed by the ion beam 2. Conventionally, for window opening, the semiconductor device was immediately transported to the laser CVD side after the process.
It was thought that the process would involve the wiring formation process. However, the damage described above occurs. Therefore, as described above, a surface treatment step is inserted to reduce the reflectance of the wiring surface. The processing carried out in the surface treatment step is a processing for forming irregularities on the wiring surface, as shown in FIG. FIG. 2(a) shows an example in which a narrow groove is machined. It is desirable that the groove width is approximately equal to or less than the wavelength of the laser beam. - For example, when using an argon laser, the wavelength of the laser light is 488 nm and 5 nm.
It is 14.5 nm. Therefore, the groove width is also 0.5 μm.
Formed below. The groove of this width is 0.1μ
Since it can be focused up to m, it can be formed. Further, FIG. 2(b) shows an example in which a deep wedge-shaped groove is formed, and FIG. 2(C) shows an example in which a conical hole is formed. In either case, the incident laser light is reflected within the processed groove or hole, but is ultimately absorbed, so that a CVD film can be deposited on the exposed wiring portion even with low energy. Among these methods, the method of digging a conical hole is 0.1μ
It is practical because the process can be carried out relatively easily and in a short time by simply irradiating an ion beam focused at a diameter of about 100 m in diameter by fixing it at the center of the exposed wiring part for a certain period of time after the process is completed. However, if the reflectance cannot be reduced sufficiently at one point, it is effective to form a large number of holes as shown in FIG. 2(d).

例えば、円状のスルーホールを開けてアルミ配線層を予
め露出させ、その中央にイオンビームを10秒停止させ
て円錐穴を加工する。なお、この例では最初からアルミ
配線が露出した配線パターンを利用している。この露出
部にレーザを照射しCVD膜を析出させることができた
。このCVD膜析出に要したエネルギーは従来のCVD
膜析出と同時にアルミ配線にダメージを与えていた時の
20チであり、下部・のアルミ配線にダメージを与える
ことな(CVD膜の析出が可能となった。
For example, a circular through hole is opened to expose the aluminum wiring layer in advance, and the ion beam is stopped for 10 seconds to form a conical hole in the center of the hole. Note that this example uses a wiring pattern in which the aluminum wiring is exposed from the beginning. By irradiating this exposed portion with laser, a CVD film could be deposited. The energy required for this CVD film deposition is the same as that of conventional CVD film deposition.
It was 20 inches when the aluminum wiring was damaged at the same time as the film was deposited, and it became possible to deposit the CVD film without damaging the aluminum wiring underneath.

〔発明の効果〕〔Effect of the invention〕

本発明によれば低エネルギーのレーザービームを用いて
、露出させた半導体装置の配線層表面にCVD膜を析出
できるため、配線層にダメージを与えることなく良好な
CVD配線を形成できる効果がある。
According to the present invention, since a CVD film can be deposited on the exposed surface of the wiring layer of a semiconductor device using a low-energy laser beam, it is possible to form good CVD wiring without damaging the wiring layer.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明を含めた配線接続プロセスの説明図、第
2図は本発明の加エバターンを示す加工部の断面斜視図
、第3図は配線切断・接続装置の概略構成図、第4図は
配線切断・接続方法の説明図である。 1・・・イオン源     2・・・イオンビーム。 3・・・静電レンズ、    4・・・偏向器。 5・・・半導体装置    6・・・ステージ。 7・・・真空ポンプ、    8・・・ゲートバルブ。 9・・・レンズj10・・・レーザ発振器。 11・・・窓j12・・・CVDガス供給装置13・・
・真空チャンバ、14・・・レーザビーム。 15・・・配線、        16・・・光路17
・・・CVD膜
FIG. 1 is an explanatory diagram of a wiring connection process including the present invention, FIG. 2 is a cross-sectional perspective view of a processed part showing the processed evaturn of the present invention, FIG. 3 is a schematic configuration diagram of a wiring cutting/connection device, and FIG. The figure is an explanatory diagram of a wiring cutting/connecting method. 1...Ion source 2...Ion beam. 3... Electrostatic lens, 4... Deflector. 5...Semiconductor device 6...Stage. 7...Vacuum pump, 8...Gate valve. 9... Lens j10... Laser oscillator. 11...Window j12...CVD gas supply device 13...
・Vacuum chamber, 14...laser beam. 15... Wiring, 16... Optical path 17
...CVD film

Claims (1)

【特許請求の範囲】 1、イオンビーム加工装置を使用して半導体装置の配線
層を加工する際、配線層が露出した段階で上記イオンビ
ームの偏向信号を変化させ、光の反射率を低下させた配
線層表面を形成することを特徴とする配線加工方法。 2、特許請求の範囲第1項記載の配線加工方法において
、前記光の反射率を低下させた配線層表面として多数本
の溝構造を形成することを特徴とする配線加工方法。 3、特許請求の範囲第1項記載の配線加工方法において
、前記光の反射率を低下させた配線層表面として1本ま
たは数本のくさび形溝を形成することを特徴とする配線
加工方法。4、特許請求の範囲第1項記載の配線加工方
法において、前記光の反射率を低下させた配線層表面と
して1個または数個の円錐状穴を形成することを特徴と
する配線加工方法。
[Claims] 1. When processing a wiring layer of a semiconductor device using an ion beam processing device, the deflection signal of the ion beam is changed at the stage when the wiring layer is exposed to reduce the reflectance of light. A wiring processing method characterized by forming a surface of a wiring layer. 2. The wiring processing method according to claim 1, characterized in that a large number of groove structures are formed as the surface of the wiring layer in which the reflectance of the light is reduced. 3. The wiring processing method according to claim 1, characterized in that one or several wedge-shaped grooves are formed as the surface of the wiring layer in which the reflectance of light is reduced. 4. The wiring processing method according to claim 1, characterized in that one or several conical holes are formed as the surface of the wiring layer in which the reflectance of light is reduced.
JP62008001A 1987-01-19 1987-01-19 Wiring formation method Expired - Lifetime JP2533510B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62008001A JP2533510B2 (en) 1987-01-19 1987-01-19 Wiring formation method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62008001A JP2533510B2 (en) 1987-01-19 1987-01-19 Wiring formation method

Publications (2)

Publication Number Publication Date
JPS63177441A true JPS63177441A (en) 1988-07-21
JP2533510B2 JP2533510B2 (en) 1996-09-11

Family

ID=11681140

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62008001A Expired - Lifetime JP2533510B2 (en) 1987-01-19 1987-01-19 Wiring formation method

Country Status (1)

Country Link
JP (1) JP2533510B2 (en)

Also Published As

Publication number Publication date
JP2533510B2 (en) 1996-09-11

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