JPS63169030A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPS63169030A
JPS63169030A JP66687A JP66687A JPS63169030A JP S63169030 A JPS63169030 A JP S63169030A JP 66687 A JP66687 A JP 66687A JP 66687 A JP66687 A JP 66687A JP S63169030 A JPS63169030 A JP S63169030A
Authority
JP
Japan
Prior art keywords
film
semiconductor device
photoresist film
semiconductor substrate
manufacturing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP66687A
Other languages
Japanese (ja)
Inventor
Nobuo Motodo
本戸 信男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP66687A priority Critical patent/JPS63169030A/en
Publication of JPS63169030A publication Critical patent/JPS63169030A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To obtain an accurate opening by plasma-treating with inert gas with a patterned photoresist film as a mask before a wet etching is performed to prevent it from being undercut by the wet etching. CONSTITUTION:In the manufacture of a semiconductor device having the step of working a film 2 formed on a semiconductor substrate 1 by a photoetching method, a plasma-treatment with inert gas for strengthening the bondability of the film 2 to a photoresist film 3 is performed before the film 2 is removed by a wet etching method with the film 3 selectively formed on the film 2 as a mask. Thus, the manufacture of the semiconductor device which does not undercut in the etching step is obtained.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に被膜のエツ
チング工程を含む半導体装置の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device including a film etching step.

〔従来の技術〕[Conventional technology]

半導体装置の製造工程では半導体基板上に形成された絶
縁膜や金属膜を所定のパターンに加工するため各種のエ
ツチング技術が使われている。
In the manufacturing process of semiconductor devices, various etching techniques are used to process insulating films and metal films formed on semiconductor substrates into predetermined patterns.

第2図は従来の半導体装置の製造の途中工程における半
導体チップの断面図である。
FIG. 2 is a cross-sectional view of a semiconductor chip in the middle of the manufacturing process of a conventional semiconductor device.

第2図に示すように、半導体基板1の一主面に酸化膜2
を形成し、半導体基′板1を洗浄して乾燥させた後、酸
化膜2の表面にホトレジスト膜3を形成しホI・レジス
ト膜3を安定させるため熱処理を行う。次に、ホトレジ
スト膜3にパターンを露光し、現像した後、ホトレジス
ト膜3の密着性を良くするための熱処理を行い、ウェッ
ト・エッチング法により酸化膜2の開孔部4を形成し、
ホI〜レジスI・膜3を除去する。この場合、ホトレジ
スト膜3と酸化膜2との界面にエツチング液がしみ込む
ことによりアンダー・力・ソト5が生ずる。
As shown in FIG. 2, an oxide film 2 is formed on one main surface of the semiconductor substrate 1.
After cleaning and drying the semiconductor substrate 1, a photoresist film 3 is formed on the surface of the oxide film 2, and heat treatment is performed to stabilize the photoresist film 3. Next, after exposing and developing a pattern on the photoresist film 3, a heat treatment is performed to improve the adhesion of the photoresist film 3, and an opening 4 in the oxide film 2 is formed by a wet etching method.
Ho I to resist I and film 3 are removed. In this case, the etching solution seeps into the interface between the photoresist film 3 and the oxide film 2, causing under-etching, force, and under-etching 5.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の半導体装置の製造方法は、ホトレジスト
膜形成前の脱水処理が不足していたり、形成時の雰囲気
が高湿度であったりすると、半導体基板とホトレジスト
膜との密着強度が弱くなりエツチング工程の時に、半導
体基板とホトレジスト膜との界面へエツチング液がしみ
込み、いわゆるアンダー・カットが発生する事がある。
In the conventional semiconductor device manufacturing method described above, if the dehydration treatment before forming the photoresist film is insufficient or the atmosphere during formation is high humidity, the adhesion strength between the semiconductor substrate and the photoresist film becomes weak and the etching process is delayed. At this time, the etching solution may seep into the interface between the semiconductor substrate and the photoresist film, causing so-called undercuts.

又ホトレジスI−膜の現像後の熱処理が不足したりにの
熱処理からエツチング工程の間に長時間にわたり材装置
された場合などでは、ホトレジスト膜が水分を吸収し、
半導体基板とホトレジスト膜の密着強度がやはり弱くな
り、アンダー・カットが発生する。
In addition, if the photoresist I-film is not properly heat-treated after development, or if the material is kept for a long time between the heat treatment and the etching process, the photoresist film absorbs moisture,
The adhesion strength between the semiconductor substrate and the photoresist film is still weakened, and undercuts occur.

本発明は、エツチング工程でアンダー・カットを生じな
い半導体装置の製造方法を提供することにある。
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that does not cause undercuts during an etching process.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、半導体基板上に形成
した被膜を写真蝕刻法により加工することを含む半導体
装置の製造方法において、前記被膜上に選択的に形成し
たホトレジスト膜をマスクとして前記被膜をウニ・ソト
・エツチング法で除去する工程の前に前記被膜と前記ホ
トレジスト膜の密着性を強化させる不活性ガスによるプ
ラズマ処理を含んで構成される。
The method for manufacturing a semiconductor device of the present invention includes processing a film formed on a semiconductor substrate by photolithography, in which the film is processed by using a photoresist film selectively formed on the film as a mask. The photoresist film is subjected to plasma treatment using an inert gas to strengthen the adhesion between the film and the photoresist film before the step of removing the photoresist film using a sea urchin sotho-etching method.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例の途中工程における半導体チ
ップの断面図である。
FIG. 1 is a sectional view of a semiconductor chip at an intermediate step in an embodiment of the present invention.

第1図に示すように、半導体基板lの一主面に酸化膜2
を形成し、半導体基板1を洗浄して乾燥させた後、酸化
膜2の表面にホトレジストylA3を形成し、ホトレジ
スト膜3に残存する溶剤を除くための熱処理を行う。次
に、ホトレジスト膜3にパターンを露光して現像した後
、ホトレジスト膜3に残っている現像時の有機溶剤の除
去およびホトレジスト膜3と酸化r!A2との密着性を
良くするための熱処理を行う0次に、円筒型のプラズマ
・エツチング装置により窒素ガスの流量 数百SCCM
(標準状態に換算した毎分当りの流量(cya 3/m
1n))、圧力I T o r r以下、電力200〜
soowで5〜20分間の不活性ガスのプラズマ処理を
行った後ウェット・エッチング法により酸化膜3の開孔
部4を形成しホトレジスト膜3を除去する。
As shown in FIG. 1, an oxide film 2 is formed on one main surface of a semiconductor substrate l.
After cleaning and drying the semiconductor substrate 1, a photoresist ylA3 is formed on the surface of the oxide film 2, and a heat treatment is performed to remove the solvent remaining in the photoresist film 3. Next, after exposing and developing a pattern on the photoresist film 3, the organic solvent remaining on the photoresist film 3 during development is removed and the photoresist film 3 is oxidized. After heat treatment to improve adhesion with A2, a cylindrical plasma etching device is used to heat the nitrogen gas at a flow rate of several hundred SCCM.
(Flow rate per minute converted to standard conditions (cya 3/m
1n)), pressure I Torr or less, power 200~
After plasma treatment with an inert gas is performed for 5 to 20 minutes using SOOW, an opening 4 in the oxide film 3 is formed by a wet etching method, and the photoresist film 3 is removed.

このように、不活性ガスによるプラズマ処理を実施した
ものではアンダー・カットが全く発生しなかっな。
In this way, undercuts do not occur at all when plasma treatment is performed using an inert gas.

また、この不活性ガスのプラズマ処理時に酸素ガスを小
量(例えばIO3CCM程度)添加するとアンダー−カ
ッI・防止に加えてホトレジストの残渣が取除かれ歩留
りを向上させる効果を生ずるが、プラズマ処理時間は短
くする必要がある。
Additionally, adding a small amount of oxygen gas (for example, about IO3CCM) during this inert gas plasma processing has the effect of preventing under-cutting and removing photoresist residue, improving yield, but it also reduces the plasma processing time. needs to be shortened.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、バターニングされたホト
レジスト膜をマスクとしてウェット・エッチングを行う
前に不活性ガスによるプラズマ処理を行うことにより、
ホトレジスト膜とエツチングしようとする被膜との密着
性を良くしてウェット・エッチングによるアンダー・カ
ットを防止し、精度の良い開孔部が得られる効果がある
As explained above, the present invention performs plasma processing using an inert gas before performing wet etching using a patterned photoresist film as a mask.
This has the effect of improving the adhesion between the photoresist film and the film to be etched, preventing undercuts caused by wet etching, and providing highly accurate openings.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例の途中工程における半導体チ
ップの断面図、第2図は従来の半導体装置の製造の途中
工程における半導体チップの断面図である。 ■・・・半導体基板、2・・・酸化膜、3・・・ホトレ
ジスト膜、4・・・開孔部。
FIG. 1 is a cross-sectional view of a semiconductor chip at an intermediate step in an embodiment of the present invention, and FIG. 2 is a cross-sectional view of a semiconductor chip at an intermediate step in manufacturing a conventional semiconductor device. ■...Semiconductor substrate, 2...Oxide film, 3...Photoresist film, 4...Opening portion.

Claims (2)

【特許請求の範囲】[Claims] (1)半導体基板上に形成した被膜を写真蝕刻法により
加工することを含む半導体装置の製造方法において、前
記被膜上に選択的に形成したホトレジスト膜をマスクと
して前記被膜をウェット・エッチング法で除去する工程
の前に前記被膜と前記ホトレジスト膜の密着性を強化さ
せる不活性ガスによるプラズマ処理を行うことを特徴と
する半導体装置の製造方法。
(1) In a semiconductor device manufacturing method that includes processing a film formed on a semiconductor substrate by photolithography, the film is removed by wet etching using a photoresist film selectively formed on the film as a mask. 1. A method for manufacturing a semiconductor device, comprising performing plasma treatment using an inert gas to strengthen the adhesion between the film and the photoresist film before the step.
(2)被膜が半導体基板と同じ物質の酸化物からなる特
許請求の範囲第1項記載の半導体装置の製造方法。
(2) The method of manufacturing a semiconductor device according to claim 1, wherein the coating is made of an oxide of the same substance as the semiconductor substrate.
JP66687A 1987-01-05 1987-01-05 Manufacture of semiconductor device Pending JPS63169030A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP66687A JPS63169030A (en) 1987-01-05 1987-01-05 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP66687A JPS63169030A (en) 1987-01-05 1987-01-05 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPS63169030A true JPS63169030A (en) 1988-07-13

Family

ID=11480062

Family Applications (1)

Application Number Title Priority Date Filing Date
JP66687A Pending JPS63169030A (en) 1987-01-05 1987-01-05 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPS63169030A (en)

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