JPS63164236U - - Google Patents
Info
- Publication number
- JPS63164236U JPS63164236U JP5604487U JP5604487U JPS63164236U JP S63164236 U JPS63164236 U JP S63164236U JP 5604487 U JP5604487 U JP 5604487U JP 5604487 U JP5604487 U JP 5604487U JP S63164236 U JPS63164236 U JP S63164236U
- Authority
- JP
- Japan
- Prior art keywords
- plate
- grid array
- brazed
- pin grid
- thermal resistance
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 2
- 239000000919 ceramic Substances 0.000 claims description 2
- 229910052750 molybdenum Inorganic materials 0.000 claims description 2
- 239000011733 molybdenum Substances 0.000 claims description 2
- LTPBRCUWZOMYOC-UHFFFAOYSA-N Beryllium oxide Chemical compound O=[Be] LTPBRCUWZOMYOC-UHFFFAOYSA-N 0.000 claims 4
- 230000017525 heat dissipation Effects 0.000 claims 1
- 230000005855 radiation Effects 0.000 description 1
Description
第１図ａ，ｂは本考案のピングリツドアレイパ
ツケージの一実施例を示す平面図および縦断面図
、第２図は本考案の他の実施例を示す斜視図、第
３図は従来のピングリツドアレイパツケージの一
実施例を示す断面図である。
１……セラミツク積層部、２……段部、３……
リードピン、４……モリブデン板、５……ベリリ
ア板、６……放熱フイン。
Figures 1a and b are a plan view and a vertical sectional view showing one embodiment of the pin grid array package of the present invention, Figure 2 is a perspective view of another embodiment of the present invention, and Figure 3 is a conventional pin grid array package. FIG. 2 is a sectional view showing an embodiment of a pin grid array package. 1... Ceramic laminated part, 2... Stepped part, 3...
Lead pin, 4...molybdenum plate, 5...beryria plate, 6...heat radiation fin.
Claims (1)
ン板をろう付した１．５mm以上の肉厚のベリリア
板をセラミツク積層パツケージの底部としてろう
付したことを特徴とする低熱抵抗ピングリツドア
レイパツケージ。 ２ 前記ベリリア板の外側に放熱フインを設けた
実用新案登録請求の範囲第１項記載の低熱抵抗ピ
ングリツドアレイパツケージ。[Claims for Utility Model Registration] 1. A beryllia plate with a wall thickness of 1.5 mm or more, with a molybdenum plate of 0.2 to 1.0 mm brazed to the mount part, is brazed as the bottom of a ceramic laminated package. Low thermal resistance pin grid array package. 2. The low thermal resistance pin grid array package according to claim 1, wherein heat dissipation fins are provided on the outside of the beryllia plate.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5604487U JPS63164236U (en) | 1987-04-15 | 1987-04-15 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP5604487U JPS63164236U (en) | 1987-04-15 | 1987-04-15 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164236U true JPS63164236U (en) | 1988-10-26 |
Family
ID=30884506
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP5604487U Pending JPS63164236U (en) | 1987-04-15 | 1987-04-15 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164236U (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0513056U (en) * | 1991-07-26 | 1993-02-19 | 京セラ株式会社 | Package for storing semiconductor devices |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50139674A (en) * | 1974-04-24 | 1975-11-08 |
-
1987
- 1987-04-15 JP JP5604487U patent/JPS63164236U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS50139674A (en) * | 1974-04-24 | 1975-11-08 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0513056U (en) * | 1991-07-26 | 1993-02-19 | 京セラ株式会社 | Package for storing semiconductor devices |
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