JPS63164231A - Apparatus for visual inspection of semiconductor - Google Patents
Apparatus for visual inspection of semiconductorInfo
- Publication number
- JPS63164231A JPS63164231A JP31150586A JP31150586A JPS63164231A JP S63164231 A JPS63164231 A JP S63164231A JP 31150586 A JP31150586 A JP 31150586A JP 31150586 A JP31150586 A JP 31150586A JP S63164231 A JPS63164231 A JP S63164231A
- Authority
- JP
- Japan
- Prior art keywords
- leads
- sample stage
- lead
- plate
- mirror body
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 20
- 238000011179 visual inspection Methods 0.000 title description 12
- 238000007689 inspection Methods 0.000 claims description 7
- 239000011521 glass Substances 0.000 abstract description 18
- 238000005452 bending Methods 0.000 abstract description 8
- 238000007667 floating Methods 0.000 abstract description 5
- 238000003754 machining Methods 0.000 abstract 1
- 238000000034 method Methods 0.000 description 13
- 230000000694 effects Effects 0.000 description 4
- 206010028980 Neoplasm Diseases 0.000 description 2
- 238000010586 diagram Methods 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000000465 moulding Methods 0.000 description 2
- 238000004886 process control Methods 0.000 description 2
- 230000002950 deficient Effects 0.000 description 1
Landscapes
- Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】
［発明の目的］
（産業上の利用分野）
本発明は半導体リード外観検査装置に関し、特に半導体
装１ｉｔ（ＩＣ）のアウターリードの外観を検査するも
のである。DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a semiconductor lead appearance inspection apparatus, and particularly to an apparatus for inspecting the appearance of an outer lead of a semiconductor device 1it (IC).
（従来の技術）
近年半導体装置発展は目覚ましくとりわけ高密度化、ａ
性能化も著しいとともに、ＩＣの機能向上も著しい。機
能向上につれてＩＣ外囲器の大型化、多ビンかも目覚ま
しくなってきている。例えば、従来（７）３００＋ｅｉ
ｌ 、 ４００ｍ１ｌ ｔ＜ツ’ｙ−シから４５０１ｉ
１．６００１ｉ１ となり、更にＦＰ（フラットパッケ
ージ）、ＬＦＰ （ＬａｒｇｅＦＰ）と大型化し、それ
につれてビン数も４．８．１４゜１６．１８ビン、更に
６４．８４．１００ビンとなり、最近では１４４，１８
４，２２４ビンと続く。また、これに伴いＩＣのユーザ
ーの使用方法も種々変化し、その実装方法もボードにビ
ン挿入する方法、ソケット使いの方法から、より低コス
トな表面実装へと移行しつつある。(Prior art) In recent years, the development of semiconductor devices has been remarkable, especially with the increase in density, a
Not only has the performance improved significantly, but the functionality of the IC has also improved significantly. As functionality improves, the size of IC envelopes and the number of bins are increasing. For example, conventional (7) 300+ei
l, 400ml t<tsu'y-shi to 4501i
1.6001i1, and further increased to FP (Flat Package) and LFP (LargeFP), and the number of bins accordingly increased to 4.8.14゜16.18 bins, then 64.84.100 bins, and recently 144.18
This continues with 4,224 bins. Additionally, the way IC users use the IC has changed in various ways, and the mounting method is shifting from inserting the IC into a board via a bottle or using a socket to lower-cost surface mounting.
ところで、ＩＣとりわけＬＦＰＣ大型フラットパッケー
ジ：ＱＦＰ）は、特にリード数（ビン数）が多く、リー
ド幅も薄く、狭い。従って、その剛性も小さく曲り易く
、変形しやすい。その為、ＩＣのメーカー（製造者）も
ユーザー（使用＠）もその取扱いには細心の注意でおこ
なっている。Incidentally, ICs, especially LFPC large flat packages (QFP), have a particularly large number of leads (number of bins), and lead widths are also thin and narrow. Therefore, its rigidity is low and it is easy to bend and deform. For this reason, both IC manufacturers and users (users) must be extremely careful when handling them.
特に、メーカーでは超精密な治工具で硬度な管理状態で
作り出している。一方、ユーザーではこれを腫物に触る
如き取扱いで実装している。しかし、ユーザーとしてメ
ーカーの理想とする要求通り作り込むには、多大な労力
と資金が必要となるばかりか、不可能に近い技術となっ
ている。また、このアウターリードをもし外観検査等で
選別しようとした時、適切な検査寸法がなく、単に拡大
化がみでながめたり、顕微鏡でチェックしたりして第５
図（ａ）、（ｂ）の如きリード１の浮き沈み、第５図（
Ｃ）、（ｄ）の如きリード曲り等を観察し、修正したり
、不良としたりしていた。In particular, the manufacturer uses ultra-precise jigs and tools to create the hardness under controlled conditions. On the other hand, users implement this by handling it like touching a tumor. However, in order to create a product that meets the ideal requirements of the manufacturer as a user, it not only requires a great deal of effort and money, but it is also an almost impossible technology. In addition, if you try to sort out this outer lead by visual inspection, etc., there are no appropriate inspection dimensions, and you simply look at the magnification or check it with a microscope.
The ups and downs of lead 1 as shown in Figures (a) and (b), Figure 5 (
C) and (d), lead bends, etc. were observed and corrected or determined to be defective.
（発明が解決しようとする問題点）
本発明は上記事情に鑑みてなされたもので、ＩＣのり〜
ドの浮き、沈み、曲り、を簡単にかつ正確に検査し、そ
の加工工程の管理、最終出荷工程の管理を適正かつ正確
になしえる半導体リードＡツ装買を提供することを目的
とする。(Problems to be solved by the invention) The present invention has been made in view of the above circumstances, and
To provide a semiconductor lead A-tsu equipment that can easily and accurately inspect the floating, sinking, and bending of a lead, and properly and accurately manage its processing process and final shipping process.
［発明の構成〕
（問題点を解決するための手段）
本発明は、リードを有したＩＣを載置する平面度の高い
試料台と、この試料台に近接して立設され前記ＩＣのリ
ードが当接される透視板と、前記試料台の近くに設けら
れ前記ＩＣを反射させる鏡面体とを具備することを要旨
とする。[Structure of the Invention] (Means for Solving the Problems) The present invention provides a sample stand with high flatness on which an IC with leads is placed, and a sample stand with high flatness on which an IC with leads is placed, and a The object of the present invention is to include a see-through plate that is in contact with the IC, and a mirror body that is provided near the sample stage and reflects the IC.
（作用）
本発明によれば、ＩＣのリードの観察面をガラス板（透
視板）に当接し、鏡面を有する鏡面体を介して上部から
垂直に観察すると、前記リードの浮き、沈み、曲りを簡
単にかつ正確に検査することができる。(Function) According to the present invention, when the observation surface of an IC lead is brought into contact with a glass plate (see-through plate) and vertically observed from above through a mirror surface, the lead can be observed to float, sink, or bend. It can be inspected easily and accurately.
（実施例）
以下、本発明の一実施例を第１図及び第２図を参照して
説明する。ここで、第１図は本発明に係る半導体リード
外観検査装置の斜視図、第２図は第１図の正面図である
。(Example) An example of the present invention will be described below with reference to FIGS. 1 and 2. Here, FIG. 1 is a perspective view of a semiconductor lead visual inspection apparatus according to the present invention, and FIG. 2 is a front view of FIG. 1.
図中の１１は、段差面１１ａを有した平面度の高い試料
台である。この試料台１１の上に例えば第３図及び第４
図に示すＦＰ型ＩＣＩ２が載置される。前記試料台１１
の段差面１１ａ上には、前記ＩＣに対し４５度に傾斜し
た鏡面１３ａを有した鏡面体１３が設けられている。前
記鏡面体１３と試料台１１の側壁との間には、透視板と
しての例えば厚み０．１１１１１のガラス板１４が立設
されている。ここで、前記ＩＣ１２のアウターリード１
５の先端部はガラス板１４の片面に当接されている。こ
うした構造の装置において、作業者は前記鏡面体１３の
上方からのぞいてＩＣ１２のアウターリード１５などの
外観を観察する。なお、図中の１６はＩＣの外囲器であ
る。Reference numeral 11 in the figure is a highly flat sample stage having a stepped surface 11a. For example, on this sample stage 11,
The FP type ICI 2 shown in the figure is placed. The sample stage 11
A mirror surface body 13 having a mirror surface 13a inclined at 45 degrees with respect to the IC is provided on the stepped surface 11a. A glass plate 14 having a thickness of, for example, 0.11111 mm is erected between the mirror body 13 and the side wall of the sample stage 11 as a see-through plate. Here, the outer lead 1 of the IC 12
The tip of 5 is in contact with one side of the glass plate 14. In an apparatus having such a structure, an operator looks from above the mirror body 13 and observes the appearance of the outer leads 15 of the IC 12 and the like. In addition, 16 in the figure is an envelope of the IC.
上記実施例に係る半導体リード外観検査装置は、平面度
の高い試料台１１と、この試料台１１の段差面１１ａ上
に設けられた鏡面体１３と、ＩＣのアウターリード１５
の先端部が当接されるガラス板１４とから構成される構
造となっている。従って、以下に述べる効果を有する。The semiconductor lead visual inspection apparatus according to the above embodiment includes a sample stage 11 with high flatness, a mirror body 13 provided on the step surface 11a of this sample stage 11, and an outer lead 15 of an IC.
The glass plate 14 is abutted against the tip of the glass plate 14. Therefore, it has the effects described below.
■従来の拡大鏡、顕微鏡に比べ明らかに全体を対比した
リード曲り、リード浮き、沈みが判定出来る事により、
成形加工工程の工程管理、出荷時の出荷管理が適正かつ
正確に行なえる。■Compared to conventional magnifying glasses and microscopes, lead bending, lead lifting, and lead sinking can be clearly determined in comparison with the whole.
Process control of the molding process and shipping control at the time of shipment can be performed appropriately and accurately.
■前述と同様な理由により、製品のグレードアップ、工
程フィードバックが迅速かつ正確になる。■For the same reasons as mentioned above, product upgrades and process feedback become faster and more accurate.
■ガラス根１４に寸法を入れる事により、アウターリー
ド１５の寸法も簡単に読取れる。■By entering the dimensions in the glass root 14, the dimensions of the outer lead 15 can be easily read.
事実、鏡面体１３の上方から覗けばリード形状が簡単に
かつ正確に観察できかちまた、第５図（ａ）〜（ｄ）に
示す種々の形状のアウターリード１５も簡単にｌ！察で
きる。In fact, the shape of the leads can be easily and accurately observed by looking from above the specular body 13, and the various shapes of the outer leads 15 shown in FIGS. 5(a) to 5(d) can also be easily observed. I can understand it.
なお、上記実施例では、ＦＰ型ＩＣをのアウターリード
を観察する場合について述べたが、これに限定されず、
ＤＩＰ型ＩＣやＰＬＣＣ型ＩＣなどのリードの形状を観
察する際にも適用できる。Note that in the above embodiment, a case was described in which the outer leads of an FP type IC were observed, but the present invention is not limited to this.
It can also be applied when observing the shape of leads of DIP type ICs, PLCC type ICs, etc.
［発明の効果］
以上詳述した如く本発明によれば、ＩＣのリードの浮き
、沈み、曲りを簡単に正確に検査し、その加工工程の管
理、最終出荷工程の管理を適正（−二２ト］ン１九ノ
かつ正確になしえる半導体リード゛検査装置を提供でき
る。[Effects of the Invention] As detailed above, according to the present invention, it is possible to easily and accurately inspect the floating, sinking, and bending of IC leads, and to properly manage the processing process and final shipping process (-22). Therefore, it is possible to provide a semiconductor lead inspection device that can accurately and accurately perform tests.
３図はＦＰ型ＩＣの平面図、第４図は第３図の正面図、
第５図（ａ）〜（ｄ）は夫々ＩＣのアウタ−リードの形
状の説明図である。
１・・・試料台、１１ａ・・・段差面、１２・・・ＦＰ
型ＩＣ１１３・・・鏡面体、１４・・・ガラス板（透視
板）、１５・・・アウターリード、１６・・・外囲器。
出願人代理人 弁理士 鈴江武彦 第 １ ｔ−
７
第 ２ 図
第４図
（ａ） （ｂ）
で−）５ｔ】
手続補正書
昭和 １？２°弓１１７日
ｉ許庁長官 黒 １） 明 雄 殿、慣性の表示
特願昭６１−３１１５０５号
、発明の名称
半導体リード外観検査装置
、補正をする者
・１９件との関係 特許出願人
６、補正の対象
明細書
明 細 書
１、発明の名称
半導体リード外観検査装置
２、特許請求の範囲
リードを有したＩＣｔ−載置する平面度の高い試料台と
、この試料台に近接して立設され前記ＩＣのリードが当
接される透視板と、前記試料台の近くに設けられ前記Ｉ
Ｃを反射させる鏡面体とを具備することを特徴とする半
導体リード外観検査装置。
３、発明の詳細な説明
［発明の目的］
（産業上の利用分野）
本発明は半導体リード外観検査装置に関し、特に半導体
装置（ＩＣ）の７ウタリードの外観を検査するものであ
る。
（従来の技術）
近年半導体装置発展は目覚ましくとりわけ高密度化、高
性能化も著Ｍともに、ＩＣの機能向上も著しい。機能向
−ヒにつれてＩＣ外囲器の大型化、多ピン化も目覚まし
くなってきている。例えば、従来の３００ｍ１ｌ 、
４００ｍ１ｌパツケージから４５０１１１ｉｔ 、
６００ｗ１ｌ となり、ＦＰ（フラ・ントパッケージ
） 、 Ｌ Ｆ Ｐ （ＬａｒｇｅＦ Ｐ）と大型化
し、それにつれてピン数も４，８，１４，１６゜１８ピ
ン、更に６４，８４，１００ビンとなり。
最近では１４４，１８４，２２４ピンと続く。また、こ
れに伴いＩＣのユーザーの使用方法も種々変化し、その
実装方法もボードにピン持久する方法、ソケット使いの
方法から、より低コストな表面実装へと移行しつつある
。
ところで、ＩＣとりわけＬＦＰ （大型フラットパッケ
ージ、ＱＦＰ）は、特にリード数（ビンａ）が多く、リ
ード幅も薄く、狭い、従って、その構成も小さく曲り易
く、変形しやすい、その為、ＩＣのメーカー（製造者）
もユーザー（便用Ｐｉ）もその取扱いには細心の注意で
おこなっている。特に、メーカーでは超精密な治工具で
高度な管理状態で作り出している。一方、ユーザーでは
これを腫物に触る如き扱いで実装している。しかし、メ
ーカーとしてユーザーの理想とする要求通り作り込むに
は、多大な労力と資金が必要となるばかりか、不可能に
近い技術となっている。また、このアウターリードをも
し外観検査等で選別しようとした時、適切な検査治工具
がなく、単に拡大値もでながめたり、顕微鏡でチェック
したりして第５図（ａ）、（ｂ）の如きリードｌの浮き
沈み、第５図（Ｃ）、（ｄ）の如きリード曲り等を観察
し、修正したり、不良としたすしていた。
（発明が解決しようとする問題点）
本発明は丘記事情に鑑みてなされたもので、ＩＣのリー
ドの浮き、沈み、曲りを簡単にかつ正確に検査し、その
加工工程の管理、最終出荷工程の管理を適正かつ正確に
なしえる半導体リード外観検査装置を提供することを目
的とする。
［発明の構成コ
（問題点を解決するための手段）
本発明は、リードを有したＩＣをａ置する平面度の高い
試料台と、この試料台に近接して立設され前記ＩＣのリ
ードがち接される透視板と、前記試料台の近くに設けら
れ前記ＩＣを反射させる鏡面体とを具備することを要旨
とする。
（作用）
本発明によれば、ＩＣのリードの観察面をガラス板（透
視板）に当接し、鏡面を有する鏡面体を介して上部から
垂直に観察すると、前記リードの浮き、沈み、曲りを簡
単にかつ正確に検査することができる。
（実施例）
以下、本発明の一実施例を第１図及び第２図を参照して
説明する。ここで、第１図は本発明に係る半導体リード
外観検査装置の斜視図、第２図は第１図の正面図である
。
図中の１１は、段差面１１ａを有した平面度の高い試料
台である。この試料台１１の上に例えば第３図及び第４
図に示すＦＰ型ＩＣ１２が載置される。前記試料台１１
の段差面１１ａ上には、前記ＩＣに対し４５度に傾斜し
た鏡面Ｌ３ａを有した鏡面体１３が設けられている。前
記鏡面体１３と試料台１１の側壁との間には、透視板と
しての例えば厚み０．ｌａ＋ｍのガラス板１４が立設さ
れている。ここで、前記ＩＣ１２のアウターリード１５
の先端部はガラス板１４の片面に当接されている。こう
した構造の装置において、作業者は前記鏡面体１３の上
方からのぞいてＩＣ１２のアウターリード１５などの外
観を観察する。なお、図中の１６はＩＣの外囲器である
。
上記実施例に係る半導体リード外観検査装置は、平面度
の高い試料台１１と、この試料台１１の段差面１１ａＪ
ｚに設けられた鏡面体１３と。
ＩＣの７ウターリード１５の先端部が当接されるガラス
板１４とから構成された構造となっている。従って、以
下に述べる効果を有する。
■従来の拡大鏡、顕微鏡に比べ明らかに全体を対比した
リード曲り、リード浮き、沈みが判定出来る事により、
成形加工工程の工程管理、出荷時の出荷管理が適正かつ
正確に行なえる。
■前述と同様な理由により、製品のグレードアップ、工
程フィードバックが迅速かつ正確になる。
′３）ガラス板１４に寸法を入れる事により、アウター
リード１５の寸法も簡単に読取れる。
・１を実、鏡面体１３の上方からのぞけばリード形状が
簡単にかつ正確に観察でき、且つまた第５図（ａ）〜（
ｄ）に示す種々の形状のアウター９−ド１５も簡単に観
察できる。
なお、上記実施例では、ＦＰ型ＩＣのアウターリードを
観察する場合について述べたが、これに限定されず、Ｄ
ＩＰ型ＩＣやＰＬＣＣ型ＩＣなどのリードの形状を観察
する際にも適用できる。
［発明の効果］
以Ｆ詳述した如く本発明によれば、ＩＣのリードの浮き
、沈み、曲りを簡単に正確に検査し。
その加工工程の管理、最終出荷１程の管理を適正かつ正
確になしえる半導体リード外観検査装置を提供できる。
４、図面の簡単な説明
第１図は本発明の一実施例に係る半導体リード外観検査
装置の斜視図、第２図は第１図の正面図、第３図はＦＰ
型ＩＣの平面図、第４図は第３図の正面図、第５図（ａ
）〜（ｄ）は夫々ＩＣの７ウターリードの形状の説明図
である。
１・・・試料台、１１ａ・・・段差面、１２・・・ＦＰ
型ＩＣ，１３・・・鏡面体、１４・・・ガラス板（透視
板）１５・・・アウターリード、１６・・・外囲器。Figure 3 is a plan view of the FP type IC, Figure 4 is a front view of Figure 3,
FIGS. 5(a) to 5(d) are explanatory diagrams of the shapes of the outer leads of the IC, respectively. 1... Sample stage, 11a... Step surface, 12... FP
Type IC113...Mirror body, 14...Glass plate (see-through plate), 15...Outer lead, 16...Envelope. Applicant's agent Patent attorney Takehiko Suzue 1st t-
7 Fig. 2 Fig. 4 (a) (b) -) 5t] Procedural amendment Showa 1?2° Bow 117th day i Commissioner of the Office Black 1) Akio, Inertia Indication Patent Application No. 1988-311505 , Title of the invention: Semiconductor lead visual inspection device, Person making the amendment/Relationship with 19 cases Patent applicant: 6, Specification subject to amendment: Description 1, Name of the invention, Semiconductor lead visual inspection device: 2, Claims lead a highly flat sample stand on which an ICt having an ICt is placed; a see-through plate that is erected close to the sample stand and to which the leads of the IC are brought into contact;
1. A semiconductor lead appearance inspection device comprising: a specular body that reflects C. 3. Detailed Description of the Invention [Object of the Invention] (Industrial Field of Application) The present invention relates to a semiconductor lead appearance inspection apparatus, and particularly to an apparatus for inspecting the appearance of seven outer leads of a semiconductor device (IC). (Prior Art) The development of semiconductor devices has been remarkable in recent years, and in particular, the increase in density and performance has been remarkable, and the functionality of ICs has also been significantly improved. As functionality improves, IC envelopes are becoming larger and have more pins. For example, conventional 300ml,
450111it from 400ml package,
It became 600w1l, and the size increased to FP (flat package) and LFP (LargeFP), and the number of pins accordingly increased to 4, 8, 14, 16° 18 pins, and then 64, 84, and 100 pins. Recently, it has been followed by 144, 184, and 224 pins. In addition, the way IC users use the IC has changed in various ways, and the mounting method is shifting from using pins on the board and using sockets to lower-cost surface mounting. By the way, ICs, especially LFPs (large flat packages, QFPs), have a particularly large number of leads (bins a) and lead widths are thin and narrow. Therefore, their structure is small and easy to bend and deform. (Manufacturer)
Both users (common Pis) handle them with the utmost care. In particular, manufacturers use ultra-precise jigs and tools to create products under highly controlled conditions. On the other hand, users implement this as if they were touching a tumor. However, for a manufacturer to create a product that meets the ideal requirements of the user not only requires a great deal of effort and money, but it is also an almost impossible technology. In addition, if we tried to sort out these outer leads by visual inspection, etc., we would not have an appropriate inspection tool, so we would simply look at the magnified values or check them with a microscope, as shown in Figures 5 (a) and (b). The ups and downs of the lead 1 as shown in FIG. 5(C) and (d) and the bending of the lead as shown in FIG. (Problems to be Solved by the Invention) The present invention was made in view of the circumstances of the hill country, and it is possible to easily and accurately inspect the floating, sinking, and bending of IC leads, manage the processing process, and final shipment. The purpose of the present invention is to provide a semiconductor lead visual inspection device that can appropriately and accurately manage processes. [Structure of the Invention (Means for Solving Problems)] The present invention provides a highly flat sample stand on which an IC with a lead is placed, and a sample stand with a high flatness on which an IC with a lead is placed, and a The object of the present invention is to include a see-through plate that is brought into close contact with the sample stage, and a mirror body that is provided near the sample stage and reflects the IC. (Function) According to the present invention, when the observation surface of an IC lead is brought into contact with a glass plate (see-through plate) and vertically observed from above through a mirror surface, the lead can be observed to float, sink, or bend. It can be inspected easily and accurately. (Example) An example of the present invention will be described below with reference to FIGS. 1 and 2. Here, FIG. 1 is a perspective view of a semiconductor lead visual inspection apparatus according to the present invention, and FIG. 2 is a front view of FIG. 1. Reference numeral 11 in the figure is a highly flat sample stage having a stepped surface 11a. For example, on this sample stage 11,
The FP type IC 12 shown in the figure is mounted. The sample stage 11
A mirror surface body 13 having a mirror surface L3a inclined at 45 degrees with respect to the IC is provided on the stepped surface 11a. Between the mirror surface body 13 and the side wall of the sample stage 11, there is a transparent plate having a thickness of, for example, 0.5 mm. A glass plate 14 of la+m is erected. Here, the outer lead 15 of the IC 12
The tip of the glass plate 14 is in contact with one side of the glass plate 14. In an apparatus having such a structure, an operator looks from above the mirror body 13 and observes the appearance of the outer leads 15 of the IC 12 and the like. In addition, 16 in the figure is an envelope of the IC. The semiconductor lead visual inspection apparatus according to the above embodiment includes a sample stage 11 with high flatness and a stepped surface 11aJ of this sample stage 11.
and a mirror surface body 13 provided at z. It has a structure consisting of a glass plate 14 against which the tips of the seven outer leads 15 of the IC come into contact. Therefore, it has the effects described below. ■Compared to conventional magnifying glasses and microscopes, lead bending, lead lifting, and lead sinking can be clearly determined in comparison with the whole.
Process control of the molding process and shipping control at the time of shipment can be performed appropriately and accurately. ■For the same reasons as mentioned above, product upgrades and process feedback become faster and more accurate. '3) By entering the dimensions on the glass plate 14, the dimensions of the outer lead 15 can be easily read.・In fact, if you look at 1 from above the specular body 13, you can easily and accurately observe the lead shape, and also see FIGS.
The various shapes of the outer 9-domains 15 shown in d) can also be easily observed. Although the above embodiment describes the case where the outer leads of an FP type IC are observed, the present invention is not limited to this.
It can also be applied when observing the shape of leads of IP type ICs, PLCC type ICs, etc. [Effects of the Invention] As described in detail below, according to the present invention, the floating, sinking, and bending of IC leads can be easily and accurately inspected. It is possible to provide a semiconductor lead visual inspection device that can appropriately and accurately manage the processing process and the final shipment. 4. Brief description of the drawings Fig. 1 is a perspective view of a semiconductor lead visual inspection device according to an embodiment of the present invention, Fig. 2 is a front view of Fig. 1, and Fig. 3 is a FP.
The top view of the type IC, Figure 4 is the front view of Figure 3, Figure 5 (a
) to (d) are explanatory diagrams of the shapes of the seven outer leads of the IC, respectively. 1... Sample stage, 11a... Step surface, 12... FP
Type IC, 13... Mirror surface body, 14... Glass plate (see-through plate) 15... Outer lead, 16... Envelope.
Claims (1)
この試料台に近接して立設され前記ＩＣのリードが当接
される透視板と、前記試料台の近くに設けられ前記ＩＣ
を反射させる鏡面体とを具備することを特徴とする半導
体リード外観検査装置。A highly flat sample stage on which an IC with leads is placed;
a see-through plate that is erected close to the sample stand and on which the leads of the IC come into contact;
1. A semiconductor lead appearance inspection device, comprising: a mirror surface that reflects light.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31150586A JPS63164231A (en) | 1986-12-25 | 1986-12-25 | Apparatus for visual inspection of semiconductor |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31150586A JPS63164231A (en) | 1986-12-25 | 1986-12-25 | Apparatus for visual inspection of semiconductor |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164231A true JPS63164231A (en) | 1988-07-07 |
Family
ID=18018041
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31150586A Pending JPS63164231A (en) | 1986-12-25 | 1986-12-25 | Apparatus for visual inspection of semiconductor |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164231A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04162742A (en) * | 1990-10-26 | 1992-06-08 | Nec Kyushu Ltd | Flatness measuring instrument for tip part of lead |
| JPH04130441U (en) * | 1991-05-23 | 1992-11-30 | 株式会社電子技研 | Jig for soldering inspection |
| JP2008210923A (en) * | 2007-02-26 | 2008-09-11 | Matsushita Electric Ind Co Ltd | Method of picking up electronic component and pickup device used therefor |
-
1986
- 1986-12-25 JP JP31150586A patent/JPS63164231A/en active Pending
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04162742A (en) * | 1990-10-26 | 1992-06-08 | Nec Kyushu Ltd | Flatness measuring instrument for tip part of lead |
| JPH04130441U (en) * | 1991-05-23 | 1992-11-30 | 株式会社電子技研 | Jig for soldering inspection |
| JP2008210923A (en) * | 2007-02-26 | 2008-09-11 | Matsushita Electric Ind Co Ltd | Method of picking up electronic component and pickup device used therefor |
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