JPS63164225U - - Google Patents
Info
- Publication number
- JPS63164225U JPS63164225U JP3327187U JP3327187U JPS63164225U JP S63164225 U JPS63164225 U JP S63164225U JP 3327187 U JP3327187 U JP 3327187U JP 3327187 U JP3327187 U JP 3327187U JP S63164225 U JPS63164225 U JP S63164225U
- Authority
- JP
- Japan
- Prior art keywords
- terminal pins
- grid array
- electrically connected
- utility
- scope
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000005259 measurement Methods 0.000 claims description 3
Landscapes
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Lead Frames For Integrated Circuits (AREA)
- Testing Of Individual Semiconductor Devices (AREA)
- Measuring Leads Or Probes (AREA)
Description
第１図は本考案の第１の実施例の外観図、第２
図は本考案の第２の実施例の外観図である。 １……ＩＣ用ピングリツドアレイケース、２…
…端子ピン、３……測定用パツド、４……ＩＣ用
ピングリツドアレイケース、５……端子ピン、６
……測定用端子。
図は本考案の第２の実施例の外観図である。 １……ＩＣ用ピングリツドアレイケース、２…
…端子ピン、３……測定用パツド、４……ＩＣ用
ピングリツドアレイケース、５……端子ピン、６
……測定用端子。
Claims (1)
- 端子ピンのある面と異なる面に端子ピンと電気
的に接続された測定用端子を有するＩＣ用ピング
リツドアレイケース。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327187U JPS63164225U (ja) | 1987-03-06 | 1987-03-06 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP3327187U JPS63164225U (ja) | 1987-03-06 | 1987-03-06 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63164225U true JPS63164225U (ja) | 1988-10-26 |
Family
ID=30840729
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP3327187U Pending JPS63164225U (ja) | 1987-03-06 | 1987-03-06 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63164225U (ja) |
-
1987
- 1987-03-06 JP JP3327187U patent/JPS63164225U/ja active Pending