JPS63157560A - Decoding device - Google Patents

Abstract

PURPOSE:To decrease number of times of accessing a reference picture element by detecting a bit location not corresponding to a specified pattern of the reference picture element and applying the processing the assigning a preset value in response to the state of the reference picture element simultaneously. CONSTITUTION:A ROM 3 obtains the state of the reference picture element 4 outputted form a reference picture element shift register group 2 based on a table and discriminates whether or not the state is coincident with the state given by a state control signal 5 is discriminated by each unit of bits of a reproduced picture. When the state is coincident, a Miss signal is outputted and a Hit signal and the Miss signal are sent to a multiplexer 11 and a decoding picture element generating section. The multiplexer 11 selects the decoded picture element 12 in case of the Hit signal and selects an interpolated picture element 8 in the case of the Miss signal to output it to a reproduced picture element shift register 13.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention decodes the pixels sampled in the first stage,
From the second stage onwards, the pixels that fill in the gaps are decoded (
This relates to a decoding method in a hierarchical code.

BACKGROUND OF THE INVENTION With the diversification of facsimile communications, it has been considered to use facsimile terminals in combination with display terminals to perform conversational pixel communication, image database searches, and the like. In contrast to conventional encoding methods such as the MR method, which sequentially encodes pixels from top to bottom along the scanning line,
As an encoding method suitable for such conversational image communication, a method has been proposed in which hierarchical encoding processing is performed. Processing using a hierarchical encoding method can display a rough image in early steps and gradually increase the resolution to obtain the final image, making it suitable for conversational image communication and searching image databases.

The sequential playback coding method is one of them (Japanese Patent Application Laid-Open No. 1986-1
27875).

The sequential reproduction encoding method performs encoding using the following procedure.

■Pixels extracted every △X = 2n (n = integer) in the horizontal (main scanning) direction and every △Y = 2n (n - integer) line in the vertical (sub-scanning) direction are concatenated for run-length encoding. I do.

Next, the pixel located at the center surrounded by the rectangle of the four coded neighboring pixels is classified into five states according to the number of black pixels in the reference pixel, using these four pixels as reference pixels. Then, run-length encoding is performed by connecting pixels corresponding to each state.

■Next, the pixel located at the center surrounded by a rhombus with the four neighboring encoded pixels is classified into five states according to the number of reference black pixels, using these four pixels as reference pixels, and each state is Run-length encoding is performed by connecting pixels corresponding to .

■ Repeat until the encoding of ■ and ■ is completed. FIG. 2 is a diagram showing the concept of coding sequence in the sequential reproduction coding system when ΔX=ΔY=4, and first the pixels marked with ◎ are encoded (■ above).

Next, for the O-marked pixel, among the ◎-marked pixels that have already been encoded, the four closest neighbors surrounding the ○-marked pixel in a rectangle are used as reference pixels, and the state of the reference pixel (number of black pixels) is determined. Encode (■ above). Next, the pixel marked with Δ is set to the four closest neighbors surrounding the pixel marked with Δ in a rhombus among the pixels marked with ◎ and ○ that have already been encoded, and the state of the reference pixel (the number of black pixels) is set as the reference pixel. ) are encoded separately (■ above). Next, the pixel marked with
Among the pixels marked with ◎, ○, and Δ, which have already been encoded, the pixel marked with ■■
). Finally, replace the pixels marked with ◎ and O
Among the pixels marked with marks, △ marks, and X marks, the four closest neighbors surrounding the marked pixel in a diamond shape are used as reference pixels, and the states of the reference pixels (number of black pixels) are encoded (■).

The above is the case where ΔX=ΔY=4, but the same applies to other ΔX and ΔY. Also, when △X≠△Y, when the reference pixel problem in one direction becomes 2, the distance in that direction is fixed, and until the reference pixel distance in the other direction becomes 2,
, ■ performs the processing.

The data structure of the hierarchical decoding method is that in the first layer, the code data of the thinned out image, in the second layer, the code data of the image that fills in between, and in the third layer, the code of the pixels that fills in between the pixels up to the second layer. Code data is structured for each layer by image code data that sequentially fills in gaps between pixels in the previous layer. Therefore, when displaying only the first layer, for example, only sampled images are reproduced from the code data, so it is necessary to visually interpolate between the reproduced pixels. As an interpolation method, the color of the interpolation pixel is generally determined based on one or more decoded reference pixels in the vicinity of the interpolation pixel. If the number of reference pixels is increased, the interpolation will be visually better. Among the interpolation processing methods in the sequential reproduction encoding method described above, there is a sequential interpolation method that uses a plurality of reference pixels. The sequential interpolation method interpolates undecoded pixels according to the algorithm of the sequential reproduction encoding method.If there are 0 or 1 black pixel among the 4 reference pixels, the result is white, and the number of black pixels is 2.3 or 4. When , interpolation is performed using black.

Some hierarchical encoding methods perform encoding according to the state of reference pixels in order to improve the data compression rate. For example, in the sequential reproduction coding method, the data is divided into five states depending on the number of black pixels among the four reference pixels, and coding is performed for each state. In the sequential playback encoding method, one state is one layer, and the hierarchical structure is shown in FIG. 4. This is the case where ΔX and ΔY of the first layer (level 1) are 8, and in the same figure, the state ai is a window in which there are i black pixels among the four reference pixels.

Problems to be Solved by the Invention When performing interpolation processing in an encoding system having such a hierarchical structure, the following problems occur.

In other words, when the reference pixel for encoding/decoding processing and the reference pixel for interpolation processing are common, as in the sequential interpolation method of the sequential playback encoding method described above, the reference pixels for decoding processing and interpolation processing are exactly the same. The problem is that the reference pixel access may be accessed multiple times, resulting in wasted access to the reference pixel. Taking the sequential reproduction encoding method as an example, if after decoding up to the second layer in Fig. 4, the third layer and subsequent layers are interpolated using the sequential interpolation method,
The decoding process of the second layer and the order of the third to sixth layers - order interpolation uses the same reference pixels (square with △X = △Y = 8), so the same reference pixels are accessed redundantly. It turns out.

The present invention has been made in view of this point, and an object of the present invention is to reduce the number of times reference pixels are accessed during decoding processing and interpolation processing.

Means for Solving the Problems In order to solve the above problems, the present invention detects the pixel position corresponding to a specific pattern of reference pixels and writes a regular pixel decoded from encoded data, and specifies the reference pixel. This method is characterized in that it simultaneously performs a process of detecting bit positions that do not correspond to the pattern and allocating and interpolating a predetermined value according to the state of the reference pixel.

Effect of the Invention With the above-described means, the present invention can obtain interpolated decoded data by accessing the reference pixel once for decoding processing and interpolation processing in which the reference pixel is common.

Embodiment FIG. 1 is a block diagram showing a decoding device according to an embodiment of the present invention. In the figure, 1 is an image memory, 2 is a reference pixel shift register group consisting of a plurality of shift registers that set and shift reference pixels, and 3 is an input device that receives state control signals 5 and interpolation control signals 6 for reference pixels 4 and 5. , reference pixel 4
A read-only memory (R
OM), 10 is a decoding pixel generation unit, 11 is Hit/Mi
A multiplexer which selects one of interpolation pixels 8 and 12 to be decoded by the ss decoding 7; 13 a reproduction pixel shift register which generates one word of reproduction pixels; and 14 a reproduction pixel shift register which generates one word of reproduction pixels. A mask pattern shift register that generates a pattern for masking unnecessary bits when writing reproduced pixels to an image memory, 1
5 is a timing control section.

The operation of the device shown in Fig.
An example will be explained in which the decoding of the layers and the sequential interpolation of the third to sixth layers are performed simultaneously.

First, the state control signal 5 is set to state s2 in accordance with the second layer decoding process. Further, the interpolation control signal 6 is set to a mode in which decoding processing and sequential interpolation are performed simultaneously. When this mode is set, among the inputs to the reproduced pixel shift register 13, the bits whose state of the reference pixel 4 matches the state to which the state control signal 5 is given are assigned the decoding pixel 12, and the bits that do not match are assigned the interpolating pixel 8. will be assigned.

Note that the interpolation control signal 6 also has a mode for only decoding processing and a mode for only sequential interpolation. Each mode will be explained later. After setting the control signal 5 and the interpolation control signal 6, the reference pixels corresponding to the reproduced pixels of one word are read out from the image memory 1 and set in the reference pixel shift register group 2, and the decoding pixel generation unit 10 generates code data. Generate decoded pixels from. Here, the regular pixel generated from the decoded data is the decoded pixel, the pixel whose color is determined according to the state of the reference pixel is the interpolated pixel, and the decoded pixel is interpolated where the given state matches and where it does not match. The assigned pixels are defined as reproduced pixels.

After the above processing, the timing control unit 15 starts shifting operations of the reference pixel shift register group 2, reproduction pixel shift register 13, and mask pattern shift register 14.

The ROM 3 determines the state of the reference pixel 4 output from the reference pixel shift register group 2 from a table, determines whether this state matches the state given by the state control signal 5 for each bit of the reproduced pixel, and The result is output as the old t/Miss signal 7.

If the states match, it becomes a Hit, and if they do not match, it becomes a Mass. Further, the ROM 3 outputs an interpolated pixel 8 based on the state of the reference pixel 4. That is, the state of the reference pixel 4 is '0.
White is output when it is IJ, and black is output when it is "2, 3, 4". −
An example is shown in FIG. This interpolation pixel 8 and decoding pixel 8
The decoded pixels 12 from the decoded pixel generator 10 are input to the multiplexer 11 . The multiplexer 11 decodes the pixel 12 when the Hit/Miss signal 7 is Hit.
When the result is Miss, the interpolation pixel 8 is selected and outputted to the reproduction pixel shift register 13. In the end, in the reproduced pixel shift register 13, decoded pixels are taken into the bits where the state of the reference pixel 4 matches the state given by the state control signal 5, and interpolated pixels are taken into the bits where the state does not match. The decoding pixel generation unit 10 detects that the Hit/Miss signal 7 is Hit.
The decoded pixels 12 are output to the multiplexer 11 only when there are no decoded pixels to be output (if there are no decoded pixels, the entire process is temporarily stopped, new encoded data is read out, signal pixels are generated, and the process is started again. Let it start.

When one word of reproduced pixels is generated in the reproduced pixel shift register 13 by continuing the above processing, the writing of this into the image memory is controlled by the mask pattern shift register 14.

That is, each bit of the mask pattern shift register 14 corresponds to each bit of the reproduced pixel shift register 13, and when writing the contents of the reproduced pixel shift register 13' to the image memory 1, "1" is written in the mask pattern shift register 14. Image memory 1 only for bits with
By activating the write enable signal of the memory chip, only the bits set to "1" in the mask pattern shift register 14 can be written into the image memory 1. The mask pattern 9 of even the ROM 3 is loaded into the mask pattern shift register 14 . The mask pattern 9 is controlled by the three modes given by the interpolation control signal 6 as follows.

(1) Decoding processing only mode In this case, only the bits where the state of the reference pixel 4 matches the state given by the state control signal 5 (only the bits where the decoding pixel exists) are transferred to the image memory. It will be written to 1. Therefore, the mask pattern 9 becomes 1 when the old t/Miss signal 7 is old t, and becomes 0 when it is Miss.

(2) Sequential interpolation only mode In this case, all pixels are sequentially interpolated, so all bits of the reproduced pixel shift register 13 are written to the image memory 1. Therefore, mask pattern 9 is always 1.

(3) Decoding processing + sequential interpolation mode In this case, among the contents of the reproduced pixel shift register 13,
Bits where the state of the reference pixel 4 matches the state given by the state control signal 5 are assigned decoded pixels, and bits where the state does not match are assigned interpolated pixels. Therefore shift register 1
The mask pattern 9 is always "1" because all the contents of "3" are written into the image memory 1.

In the present case (decoding processing on the second layer and sequential interpolation on the third to sixth layers), the above (3) applies, so the contents of the reproduced pixel shift register 13 are not masked and all bit images are Written to memory 1. As a result, one word of interpolated decoded data is reproduced in the image memory 1. After that, the above process is repeated and when one screen has been processed, the second layer decoding process and the third layer ~
This means that the sequential interpolation of the sixth layer is performed at the same time.

The decoding process of the second layer and the sequential interpolation of the third to sixth layers have been explained above, but by the same method, the decoding process of the second layer (2≦to≦30) and the reference It is possible to simultaneously perform sequential interpolation with equal pixels. For example, the decoding process of the 28th layer can be performed simultaneously with the sequential interpolation of the 29th layer to the 61st layer.

Effects of the Invention As described above, according to the present invention, interpolated decoded data can be obtained by accessing the reference pixel once for decoding processing and interpolation processing in which reference pixels are common. .

For example, in the hierarchical structure shown in Fig. 4, the processing time for decoding only the second layer and the processing time for decoding the second layer and
The processing time for sequential interpolation from the 3rd layer to the 6th layer becomes equal, and in this case, the processing time required for the sequential interpolation from the 3rd layer to the 6th layer becomes apparently zero, making it possible to speed up the interpolation process. becomes.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing a decoding device in an embodiment of the present invention, FIG. 2 is a diagram showing the concept of coding order in the sequential reproduction coding method, and FIG. 3 is a diagram showing the state of reference pixels and interpolation pixels. FIG. 4, a diagram showing the relationship, is a diagram showing an example of a hierarchical structure in the sequential reproduction encoding method. 1... Image memory, 2... Reference pixel shift register group, 3... ROM, 5... State control signal,
6...Interpolation control signal, 10...Decoded pixel generation unit, 11...Multiplexer, 13...Reproduction pixel shift register, 14...Mask pattern shift register, 15... ...Timing control section. Name of agent: Patent attorney Toshio Nakao and 1 other person 2nd cause

Claims (1)

[Claims] Among the pixels sampled from the image, only the pixels whose known reference pixels correspond to a specific pattern are extracted from the pixels to be encoded and used as target pixels for encoding/decoding. A process of allocating a predetermined value to a pixel that does not correspond to a specific pattern of reference pixels according to the state of the reference pixel and performing interpolation to detect and write a pixel position corresponding to the specific pattern of the reference pixel; A decoding device characterized in that it simultaneously performs a process of allocating and interpolating a predetermined value according to the state of the decoder.