JPS63151135A - Privacy communication system - Google Patents

Abstract

PURPOSE:To evade decoding of an erroneous signal by separating the operation result of a word train and a discrimination code superposed in the transmission side from each other and establishing the synchronism of a received and demodulated signal train by a generated syndrome. CONSTITUTION:An error correction encoder in the transmission side is provided with a means (discrimination code superposer 15) which superposes a specific code on redundant bits generated at the time of error correction encoding of at least one digital input signal train. An error correction decoder in the reception side is provided with a means (discrimination code separator 28) which separates a code determined by the code superposed by the error correction encoder at the time of generating the syndrome by the operation of the word train of the signal train encoded by the error correction encoder. The syndrome is detected by the separating means 28, and the synchronism is established by the detected syndrome. That is, a specific code signal train of the error correction encoder in the transmission side is arbitrarily set, and the word synchronism is established to decode the signal train only when it coincides with the code signal train of the error correction decoder in the reception side.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a confidential communication system in digital wireless transmission.

[Prior art and problems to be solved by the invention] Conventionally, in digital wireless transmission systems.

When the electric field decreases due to fading, etc., carrier waves from other stations are received due to overreach interference, and erroneous signals are demodulated.

Therefore, when designing a system line, sufficient consideration must be given to the frequency arrangement of carrier waves, etc., so as to minimize the influence of overreach interference even if the received electric field decreases.

The present invention aims to provide a confidential communication system that can prevent demodulation of erroneous signals by adding a simple configuration.

[Means for solving problems]

The confidential communication system according to the present invention includes means for superimposing a certain code on redundant bits generated when error correction encoding is performed on at least one column of distal input signals in an error correction encoder on the transmitting side.

The error correction decoder on the receiving side has a code determined by the code superimposed in the error correction encoder when generating a syndrome by calculating the word string of the signal string encoded by the error correction encoder. The present invention is characterized in that the present invention is characterized in that it includes means for separating 1 the codes that are detected, the separating means detects a syndrome, and synchronization is established based on the detected syndrome.

〔Example〕

Next, one embodiment of the present invention will be described with reference to one drawing.

FIG. 1 shows an example of the configuration of an error correction encoder provided on the transmitting side. In this figure, an input signal 101 is composed of three columns of data signals, and is represented as an input signal column as shown in FIG. 2(a). This input signal 101 is applied to the speed converter 11.

Here, a timing generator is received from the timing generator 12, and 3 bits are generated for each 3 columns of data 81 bits.
By adding bits, an output signal 104 is generated as shown in FIG. 2(b). Then, f'L"L" (low level)/Grus is inserted into each of these increased 3 bits. The output signal 104 of the speed converter 11 is input to the redundant bit adder 14 and the redundant bit calculator 13. In the redundant bit calculator 13, the signal of the input data string (81 bits x 3 columns) is divided, and as the remainder signal, the redundant code string (3 bits x 3 columns) is divided, as shown in FIG. ) signal 105 is output.

The signal 105 of the redundant code string (3 bits x 3 columns) is R
A specific code string (3 bits x 3 columns) as shown in FIG. 2(d) is superimposed by the separate code superimposing device 15, resulting in a signal 107 as shown in FIG. 2(e). In the redundant bit adder 14, the output signal 107 of the identification code superimposer 15 is added to the output signal 104 of the speed converter 11, resulting in an output signal 106 as shown in FIG. 2(f).
is output as The output signal 106 of the error correction encoder obtained in this way is sent to a wireless transmission path in, for example, a PCM multilevel modulation format via a modulation device and a transmission device.

FIG. 3 shows the configuration of an error correction decoder provided on the receiving side. In this figure, an input signal 201 obtained by demodulating a received signal is sent to a delay circuit 21 and a redundant bit calculator 2.
2 is input. In the redundant bit calculator 22, the data string (81 bits
column) and the remainder is as shown in Figure 4(c).
It is obtained as a redundant signal (3 bits x 3 columns). Signal string output from redundant bit arithmetic unit (3bit
3), a specific code string is added by the identification code superimposer of the error correction encoder. Therefore, the output signal string 202 of the redundant bit calculator 22 includes a code string that has a one-to-one relationship with a specific code string.

Therefore, in the identification code separator 28, as shown in FIG.
By separating the code string that has a one-to-one relationship with the specific code string superimposed on the transmitting side, the redundant signal generated in the redundant bit calculator 13 of the error correction encoder on the transmitting side The same redundant bit signal as 3 bits x 3 columns) is obtained. Therefore, if the same data as the input data of the error correction encoder is input to this error correction decoder, that is, if one code error occurs in the transmission path, and "z l, -1" In Figure 4(b)
As shown in FIG. 2, the same result as the remainder obtained by the operation of the error correction encoder is obtained as a separated signal sequence in the identification code separator 28. The word synchronizer 23 determines whether the redundant bits (3 bits x 3 columns) are the same result and outputs a hunting signal 208 to establish synchronization of the timing generator 27.

Here, if the code signal string (3 bat x 3 strings) of the identification code superimposer in the error correction encoder on the transmitting side is the same as the code signal string of the identification code separator 28 in the error correction decoder on the receiving side, , the redundant bits computed are never determined to be the same result, and word synchronization is not established.

The word synchronizer 23 has a synchronization protection function and outputs an error signal 203 when an error occurs in the transmission line. The error correction signal detector 24 converts the error/IP signal 203 into a correction signal 204, and the error corrector 25 performs correction. Since redundant bits (3 bits x 3 columns) are added to the error-corrected signal 206, the data string is only decrypted.

Note that in the above embodiment, there are three data columns.

Although the case where the number of redundant pits is 3 bits and the code signal string is 3 pits has been described, the present invention is not limited to this, and the number of redundant pits is 1 column.

It can also be applied to data columns such as 6 columns.

Furthermore, it goes without saying that the redundant bits can be applied to multiple ranges, and the code signal string can also be applied to multiple ranges depending on the redundant pits.

〔Effect of the invention〕

As is clear from the above explanation, according to the present invention, by arbitrarily setting the specific code signal sequence of the error correction encoder on the transmitting side, only when the code signal sequences of the error correction decoder on the receiving side match , word synchronization is established and the signal sequence is decoded.

This makes it possible to avoid erroneous signal decoding due to overreach interference in a digital wireless transmission system, which has a great effect on system design.

Beneath @a

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a transmitting side error correction encoder as an embodiment according to the present invention, FIG. 2 is a time chart diagram for explaining signals in the error correction encoder of FIG. 1, and FIG. The figure is a block diagram showing an example of the configuration of a receiving side error correction decoder, and FIG. 4 is a time chart diagram for explaining the relationship between signals and syndromes in the error correction decoder of FIG. 3. FIG. In the figure, 11 and 26 are speed converters, 12°27
is a timing generator, 13.22 is a redundant bit operator,
14 is a redundant bit adder, 15 is an identification code superimposer, 2
1 is a delay circuit, 23 is a word synchronizer, 24 is an error correction signal detector, 25 is an error corrector, and #28 is an identification code separator.

Claims (1)

[Claims] 1. In a digital wireless transmission system, the transmitting side is equipped with means for superimposing a specific identification code on redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on the redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on the redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on the redundant bits generated by an error correction encoder, and the receiving side is equipped with a means for superimposing a certain identification code on redundant bits generated by an error correction encoder. When the correction decoder calculates the word string of the received signal and detects word synchronization from the syndrome, the separation is performed by providing a means for separating the calculated result of the word string from the identification code superimposed on the transmitting side. A confidential communication system characterized by establishing synchronization of received and demodulated signal sequences by means of syndromes generated in the means.