JPS63147745U - - Google Patents

Info

Publication number
JPS63147745U
JPS63147745U JP3911787U JP3911787U JPS63147745U JP S63147745 U JPS63147745 U JP S63147745U JP 3911787 U JP3911787 U JP 3911787U JP 3911787 U JP3911787 U JP 3911787U JP S63147745 U JPS63147745 U JP S63147745U
Authority
JP
Japan
Prior art keywords
level
determination level
power supply
supply voltage
microcomputer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP3911787U
Other languages
Japanese (ja)
Other versions
JPH0435959Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP3911787U priority Critical patent/JPH0435959Y2/ja
Publication of JPS63147745U publication Critical patent/JPS63147745U/ja
Application granted granted Critical
Publication of JPH0435959Y2 publication Critical patent/JPH0435959Y2/ja
Expired legal-status Critical Current

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  • Techniques For Improving Reliability Of Storages (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例を示す回路図、第2
図はその信号波形図、第3図は従来例を示す回路
図、第4図はその信号波形図、第5図はフローチ
ヤートである。 11……比較器、12……トランジスタ、13
……オンデイレータイマ回路、14……比較器、
15……トランジスタ、16……負帰還抵抗、2
0……マイクロコンピユータ、30……バツクア
ツプRAM。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
3 is a circuit diagram showing a conventional example, FIG. 4 is a signal waveform diagram, and FIG. 5 is a flowchart. 11...Comparator, 12...Transistor, 13
...On-delay timer circuit, 14...Comparator,
15...Transistor, 16...Negative feedback resistor, 2
0...Microcomputer, 30...Backup RAM.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 電源電圧を第1の判定レベルと比較して比較結
果に応じたレベルの信号を出力する第1の比較回
路を備えて、電源電圧が第1の判定レベル以下に
なつたときに対応する第1の比較回路の出力信号
の変化を割込み信号としてマイクロコンピユータ
によりバツクアツプRAMへの読み書きを禁止す
ると共に、電源電圧の立上がりのみを遅延させる
オンデイレータイマ回路と、このオンデイレータ
イマ回路を介して入力される電源電圧を第2の判
定レベルと比較して比較結果に応じたレベルの信
号を出力する第2の比較回路とを備えて、電源電
圧が第2の判定レベル以下になつたときに対応す
る第2の比較回路の出力信号の変化をリセツト信
号としてマイクロコンピユータを停止させるよう
にした車載マイクロコンピユータのメモリ保護装
置において、前記第2の比較回路の出力に応じて
、前記第2の判定レベルを変化させて、電源電圧
が第2の判定レベル以下となつたときに第2の判
定レベルを第1の判定レベルより高くし、電源電
圧が第2の判定レベルを越えたときに第2の判定
レベルを第1の判定レベルより低くする第2の判
定レベルの切換手段を設けたことを特徴とする車
載マイクロコンピユータのメモリ保護装置。
a first comparison circuit that compares the power supply voltage with a first determination level and outputs a signal at a level according to the comparison result; A change in the output signal of the comparison circuit is used as an interrupt signal to prohibit the microcomputer from reading or writing to the backup RAM, and an on-delay timer circuit that delays only the rise of the power supply voltage is input via the on-delay timer circuit. and a second comparison circuit that compares the power supply voltage to a second determination level and outputs a signal at a level according to the comparison result, and responds when the power supply voltage falls below the second determination level. In the memory protection device for an on-vehicle microcomputer, the microcomputer is stopped by using a change in the output signal of a second comparator circuit as a reset signal. When the power supply voltage is below the second determination level, the second determination level is set higher than the first determination level, and when the power supply voltage exceeds the second determination level, the second determination level is set higher than the first determination level. 1. A memory protection device for a vehicle-mounted microcomputer, characterized in that a second judgment level switching means is provided for setting the judgment level lower than the first judgment level.
JP3911787U 1987-03-19 1987-03-19 Expired JPH0435959Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3911787U JPH0435959Y2 (en) 1987-03-19 1987-03-19

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3911787U JPH0435959Y2 (en) 1987-03-19 1987-03-19

Publications (2)

Publication Number Publication Date
JPS63147745U true JPS63147745U (en) 1988-09-29
JPH0435959Y2 JPH0435959Y2 (en) 1992-08-25

Family

ID=30851994

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3911787U Expired JPH0435959Y2 (en) 1987-03-19 1987-03-19

Country Status (1)

Country Link
JP (1) JPH0435959Y2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014048070A (en) * 2012-08-29 2014-03-17 Denso Corp Electronic control device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014048070A (en) * 2012-08-29 2014-03-17 Denso Corp Electronic control device

Also Published As

Publication number Publication date
JPH0435959Y2 (en) 1992-08-25

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