JPS63146452A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To shorten the plating time by forming a quasi-electrode layer on a diffusion barrier plating layer, and forming a bump electrode plating layer using this quasi-electrode layer as an electrode for plating, thereby changing the bump electrode plating layer to a thin film. CONSTITUTION:Formed on a semiconductor element 21 are a field oxide film 22, an electrode pad 23, a passivation film 24, an electric current conducting layer 25, a closely adhering metallic layer 26 and a diffusion barrier plating layer 27, a resist film 28 for plating, and a diffusion barrier plating layer 29, on which a quasi-electrode layer 30 is formed by means of vapor deposition or the like, and with this quasi-electrode layer 30 as an electrode for plating the electric current conducting layer 25 is energized to form a lead-plated layer 31 and a tin-plated layer 32. Then, after removing the resist film 28 and the electric current conducting layer 25, this structure is heated to about 350 deg.C under a nitrogen N2 gas atmosphere to cause the quasi-electrode layer 30, lead- plated layer 31 and tin-plated layer 32 to be melted into an alloy, thereby forming a semispheric bump electrode 33.

Description

Detailed Description of the Invention (Industrial Application Field) The present invention relates to a method for manufacturing a semiconductor device having bump electrodes;
In particular, it relates to a method of forming bump electrodes.

(Prior art) Conventionally, as a technology in this field, for example, Japanese Patent Application Laid-open No. 6
There was one described in Publication No. 0-224248. The configuration will be explained below using figures.

FIGS. 2(1) to 2(3) are manufacturing process diagrams showing a conventional method for manufacturing a semiconductor device. This semiconductor device is manufactured through the following steps.

■ On the field oxide film 2 formed on the semiconductor element 1 such as the process integrated circuit (IC) chip shown in FIG. After selectively forming a passivation film (inactivation film) 4 on the film, aluminum A, l! A current conducting oil layer 5 is deposited. Next, an adhesion metal layer 6 of titanium Ti is selectively formed on the current conducting layer 5.
After forming a diffusion barrier plating layer 7 of PT and platinum PT, and covering the area other than the area where the bump electrode is to be formed with a resist film 8 for plating, a current is passed through the current conductive layer 5, and copper Cu or nickel Ni is formed by electroplating. A diffusion barrier plating layer 9 is formed. After that, a fishing layer 10 and a tin plating layer 11
form.

(2) Process in FIG. 2(2) After removing the resist IFJ8 with a solvent such as acetone, a part of the current conducting layer 5 is etched using a normal 8β etching solution.

(2) Process of FIG. 2(3) Heat treatment is performed to melt the lead plating layer 10 and the tin plating layer 11, and alloying lead PB and tin Sn to form a bump electrode 12 made of hemispherical solder.

The bump electrode 12 produced in this way is heat-sealed to a conductive member, for example a lead frame 13 of solder-plated or tin-plated copper Cu foil on a film carrier.

In this type of manufacturing method, since a platinum diffusion barrier plating layer 7 is provided, a copper or nickel diffusion barrier plating layer 9 is provided.
No activator treatment of platinum is required to form the platinum. Furthermore, before forming the bump electrode 12, the lead plating layer 10
Since the outside of the lead plating layer 10 is covered with the tin plating layer 11, the upper surface of the lead plating layer 10 is not attacked by the etching solution when a part of the current conducting layer 5 is etched. This eliminates the need for activator treatment, simplifies the manufacturing process, and provides a highly reliable barrier effect.
Not only that, but hemispherical bumps can also be formed by high-stepping.

(Problems to be Solved by the Invention) However, in the above manufacturing method, the plating process for forming the lead-plated layer 10 and the tin-plated layer 11 takes a long time, and the production efficiency is not improved. was there.

That is, in order to form the bump electrode 12 having a predetermined height, a thick lead plating layer 10 and a tin plating layer 11 are formed by electroplating. For example, the bump electrode 12 having a height of about 40 to 60 μm is formed. In order to do this, a plating time of about 50 to 75 minutes is required. This plating process, which requires a long time, not only causes poor working efficiency, but also poses a major hindrance to the rationalization of the overall manufacturing process of semiconductor devices.

The present invention provides a method for manufacturing a semiconductor device that solves the problem of the prior art, which is that it is difficult to rationalize the manufacturing process of semiconductor devices due to the long plating process. be.

(Means for Solving the Problems) In order to solve the above-mentioned problems, the present invention covers a portion of a semiconductor element other than a portion where a bump electrode is to be formed with an insulating film, and covers the semiconductor element including this insulating film. forming a current conducting layer;
Next, a metal layer for adhesion and a diffusion barrier is formed at the location where the bump electrode is to be formed, and a diffusion barrier plating layer is formed on the metal layer by energizing the current conducting layer. In a method of manufacturing a semiconductor device in which a bump electrode of a predetermined shape is formed, the bump electrode is formed as follows.

A pseudo electrode is formed on the diffusion barrier plating layer, this pseudo electrode layer is used as a plating electrode, and a bump electrode plating layer is formed on the pseudo electrode layer. Together with the pseudo electrode layer, it is melted by heat treatment to form a bump electrode of a predetermined shape.

(Function) According to the present invention, since the method for manufacturing a semiconductor device is configured as described above, the pseudo electrode layer formed on the diffusion barrier plating layer serves as a plating electrode, and bump electrode plating is performed on the pseudo electrode layer. form a layer. Roughly speaking, when the bump electrode plating layer is melted by heat treatment, the pseudo electrode layer functions to be melted together and included in the bump electrode and disappear. Therefore,
By widening the formation area of the pseudo electrode layer that disappears when forming the bump electrode, and quickly forming a bump electrode plating layer with a large area and a thin film thickness, a predetermined height height can be achieved. movement to form a bump electrode. Therefore, the above problem can be eliminated.

(Embodiment) FIGS. 1 (1) to (3) are manufacturing process diagrams of a semiconductor device showing a first embodiment of the present invention. This semiconductor device is manufactured through the following steps.

(2) Process of FIG. 1(1) On a field oxide film 22 formed on a semiconductor element 21 such as an integrated circuit (IC) chip, electrode pads 23 such as ρ are formed at locations where bump electrodes are to be formed. Zarani, CVD (Chemical Vapor Depos)
After the passivation film 24 is grown by a method such as ion), a bump formation area is formed on the electrode pad 23 by a photolithography technique or the like.

Next, a current conductive layer 25 made of AN or the like is formed on the entire surface of the semiconductor element 21 by a vapor deposition method or the like, and an adhesion metal layer 26 such as titanium and a diffusion barrier plating layer 27 such as platinum are formed on the current conductive layer 25. form. After that, these adhesive metal layers 26
Then, the portions of the diffusion barrier plating layer 27 other than the portions where the bump electrodes are to be formed are removed by photolithography or the like. Here, the adhesion metal layer 26 has a function of adhesion to the field oxide film 22 and the electrode pad 23.

Roughly, the adhesive metal layer 2 is formed using photolithography technology etc.
6 and the current conducting layer 25 near the outer edge of the diffusion barrier plating layer 27 is covered with a resist film 28 for plating, and then current is applied to the current conducting layer 25 to coat the diffusion barrier plating layer 27 by electroplating. A diffusion barrier plating layer 29 of copper, nickel, etc. is formed. This diffusion barrier plating layer 29 is formed to have a thickness of, for example, about 5 to 10 μm.

Subsequently, a pseudo electrode layer 30 according to the present invention is formed on the diffusion barrier plating layer 29 and the resist film 28 by a method such as a vapor deposition method or a method of increasing the thickness by applying a paste after vapor deposition. Thereafter, unnecessary portions are removed by photolithography or the like to form a pseudo electrode layer 30 having a predetermined area that covers the diffusion barrier plating layer 29 and its surroundings. Pseudo electrode layer 3
0 is made of tin, gold, or the like, and the area where it is formed on the diffusion barrier plating layer 29 and the resist film 28 is set to be sufficiently larger than the area of the diffusion barrier plating layer 29.

Current is applied to the current conducting layer 25 using the pseudo electrode layer 30 as an electrode for electroplating, and a lead plating layer 31 and a tin plating layer 32 are sequentially formed on the pseudo electrode layer 30 as bump electrode plating layers. At this time, since the area of the pseudo electrode layer 30 is sufficiently large, the formation area of the lead plating layer 31 and the tin plating layer 32 formed thereon is smaller than that of the lead plating layer 10 and the tin plating layer 32 in the conventional manufacturing method shown in FIG. The area is larger than the formation area of the plating layer 11. Therefore, when forming a bump electrode having the same volume as the conventional bump electrode 12, the thicknesses of the lead plating layer 31 and the tin plating layer 32 may be thin in approximately inverse proportion to the width of the area.

(2) After removing the resist film 28 for process plating shown in FIG.
It is removed by etching with an etching solution consisting of a mixture of glacial acetic acid and water. At this time, the lead plating layer 31 is replaced by the pseudo electrode layer 30 made of tin, gold, etc. that is not corroded by the etching solution.
Since it is covered with the tin plating layer 32, it will not be attacked.

(3) The process of FIG. 1 (3) Under a nitrogen N2 gas atmosphere, the pseudo electrode layer 30, the lead plating layer 31, and the tin plating layer 32 are heated at a temperature of, for example, 340 to
Heat to about 350℃. Then, the lead and tin of the lead plating layer 31 and the tin plating layer 32 are melted and alloyed to become solder, and their surface tension causes the diffusion barrier plating layer 29 to melt.
A hemispherical bump electrode 33 having a height of, for example, about 25 to 100 μm is formed by gathering on the top.

At this time, the pseudo electrode layer 30 is also melted or diffused at the same time,
It is fused to the lead plating layer 31 and the tin plating layer 32 and disappears. .

In this way, the bump electrode 33 is formed, but the film thicknesses of the lead plating layer 31 and the tin plating layer 32 can be made thinner by making the area of the pseudo electrode layer 30 sufficiently larger than the diffusion barrier plating layer 29. can. That is, for example, the pseudo electrode layer 3
If the area of 0 is made approximately 2 to 3 times the area formed by the conventional lead plating layer 10 and tin plating layer 11 in FIG.
Pseudo-type pole layer 30, lead plating layer 31 and tin plating layer 32
The total thickness of the conventional lead plating layer 10 and tin plating layer 1 is
The bump electrode 33 can be formed with a thickness of about 172 to 1/3 of the total thickness of the bump electrode 33 and the same height as the conventional one. Therefore, the plating time to form these is 172 to 17
It can be shortened to about 3. Further, according to the method of this embodiment, it is possible to easily form the bump electrode 33 in a higher height than in the conventional method without prolonging the conventional plating time.

This embodiment has the following advantages.

(a) The plating time for forming the lead plating layer 31 and the tin plating layer 32 can be significantly shortened.

(b) Bump electrode 33 without extending plating time.
Since the height of the electrode can be easily increased, bump electrodes can be used for various purposes without disturbing the manufacturing process.

(c) Since the pseudo electrode layer 30 is formed of tin, gold, etc. that is not corroded by the etching solution, the lead plating layer 31 is not immersed in the etching solution when the outer edge of the current conducting layer 25 is removed with the etching solution. This improves the reliability of the bump electrode 33.

FIG. 3 is a sectional view showing a semiconductor device during the manufacturing process in a method of manufacturing a semiconductor device according to a second embodiment of the present invention.

The difference between this embodiment and the first embodiment is as shown in Fig. 1 (1).
In this manufacturing method, only the tin plating layer 41 is formed instead of the lead plating layer 31 and the tin plating layer 32 that are formed on the pseudo electrode layer 30 in the process. In this case as well, the steps after forming the tin plating layer 41 are performed in almost the same manner as in the first embodiment to form the bump electrode.

With this manufacturing method, almost the same functions and effects as in the first embodiment can be obtained, and since the tin plating layer 41 on the pseudo electrode layer 30 has a single composition, the plating process is simplified. It has the advantage of When a bump electrode is formed by this manufacturing method, if a lead to be connected to the bump electrode has an inner lead plated with lead, the bump electrode will be alloyed and become solder at the time of connection.

In this case, the voice car (
There is no risk of cat whiskers occurring.

Therefore, connection failures caused by the voice car will not occur.

It should be noted that the present invention is not limited to the illustrated embodiment, and may be modified in various ways, including the following modifications.

(a) The planar shape of the pseudo electrode layer 30 in the first and second embodiments can be modified in various ways, as shown in the pseudo electrode layer shape diagram in FIG. For example, when the diffusion barrier plating layer 29 is formed in a rectangular shape to cover the rectangular diffusion barrier plating layer 29 as shown by A in the figure, or when the bump electrodes of a multi-functional and multi-terminal semiconductor device are provided close to each other, etc. 8 in the figure. C
It is also possible to form the pseudo electrode layer 30 in a shape that extends only from both sides or one side of the diffusion barrier plating bath 29 as shown in FIG. Moreover, the diffusion barrier plating layer 29 and the pseudo electric tf! The layer 30 is not limited to a quadrilateral shape, but may be formed, for example, in a circular shape.

(b) The material and shape of each layer on the semiconductor element 21 in each embodiment, the shape of the bump electrode 33, and even the shape, structure, material, etc. of the conductive member may be modified to those other than those shown in the drawings. I'll go.

(C) Although the bump electrode plating layer has a single composition of the lead plating layer 31 and the tin plating layer 32 or the tin plating layer 41, it is not limited to this, and may have a single composition of a solder plating layer, for example. can.

(d) Although the u-like electrode layer 30 is made of tin or gold, it is not limited thereto, and may be made of copper, lead, or any other metal as long as it melts and diffuses with the metal forming the semicircular or bump electrode.

(Effects of the Invention) As described in detail above, according to the present invention, a pseudo electrode layer is formed on a diffusion barrier plating layer, and a bump electrode plating layer is formed on this pseudo electrode layer, so that a large area A bump electrode with a predetermined height can be formed by forming a thin bump electrode plating layer on a pseudo electrode layer having a thin bump electrode layer. Therefore, by forming the bump electrode plating layer into a thin film, it is possible to significantly shorten the plating time.
It can be expected that the work efficiency of the plating process will not only be improved, but also that the overall manufacturing process of semiconductor devices can be rationalized.

[Brief explanation of the drawing]

Figures 1 (1) to (3) are manufacturing process diagrams showing the first embodiment of the present invention, Figures 2 (1) to (3) are conventional manufacturing process diagrams,
FIG. 3 is a sectional view of a semiconductor device in the manufacturing process of a second embodiment of the present invention, and FIG. 4 is a shape diagram of a pseudo electrode layer in the first and second embodiments. 21... Semiconductor element, 22... Field oxide film, 23... Electrode pad, 24...
... Passivation film, 25 ... Current conduction layer, 26 ... Adhesion metal layer, 27.29 ...
...Diffusion barrier plating layer, 28...Resist film, 30...Pseudo electrode layer, 31...Lead plating layer, 32.41...Tin Plating layer, 33...
...bump electrode. Applicant's agent: Takashi Kakimoto Manufacturing process diagram of the present invention Figure 1

Claims (1)

[Claims] Covering a portion of a semiconductor element other than a portion where a bump electrode is to be formed with an insulating film, forming a current conducting layer on the semiconductor element including the insulating film, and then adhering and diffusing the portion where a bump electrode is to be formed. After forming a barrier metal layer and applying current to the current conducting layer to form a diffusion barrier plating layer on the metal layer,
In the method for manufacturing a semiconductor device in which a bump electrode of a predetermined shape is formed on the diffusion barrier plating layer, the bump electrode is formed by forming a pseudo electrode layer on the diffusion barrier plating layer, and using this pseudo electrode layer as a plating electrode. A method for manufacturing a semiconductor device, comprising: forming a bump electrode plating layer on the pseudo electrode layer, and then melting the bump electrode plating layer together with the pseudo electrode layer by heat treatment.