JPS63141331A - Lead frame for tape carrier semiconductor device - Google Patents
Lead frame for tape carrier semiconductor deviceInfo
- Publication number
- JPS63141331A JPS63141331A JP61289345A JP28934586A JPS63141331A JP S63141331 A JPS63141331 A JP S63141331A JP 61289345 A JP61289345 A JP 61289345A JP 28934586 A JP28934586 A JP 28934586A JP S63141331 A JPS63141331 A JP S63141331A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- patterns
- tape
- static electricity
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 29
- 239000004020 conductor Substances 0.000 claims description 11
- 238000005259 measurement Methods 0.000 claims description 4
- 230000005611 electricity Effects 0.000 abstract description 16
- 230000003068 static effect Effects 0.000 abstract description 15
- 238000004804 winding Methods 0.000 abstract description 7
- 238000000034 method Methods 0.000 abstract description 4
- 238000007599 discharging Methods 0.000 abstract 2
- 230000002093 peripheral effect Effects 0.000 abstract 1
- 239000011261 inert gas Substances 0.000 description 4
- 150000002500 ions Chemical class 0.000 description 4
- XKRFYHLGVUSROY-UHFFFAOYSA-N Argon Chemical compound [Ar] XKRFYHLGVUSROY-UHFFFAOYSA-N 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000006386 neutralization reaction Methods 0.000 description 2
- 125000006850 spacer group Chemical group 0.000 description 2
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 1
- 229910052786 argon Inorganic materials 0.000 description 1
- 238000007664 blowing Methods 0.000 description 1
- 235000014121 butter Nutrition 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000004886 process control Methods 0.000 description 1
- 238000005507 spraying Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Abstract
Description
【発明の詳細な説明】
（産業上の利用分野）
本発明にテープキャリア半導体装置用リードフレームに
関し、特にフレーム上に形成されるリードパターンの構
造に関する。DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a lead frame for a tape carrier semiconductor device, and particularly to the structure of a lead pattern formed on the frame.
（従来の技術）
テープキャリア半導体装置に準備された可撓性リードフ
レーム上に半導体素子を搭載することによって製造され
る。従来、この可撓性リードフレームは上面に半導体素
子載置用の開口部とその周辺に半導体素子電極との接続
用リードパターンおよび電気特性測定用パッドパターン
ｔそれぞれ配列形成した長尺状の可撓性絶縁テープから
成る。(Prior Art) A tape carrier semiconductor device is manufactured by mounting a semiconductor element on a flexible lead frame prepared on the semiconductor device. Conventionally, this flexible lead frame has a long flexible lead frame with an opening for mounting a semiconductor element on the upper surface and an array of lead patterns for connection with semiconductor element electrodes and pad patterns for measuring electrical characteristics around the opening. consisting of electrically insulating tape.
通常、この可撓性リードフレームｈ約１７ｒｒｌ単位と
して一つのリールに巻ヵ為れるが半導体素子の搭載およ
びこの電気的特性の良否を判断するｆＡ１１足作業にこ
の可撓性リードフレームを他のリールに巻取らせながら
行なわれる。一般にこれらの作業に全て目動化され一つ
の系としてシステム化されるが更にリール回転を高速化
して作業工率の同上全はかるのが通常でろる。例えば１
巻き１７ｍの可撓性リードフレームｆ１３０秒ないし１
分間の間に他のリールに巻取られる。リール間の巻取速
度がこのように高速化されるとスペーサとの摩擦によっ
て静電気が発生し可撓性リードフレームの表面、とり分
は電気特性測定用パッド上には２〜３ＫＶにも達する静
電気が滞留するよりになる。テープキャリア上では半導
体素子の電極と電気特性測定用パッドとに当然電気接続
されているので何等かの対策が講ぜられない限り発生し
た高圧静電気により搭載した半導体素子が破壊されるこ
とは必定である。Normally, this flexible lead frame is wound onto one reel in units of approximately 17rrl, but this flexible lead frame is wound onto another reel for mounting semiconductor elements and determining the quality of the electrical characteristics. This is done while winding it up. Generally, all of these operations are automated and systemized as one system, but it is also normal to increase the speed of the reel rotation to increase the operating efficiency. For example 1
Flexible lead frame with winding 17m f130s to 1
It is wound onto other reels within minutes. When the winding speed between the reels is increased in this way, static electricity is generated due to friction with the spacer, and static electricity reaches 2 to 3 KV on the surface of the flexible lead frame, especially on the pad for measuring electrical characteristics. becomes more stagnant than stagnant. Since the electrodes of the semiconductor elements and the pads for measuring electrical characteristics are naturally electrically connected on the tape carrier, it is inevitable that the mounted semiconductor elements will be destroyed by the generated high-voltage static electricity unless some kind of countermeasure is taken. .
従来、この静電気対策には通称“イオナイズド・ブロー
”と呼ばれる不活性ガス・イオンによる中和方式が用い
られている。高速で巻取られるこの可撓性リードフレー
ムの表面には窒素（Ｎ２）ま九ニアルゴン（Ａｒ）等の
不活性ガス・イオンが例えば２１７分程度の割合で吹付
けられる。このよりにイオン化され友ガス・イオンが吹
付けられると可撓性リードフレーム上の静電気に中和さ
れ電気特性測定用パッドの電位を殆んどＯＶに抑え込む
ことができる。Conventionally, as a countermeasure against static electricity, a neutralization method using inert gas ions, commonly called "ionized blow", has been used. Inert gas ions such as nitrogen (N2) or argon (Ar) are blown onto the surface of this flexible lead frame, which is wound up at high speed, at a rate of, for example, about 217 minutes. When ionized gas ions are sprayed, the static electricity on the flexible lead frame is neutralized and the potential of the pad for measuring electrical characteristics can be suppressed to almost OV.
（発明が解決しようとする問題点）
しかしながら、この不活性ガス・イオンによる中和方式
は不活性ガスのイオン化および吹付けにそれぞれ高価な
装［？設置する必要があるのみか巻取速度に応じそれぞ
れ適切なブロー条件を設定し且つ制御する必要を生じる
ので工程管理Ｋｌわめて複雑化する欠点を有する。(Problems to be Solved by the Invention) However, this neutralization method using inert gas and ions requires expensive equipment for ionization and spraying of the inert gas, respectively. Since it is necessary to set and control appropriate blowing conditions depending on the winding speed, it has the disadvantage that process control becomes extremely complicated.
（発明の目的）
本発明の目的に、上記の情況に鑑み、テープキャリアの
巻取りに際して静電気を発生することなきリードパター
ン構造を備えたテープキャリア牛導体装置用リードフレ
ームを提供することである。(Object of the Invention) In view of the above-mentioned circumstances, an object of the present invention is to provide a lead frame for a tape carrier conductor device having a lead pattern structure that does not generate static electricity during winding of the tape carrier.
（発明の構成）
本発明によれは、テープキャリア牛導体装置用リードフ
レームは、上面に半導体素子載置用の開口部を有する長
尺状の可撓性絶縁テープと、前記可撓性絶縁テープ上に
前記開口部の周辺から先端部の一方全開口内に突出させ
他方全電気特性測定用パッドパターンに接続してそれぞ
れ密着形成される前記半導体素子の電極用リードパター
ン配列と、前記可撓性絶縁テープ上に密層形成される静
電気放電用パターンと、前記可撓性絶縁テープ上に前記
電気特性測定用パッドパターンとそれぞれ隣接し且つ前
記静電気放電用パターンおよび電気測定用パッドパター
ンとの間に電気接続導体片全それぞれ備えて密層形成さ
れるダミー・パッドパターン配列と全備えることを含む
。(Structure of the Invention) According to the present invention, a lead frame for a tape carrier conductor device includes a long flexible insulating tape having an opening for mounting a semiconductor element on the upper surface, and the flexible insulating tape. an array of lead patterns for electrodes of the semiconductor element protruding from the periphery of the opening into one full opening of the tip portion and connected to the other pad pattern for measuring electrical characteristics, and formed in close contact with each other; and the flexible insulating material. An electrostatic discharge pattern formed in a dense layer on the tape, and an electrostatic discharge pattern that is adjacent to the electrical characteristic measurement pad pattern on the flexible insulating tape and between the electrostatic discharge pattern and the electrical measurement pad pattern. The method includes a dummy pad pattern array formed in a dense layer with each of the connecting conductor pieces.
（問題点を解決するための手段）
すなわち、本発明によれは、テープキャリア牛導体装置
用リードフレームを形成する長尺状の可撓性絶縁テープ
上には静電気放電用パターンおよびダミー・パッドパタ
ーンがそれぞれ付加形成される。ここで、ダミー・パッ
ドパターンにそれぞれ電気特性測定用パッドパターンと
隣接する位置に配設され電気接続導体片を介し電気特性
側足側パッドパターンおよび静電気放電用バター７間全
それぞれ電気接続するように形成される。(Means for Solving the Problems) That is, according to the present invention, an electrostatic discharge pattern and a dummy pad pattern are provided on a long flexible insulating tape forming a lead frame for a tape carrier conductor device. are additionally formed. Here, each dummy pad pattern is arranged at a position adjacent to the pad pattern for measuring electrical characteristics, and electrical connection is made between the electrical characteristics side foot side pad pattern and the electrostatic discharge butter 7 through electrical connection conductor pieces. It is formed.
（作用）
通常の製造工程に従いこの可撓性絶縁テープが一つのリ
ールから他のリールに高速度で巻取られると絶縁テープ
上の電気特性測定用パッドパター／にはそれぞれ従来同
様数ＫＶの高電圧が摩擦により発生するが、これら電気
特性測定用パッドのそれぞれにダミー・パッドに接続さ
れ更に静電気放電用パターンに電気接続されているので
発生し次静電気に半導体素子に向かうことなく接地電位
に流れｔすことができる。経験によれは静電気の発生に
テープキャリアの巻取り進行方向側のパッド面が顕著で
あるので、ダミー・パッドパターンの寸法形状をそれぞ
れ電気特性測定用パッドパターンと同一に設定すると、
静電気の発生全ダミー・パッドパターンに果中嘔せ電気
特性測定用バッドパターンそれぞれの電位上昇を著しく
軽減せしめることが可能である。(Function) When this flexible insulating tape is wound up at high speed from one reel to another according to the normal manufacturing process, each pad putter for measuring electrical properties on the insulating tape has a high voltage of several KV as before. Voltage is generated due to friction, but since each of these pads for measuring electrical characteristics is connected to a dummy pad and further electrically connected to an electrostatic discharge pattern, the voltage is generated and then flows to the ground potential without being directed to the semiconductor element. t can be done. According to experience, static electricity is most likely to be generated on the pad surface on the winding direction side of the tape carrier, so if the dimensions and shape of the dummy pad pattern are set to be the same as the pad pattern for measuring electrical characteristics,
It is possible to significantly reduce the potential rise in all the dummy pad patterns that generate static electricity and in the pad patterns for measuring electrical characteristics.
以下図面を診照して本発明の詳細な説明する。The present invention will be described in detail below with reference to the drawings.
（実施例） 第１図は本発明の一実施例全示す平面図でるる。(Example) FIG. 1 is a plan view showing an entire embodiment of the present invention.
本実施例によれば本発明のテープキャリア牛導体装置用
リードフレームは、上面に半導体素子載置用の開口部２
を有する長尺状の可撓性絶縁テープ１と、開口部２の周
辺７％ら先端の一方を開口内に突出し他方を電気特性前
１定用パッドパターン４にそれぞれ接続して可撓性、＃
！！！緑テープｌ上に密着形成された半導体素子（図示
しない）の電極用リードパターン３と、スプロケット・
ホール５の配列の内縁および一つの半導体素子（図示し
ない）の搭載区画線に沿い可撓性絶縁テープ１上にぞれ
ぞれ密着形成された静電気放電用パターン６と、電気特
性測定用パッドパターン４とそれぞれ隣接配置され電気
接続導体片８および９を介し電気特性測定用パッドパタ
ーン４および静電気放電用パターン６とそれぞれ電気接
続されるダミー・パッドパターン７とを含む。According to this embodiment, the lead frame for a tape carrier conductor device of the present invention has an opening 2 on the top surface for mounting a semiconductor element.
A long flexible insulating tape 1 having a periphery 7% of the opening 2 has one of its tips protruding into the opening and the other connected to the pad pattern 4 for electrical characteristics. #
! ! ! The electrode lead pattern 3 of the semiconductor element (not shown) closely formed on the green tape l and the sprocket
An electrostatic discharge pattern 6 and a pad pattern for measuring electrical characteristics are formed in close contact with each other on the flexible insulating tape 1 along the inner edge of the array of holes 5 and the mounting division line of one semiconductor element (not shown). 4 and electrically connected to the pad pattern 4 for measuring electrical characteristics and the pattern 6 for electrostatic discharge via electrical connection conductor pieces 8 and 9, respectively.
ここで、可撓性絶縁テープ１が矢印の方向に巻取られる
とスペーサとの摩擦により電気測定用パッドパターン４
およびダミー・パッドパターン７にはそれぞれ数ＫＶの
静電気が発生するが、これらは電気接続導体片８および
９を介し接地された（図示しない）静電気放電用パター
ン６にそれぞれ接続されているので発生しｔ静電気に電
極用リードパターン３側に向つことなく瞬時に接地電位
に流し去ることができる。従って、半導体素子に損傷を
与えることなくリールを高速回転して効率良く半導体素
子の搭載作業全進行せしめることができ、この後、改め
て電気接続導体片８を点線に沿って切断することによっ
て搭載揖みの半導体素子個々の電気特性を従来通ジチェ
ックし得る。Here, when the flexible insulating tape 1 is wound in the direction of the arrow, the electrical measurement pad pattern 4 is caused by friction with the spacer.
Static electricity of several kilovolts is generated on each of the dummy pad patterns 7 and 7, but these are connected to the grounded (not shown) electrostatic discharge pattern 6 via the electrical connection conductor pieces 8 and 9, so that no static electricity is generated. tStatic electricity can be instantly discharged to the ground potential without being directed towards the electrode lead pattern 3 side. Therefore, the reel can be rotated at high speed without damaging the semiconductor element, and the semiconductor element mounting operation can be carried out efficiently.After this, the electrical connection conductor piece 8 is again cut along the dotted line to carry out the mounting operation. The electrical characteristics of each individual semiconductor element can be checked in the conventional manner.
（発明の効果）
以上詳細に説明したように、本発明に工れば、キャリア
テープ上に静電気放電用パターンお工ひダミー・パッド
パターンが設けられ半導体素子の電気特性測定用パッド
パターンに発生する静電気を常時接地電位に流し去るよ
う接続でれているので、従来の１イオナイズド・ブロー
”１式の如き複雑な装置で用いることなく半導体素子の
搭載作業ｔ″きわめて高能率の作業効率を以って進行せ
しめ得る。すなわち、テープキャリア半導体装置の品質
と１頼性の同上に顕著なる効果を有する。(Effects of the Invention) As explained in detail above, if the present invention is implemented, a dummy pad pattern is provided on the carrier tape to prevent electrostatic discharge from occurring in the pad pattern for measuring electrical characteristics of semiconductor devices. Since the connection is made so that static electricity is constantly discharged to the ground potential, it is possible to mount semiconductor devices with extremely high work efficiency without using complicated equipment such as the conventional 1 ionized blower. It can be advanced. That is, it has a remarkable effect on the quality and reliability of the tape carrier semiconductor device.
第１図に本発明の一実施例を示す平面図である。
１・・・可撓性絶縁テープ、２・・・半導体素子載置用
開口部、３・・・電極用リードパターン、４・・・電気
特性沖１定用パッドパターン、５・・・スプロケット・
ホール、６・・・静電気放電用パターン、７・・・ダミ
ー・パッドパターン、８，９・・・電気接続導体片。
ｌ ： −１°］−々１１）１貞−２ヤシ哨−−惨？：
ｆ−１″２：峯欅本ｔ↑代置調υ押
３：電本町耳す−ドノＸ：ターン
４：ｆ劉づｑｌ瓜曙Ｊｅｆｆむｚｌ・γトンＹダーン５
：スフ゛口Ｙ・ント・ホーｌし
乙：荷＠丘放値珂ノチン
７ ： ！”ミー・八゛・ンドノＶダー〉３．９：電ｌ
）乞Ｉ、＃−片FIG. 1 is a plan view showing an embodiment of the present invention. DESCRIPTION OF SYMBOLS 1... Flexible insulating tape, 2... Opening for semiconductor element mounting, 3... Lead pattern for electrode, 4... Pad pattern for electrical characteristics Oki 1, 5... Sprocket.
Hole, 6... Electrostatic discharge pattern, 7... Dummy pad pattern, 8, 9... Electrical connection conductor piece. l : -1°] -11) 1 Tei - 2 Palm Post - Misery? :
f-1″2: Mine Keyakimoto t↑Substitute key υ press 3: Denhoncho Mizu-Dono
：Sufi mouth Y・nt・hole：load @ hill release price kanochin 7： ! ``Me 8゛ Ndono V Da〉3.9: Den l
) Beg I, #-piece
Claims (1)
撓性絶縁テープと、前記可撓性絶縁テープ上に前記開口
部の周辺から先端部の一方を開口内に突出させ他方を電
気特性測定用パッドパターンに接続してそれぞれ密着形
成される前記半導体素子の電極用リードパターン配列と
、前記可撓性絶縁テープ上に密着形成される静電気放電
用パターンと、前記可撓性絶縁テープ上に前記電気特性
測定用パッドパターンとそれぞれ隣接し且つ前記静電気
放電用パターンおよび電気特性測定用パッドパターンと
の間に電気接続導体片をそれぞれ備えて密着形成される
ダミー・パッドパターン配列とを備えることを特徴とす
るテープキャリア半導体装置用リードフレーム。A long flexible insulating tape having an opening on the upper surface for mounting a semiconductor element, and one tip of the flexible insulating tape protruding from around the opening into the opening and the other end being electrically connected. an array of lead patterns for electrodes of the semiconductor element which are connected to and closely formed on the characteristic measurement pad pattern; an electrostatic discharge pattern which is closely formed on the flexible insulating tape; and a dummy pad pattern array that is adjacent to the pad pattern for measuring electrical characteristics and that is formed in close contact with the electrostatic discharge pattern and the pad pattern for measuring electrical characteristics by providing electrical connection conductor pieces respectively between the electrostatic discharge pattern and the pad pattern for measuring electrical characteristics. A tape carrier lead frame for semiconductor devices characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61289345A JPS63141331A (en) | 1986-12-03 | 1986-12-03 | Lead frame for tape carrier semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61289345A JPS63141331A (en) | 1986-12-03 | 1986-12-03 | Lead frame for tape carrier semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63141331A true JPS63141331A (en) | 1988-06-13 |
Family
ID=17742002
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61289345A Pending JPS63141331A (en) | 1986-12-03 | 1986-12-03 | Lead frame for tape carrier semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63141331A (en) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0312945A (en) * | 1989-06-09 | 1991-01-21 | Toshiba Corp | Tape carrier and testing method therefor |
| US5156983A (en) * | 1989-10-26 | 1992-10-20 | Digtial Equipment Corporation | Method of manufacturing tape automated bonding semiconductor package |
| JPH07211846A (en) * | 1995-02-23 | 1995-08-11 | Ngk Spark Plug Co Ltd | Lead frame |
| JPH09283572A (en) * | 1996-04-17 | 1997-10-31 | Nec Corp | Film carrier semiconductor device |
| WO1998018163A1 (en) * | 1996-10-22 | 1998-04-30 | Seiko Epson Corporation | Film carrier tape, tape carrier semiconductor device assembly, semiconductor device, its manufacturing method, package substrate, and electronic appliance |
| JP2007299900A (en) * | 2006-04-28 | 2007-11-15 | Kawasaki Microelectronics Kk | Semiconductor device and method of preventing dielectric breakdown of semiconductor device |
-
1986
- 1986-12-03 JP JP61289345A patent/JPS63141331A/en active Pending
Cited By (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0312945A (en) * | 1989-06-09 | 1991-01-21 | Toshiba Corp | Tape carrier and testing method therefor |
| US5156983A (en) * | 1989-10-26 | 1992-10-20 | Digtial Equipment Corporation | Method of manufacturing tape automated bonding semiconductor package |
| JPH07211846A (en) * | 1995-02-23 | 1995-08-11 | Ngk Spark Plug Co Ltd | Lead frame |
| JPH09283572A (en) * | 1996-04-17 | 1997-10-31 | Nec Corp | Film carrier semiconductor device |
| WO1998018163A1 (en) * | 1996-10-22 | 1998-04-30 | Seiko Epson Corporation | Film carrier tape, tape carrier semiconductor device assembly, semiconductor device, its manufacturing method, package substrate, and electronic appliance |
| US6130110A (en) * | 1996-10-22 | 2000-10-10 | Seiko Epson Corporation | Film carrier tape, tape carrier semiconductor device assembly, semiconductor device, and method of making the same, mounted board, and electronic device |
| JP2007299900A (en) * | 2006-04-28 | 2007-11-15 | Kawasaki Microelectronics Kk | Semiconductor device and method of preventing dielectric breakdown of semiconductor device |
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