JPS63136577A - Semiconductor device - Google Patents

Abstract

PURPOSE:To manufacture a semiconductor device having proper structure for forming two-dimensional of transistors utilizing two-dimensional electrons and a two-dimensional Hall gas onto the same substrate by shaping a quantum well into an silicon-germanium mixed crystal layer, to which an impurity is not added, in the P channel transistor, forming the two-dimensional Hall gas in said quantum well and a quantum well into the silicon layer, to which the impurity is not added, in the N channel transistor and using the two-dimensional electron gas as a channel in said quantum well. CONSTITUTION:A two-dimensional Hall gas is formed near the interface of an silicon-germanium mixed crystal layer 4 and an silicon layer 5, to which an impurity is not added, and employed as a channel region in a P channel transistor, a two-dimensional electron gas is shaped into the silicon layer in the vicinity of the interface of an N-type silicon-germanium mixed crystal layer 20 and an silicon-germanium mixed crystal layer 19, to which an impurity is not added, in an N channel transistor, and the P and N channel transistors, in which Halls and electrons each operate at high speed without being subject to the effect of ionized impurity scattering, are manufactured.

Description

Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a complementary modulation doping heterojunction transistor in which the flow of high mobility holes and electrons distributed in a two-dimensional state is controlled by a gate electrode. .

[Conventional technology]

Modulated doping superlattice structure in 1970.

Proposed by Esaki et al., 1978.

G a A a / A L by Dingle et al.
This was achieved with the X Gal -X AB system. After that, the existence of two-dimensional electron gas and two-dimensional hole gas was confirmed even in a modulation-doped single heterojunction. In particular, Si/Ge:csil-:c yarn has not only high electron mobility but also high hole mobility, so it is attracting attention as a complementary transistor, and is used as an n-channel transistor (transacti).
onsOn electron aevices, M
ol ED-53, No. 5.1986,? 6
55), p-channel transistors (ZF, K
, Flectron division 1ette
rs.

Vo'1. KDL-7, No, 5.19B6. P2O6
) is being prototyped. Regarding devices using complementary two-dimensional carrier gas, the patent application publication, 1983-
There were 265471 etc.

[Problems that the invention attempts to resolve in P11] However, Variant E
Since +1 doping can be performed only during crystal growth, at least two crystal growth steps are required to perform P-type and n-type variable T doping on the same substrate. This not only makes it difficult to form complementary transistors, but also places a heavy burden on heteroepitaxial devices with low throughput. Furthermore, S
1゛/G e X Si t-X system, Ga
Although the hole mobility can be increased compared to the As/AtxGal-xAB system, the structure of the p-channel transistor and the n-channel transistor is too different, that is, the two-dimensional electron gas is trapped in the silicon layer. The two-dimensional hole gas must exist in the silicon-germanium mixed crystal layer, making it difficult to realize a complementary transistor.

The present invention is intended to solve these problems, and its purpose is to provide a complementary transistor that utilizes two-dimensional electrons and two-dimensional hole gas and is suitable for a complementary transistor that consumes low power and is capable of high M explosions. It is an object of the present invention to provide a semiconductor device having an appropriate phosphor resistance for forming two types of transistors on the same substrate.

[Means for solving problems]

The uninvented semiconductor device includes a p-channel transistor and an n-channel transistor formed on the same substrate.
The p-channel transistor includes a three-layer stacked structure including at least an impurity-free silicon-germanium mixed crystal layer, an impurity-free silicon layer, and a p-type silicon layer; a first high-resistance layer provided in the first layer; , first source, drain and gate electrodes provided on the IJ resistance layer;
The channel transistor is made of at least n-type silicon.
A five-layer stacked structure of a germanium mixed crystal layer, a silicon-germanium mixed crystal IU with no impurities, and a silicon layer with no impurities, and a second high resistance provided on the bond J\j structure. +1, and second source, drain, and gate electrodes provided on the second high-resistance layer, the p-channel transistor forming a heirloom well in the impurity-free silicon-germanium mixed crystal layer; The slave well is characterized by a two-dimensional hole gas, and the n-channel transistor is characterized by forming a slave well in the impurity-free silicon layer, and using the slave well as a channel for a 12-dimensional electron gas. do.

〔Example〕

Hereinafter, the present invention will be described in detail based on Examples.

FIG. 1 is a schematic cross-sectional view of a semiconductor device of the present invention, where A is a p-channel transistor section and B & M are an n-channel transistor section.

Reference numeral 1 denotes a silicon substrate having high resistance, but if isolation between transistors is to be achieved, high resistance is not necessary. Reference numeral 2 denotes a p-channel and n-channel separation region, which is filled with an insulator. 8 is also an insulator and is an interlayer insulating film. 3 is a spacer layer of germanium mixed crystal, and 10 is a spacer layer of germanium mixed crystal from the substrate side upwards. It is made so that the A content increases, for example, the germanium composition varies from 0 to 0.5.

First, the p-channel transistor will be explained. 4 is a silicon-germanium mixed crystal J, and the impurity thermal temperature of 5 is J.
A two-dimensional hole gas is formed near the interface between the JU and the silicon layer, and becomes a channel region. 6 is p-type silicon IV
In order to form a two-dimensional hole gas, at least 31 layers of the above-mentioned 5, 6.7 are required. 7 is a high resistance layer for forming a Schottky junction with the gate electrode 10; 9 is a source electrode, 10
is the drain electrode. Reference numerals 12 and 15 denote depleted p-type regions formed by ion implantation or the like, which are a source and a drain, respectively.

Next, the n-channel transistor will be explained. 20
is an n-type silicon-germanium mixed crystal JΔ, and 19
is an impurity-free silicon-germanium mixed crystal layer, 1
8 is a silicon layer to which no impurities are added. A two-dimensional electron gas is formed in the silicon layer 20 near the interface between 19 and 20.
Lamination of 3 layers of 0 and 4 [Image construction is required. Although 17 is a high resistance layer, it may be made of the same material as the impurity thermal temperature 111 [1] silicon layer 18. 15 is a gate electrode, 14, 16
are each drain 1JLl! This is the L source electrode.

21.

Reference numeral 22 denotes a drain and a source into which n-type impurities are introduced by ion implantation or the like.

The structure of the semiconductor device of the present invention has been described above, and a temporal diagram is shown in FIG. 2 to explain its operation. FIG. 2(A) shows a p-channel transistor,
Figure (E) is a potential diagram below the gate electrode of an n-channel transistor. The horizontal direction represents the depth direction, but the thickness of each layer is drawn for easy understanding and is different from this diagram. Two-dimensional hole gas and two-dimensional electron gas exist in the areas surrounded by circles, respectively.

First, the diagram (α) will be explained. 21 is a gate electrode and corresponds to 10 in FIG. Below, 22.23.24,25
, 26.27 are 7.6, 5, 4, and 5 in Figure 1, respectively.
．． It corresponds to 1. This p-channel transistor is
Appropriate size Ga As / AL X Ga1-xA
Similar to transistors that use s-based two-dimensional electron gas, the band gap is small! This is to accumulate carriers in the P conductor layer. Therefore, in this figure, the hole becomes a p-channel transistor that operates at high speed without being affected by impurity scattering.Next, as shown in FIG. 1B, 28 is the gate electrode, which corresponds to FIG. Below, 29, 50, 51
゜52.33, 34 are respectively 17.18.1 in Figure 1
? , 20. ! It corresponds to S,1. This n-channel transistor, unlike a GaA3/AjXGal-XAs yarn heterojunction, accumulates carriers in a semiconductor layer with a wide bandgap.

Therefore, in this figure, the transistor becomes an n-channel transistor that operates at high speed without electrons receiving irw due to impurity scattering.

In order to operate the transistors in a complementary manner, both the p-channel transistor and the n-channel transistor must be normally off. Furthermore, the mutual conductance values are also required to be balanced. For this reason, it is necessary to accurately control the thickness of each layer, the composition of the mixed crystal, and the impurity concentration for both p-channel transistors and n-channel transistors, and although there are many 1γ6, the potential shown in Figure 2 can be realized. It is necessary that the The material of the gate electrode is also a parameter that affects the threshold voltage of the transistor, but in the present invention, pi
However, it is natural that many materials can be considered for Ti'J, and it is also natural that separate materials can be used for the p-channel and n-channel.

〔Effect of the invention〕

As described above, according to the semiconductor device of the present invention, since the p-channel transistor uses two-dimensional hole gas and the n-channel transistor uses two-dimensional electron gas, both have large mutual conductance. In addition, in the silicon-germanium system, the electron mobility and hole mobility have relatively similar values, so if the film thickness 2 composition and impurity density of each j and j are set to appropriate values, a p-channel transistor can be formed. Since the area occupied by the n-channel transistor and the n-channel transistor can be made equal, the characteristics as a complementary transistor can be fully utilized. In other words, it can be used as a high-speed operation transistor with ultra-low power consumption in ultra-large scale integrated circuits. In particular, if the structure of the present invention is adopted, it is easy to manufacture with respect to the modulation doping of the p-channel transistor section and the n-channel transistor section, so the effect is large.

[Brief explanation of the drawing]

FIG. 1 is a schematic cross-sectional view of the semiconductor device of the present invention, in which the part marked with is a p-channel transistor and the part marked with B is an n-channel transistor. In FIGS. 2(α) and 2(b), FIG. 2(α) is a potential diagram of the lower part of the gate of the p-channel transistor according to the invention. FIG. 5B is a potential diagram below the gate of an n-channel transistor. that's all

Claims (2)

[Claims] (1) A p-channel transistor and an n-channel transistor formed on the same substrate, and the p-channel transistor includes at least an impurity-free silicon-germanium mixed crystal layer, an impurity-free silicon layer, and a p-type a three-layer stacked structure including a silicon layer, a first high resistance layer provided on the stacked structure, and first source, drain, and gate electrodes provided on the first high resistance layer; The channel transistor has a three-layer stacked structure including at least an n-type silicon-germanium mixed crystal layer, an impurity-free silicon-germanium mixed crystal layer, and an impurity-free silicon layer, and a layer provided on the stacked structure. and a second source, drain, and gate electrode provided on the total second high-resistance layer, and the p-channel transistor has quantum dots in the impurity-free silicon-germanium mixed crystal layer. A well is formed in the silicon layer to which no impurities are added, and the quantum well has a two-dimensional hole gas as a channel. Characteristic semiconductor devices. (2) A silicon-germanium mixed crystal layer is provided as a spacer layer on a silicon substrate, and the spacer layer has a germanium composition that increases from the substrate toward the device side. semiconductor devices.