JPS63133649A - Semiconductor device - Google Patents

Abstract

PURPOSE:To avoid degradation of current capacity and electromigration resistance caused by silicon deposition in the parts of a silicon-containing aluminum wiring layer where the wiring pattern is narrowed by a method wherein dummy contact windows which make silicon in the wiring layer grow by epitaxial growth are provided repeatedly along the extending direction of the wiring. CONSTITUTION:Dummy contact windows 24 and 25 are provided repeatedly along the extending direction of a silicon-containing aluminum wiring layer which extends on a semiconductor substrate 1 with an insulating film 2 between in the parts 11 of the wiring layer where the wiring pattern of the width less than 4 mum extends. The interval of the repetition of the contact windows is narrowed to the extent of not producing deposition of silicon in the wiring between the dummy contact windows. For instance, the dummy n<+>type regions 43 and 44 are provided in the parts where the narrow wiring pattern 11 extends at length without contacts for an element, and the dummy n<+>type regions 43 and 44 are contacted with the wiring layer through the dummy contact windows 24 and 25. The interval of providing the dummy contact windows is several tens of microns.

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention provides silicon-containing aluminum configuration I! I! In a semiconductor device equipped with a semiconductor device, a dummy contact is used to epitaxially grow the silicon in the wiring in order to prevent silicon from precipitating in the narrow wiring pattern and causing deterioration of the current capacity and electromigration resistance of the wiring. [Industrial Application Field] The present invention is directed to a semiconductor device using silicon-containing aluminum wiring, in which windows are repeatedly arranged to suppress silicon precipitation in the wiring between these dummy contact windows. Regarding equipment.

[Conventional technology]

Aluminum is the most widely used wiring material in semiconductor devices, but during heat treatment to establish ohmic contact and other manufacturing processes, excessive alloying reactions occur between the wiring aluminum and substrate silicon. Therefore, there is a risk of destroying the shallow PN junction, and measures to prevent this are required.

Currently, as a countermeasure for this, it is common to use aluminum containing about 1 to 2 tres of silicon.

As a result, when the temperature rises, the amount of substrate silicon sucked up into the wiring layer at the contact window by alloy reaction is reduced to <+'
M, and the penetration of aluminum-containing alloy spikes into the substrate is minimized, thereby preventing defects such as PN junction breakdown.

[Problems that the invention attempts to bring to light]

By adding silicon to aluminum wiring, excessive reaction with substrate silicon is suppressed when the temperature rises, but on the other hand, when the temperature falls, the silicon content exceeds the solid solubility, resulting in silicon precipitation. Become.

Silicon precipitation in interconnects occurs in the form of silicon or silicon-rich alloys precipitated at aluminum grain boundaries, and is commonly referred to as silicon nozzle.
The size is about m. This has significantly lower electrical conductivity than the base material aluminum alloy. Therefore, if these silicon nodules occur in a narrow wiring pattern area, a high resistance part will be present, which will melt when electricity is applied, or promote electromigration in that part, resulting in a defective product. . Particularly in a wiring pattern portion of 4 μm or less, when silicon nodules are generated, the width of the remaining high conductivity aluminum alloy portion is significantly narrowed, resulting in an upper AC problem.

In view of the above points, the present invention provides a means for suppressing silicon precipitation in a narrow wiring pattern portion in a semiconductor device using a silicon-containing aluminum alloy as a wiring material, thereby reducing current carrying capacity and electro-φ migration due to silicon deposition. The objective is to prevent the occurrence of resistance deterioration defects.

[Means for solving problems]

In the present invention, dummy contact windows for epitaxially growing silicon in a silicon-containing aluminum wiring layer are repeatedly provided along the extending direction of the wiring in a portion where a wiring pattern of 4 μm or less extends. The spacing between the dummy contact windows is narrowed to such an extent that silicon precipitation does not occur in the wiring.

[Effect]

It is known that on the exposed surface of the substrate inside the contact window, silicon grows in-phase epitaxially from the wiring layer during the temperature cooling process. As a result of solid-phase epitaxial growth inside the contact window, silicon is supplied from the surrounding wiring layer, which suppresses silicon precipitation and the formation of silicon nodules in the wiring layer around the contact window. Ta. In the present invention, this effect is actively utilized by repeatedly arranging dummy contact windows. The effect of preventing silicon precipitation by in-phase epitaxial growth on the contact window is limited to a maximum of 50 μm from the contact window, although it depends on the silicon content and heat treatment requirements.
It extends to the wiring extension part which is a certain distance away. Therefore, in accordance with the present invention, it is preferable to provide all dummy contact windows in a narrow and long wiring pattern portion extending over about 50 μm or more on an insulating film without a contact window. As a result, in a narrow wiring pattern, most of the excess silicon is consumed in solid-phase epitaxial growth, and as a result, the formation of silicon nodules is suppressed.

〔Example〕

The first figure is a plan view of a main part of a semiconductor device according to an embodiment of the present invention, and FIG. 2 is a sectional view taken along the line X-Ga.

In the figure, 1 is a silicon substrate, 2 is an insulating film, 11 to 1
3 is a silicon-containing aluminum wiring pattern, 21-2
5 is a contact window, 31 is a gate t&, 41 to 44 are n
A ten-shaped region, 50 a silicon e-nodule, and 60 a silicon solid-phase epitaxial growth.

As seen in the 1st plan view, for the narrow wiring pattern 110 (width 4 μm or less), the dummy n
Ten-shaped regions 43 and 44i are arranged, and the wiring layer is contacted thereto through dummy contact windows 24 and 25i. The arrangement interval of the dummy contact windows is 1210 μm. The dummy n+ type region 4344 is provided to electrically isolate the wiring 11 from the substrate 1, but if separation is not necessary due to ground wiring etc., the substrate P type surface may be exposed, and the n+ type Areas 43 and 44 may be completely omitted.

In the case of a large wiring pattern 13 (for example, 10 μm in width), a dummy contact window is not required even in a long extended portion without a contact window to the substrate. Here, even if the silicon nozzle 50 occurs, it occupies a small width compared to the nine wiring widths, so it does not significantly increase the wiring resistance. In other words, there will be no problem because the remaining technical colleges will be able to reduce the current sufficiently.

Referring to the cross-sectional view in FIG. 2, the state in which the solid-phase epitaxial layer 60 of silicon is formed in the contact window 21.22 for the drain 41° source 42 and the dummy contact window 23.24 is shown here. This is an indication. In this silicon solid-phase epitaxial layer, supersaturated silicon is precipitated from the silicon-containing aluminum wiring layer and grows on the single crystal surface of the substrate during the cooling process in the heat treatment process. The silicon grown at this time is also supplied from the wiring layer portion several lOμm away from the contact window, so on the contrary, silicon precipitation and nodule formation in the 1M layer are suppressed! +1 is given.

Since silicon precipitation and nodule formation in the wiring layer occur in contact windows and long-extending arrangement pattern parts, dummy contacts according to the present invention can be scattered in such parts. are superimposed. For example, Tammy's contact bag method is disclosed in Japanese Patent Application Laid-Open No. 55-65446.
As seen in the publication, it is known that the alloy is placed adjacent to the contact window for Kuko in order to prevent the alloy reaction between the wiring and the board from occurring excessively at the contact window for Ajiko. . In this case, the tummy contact window is placed only in the area DI close to the element contact window t'!
I will do it. Therefore, as in the present invention, there is a function of preventing the precipitation of phosphorus during the long wiring extension h2 minutes.

It has no effect. The effect of preventing defects by suppressing the generation of silicon nodules can be obtained by, according to the present invention, arranging a dummy contact window for a partial pressure of a long narrow wiring pattern.

〔Effect of the invention〕

According to the present invention, in a semiconductor device using a silicon-containing aluminum wiring layer, it is possible to prevent defects caused by silicon precipitation and nodule formation at narrow wiring back portions by providing a dummy contact window, and to manufacture semiconductor devices. The effects of improved yield, reliability, and life can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a plan view of the apparatus according to the embodiment of the present invention, and FIG. 1 ・・・・・・・・・・・・・・・Silicon substrate, 2
......Insulating film, 11-13...
...Silicon-containing aluminum wiring 1, 21 to 25
・・・・・・Contact window, 31 ・・・・・・・・・
...Gate electrode, 41-44...N+ type field 1.50...Silicon nodule, 60... ...Silicon solid phase epitaxial layer.

Claims (1)

[Claims] In a silicon-containing aluminum wiring layer extending on a semiconductor substrate (1) via an insulating film (2), silicon in the wiring layer is grown epitaxially in a portion (11) where a wiring pattern with a line width of 4 μm or less extends. Dummy contact windows (24) and (25) are repeatedly arranged along the extending direction of the wiring, and the intervals between the repeated arrangement are set to such an extent that silicon precipitation does not occur in the wiring between the dummy contact windows. A semiconductor device characterized by being narrow.