JPS63131587A - Laminated piezoelectric element - Google Patents

Laminated piezoelectric element

Info

Publication number
JPS63131587A
JPS63131587A JP61278087A JP27808786A JPS63131587A JP S63131587 A JPS63131587 A JP S63131587A JP 61278087 A JP61278087 A JP 61278087A JP 27808786 A JP27808786 A JP 27808786A JP S63131587 A JPS63131587 A JP S63131587A
Authority
JP
Japan
Prior art keywords
thickness
piezoelectric element
ceramics
laminated piezoelectric
layers
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP61278087A
Other languages
Japanese (ja)
Inventor
Koichiro Kurihara
光一郎 栗原
Shigeru Sadamura
定村 茂
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Proterial Ltd
Original Assignee
Hitachi Metals Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Metals Ltd filed Critical Hitachi Metals Ltd
Priority to JP61278087A priority Critical patent/JPS63131587A/en
Publication of JPS63131587A publication Critical patent/JPS63131587A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N30/00Piezoelectric or electrostrictive devices
    • H10N30/50Piezoelectric or electrostrictive devices having a stacked or multilayer structure

Landscapes

  • General Electrical Machinery Utilizing Piezoelectricity, Electrostriction Or Magnetostriction (AREA)

Abstract

PURPOSE:To reduce the deterioration in displacement characteristics and reliability by bringing the thickness of ceramics layers at the upper and lower end sections of an element to 25% or less of the thickness of another ceramics layer held by internal electrodes. CONSTITUTION:In a laminated piezoelectric element in which a large number of the sheets of piezoelectric ceramics 1a, 1b, on both surfaces or one surfaces of which electrodes are set up, are laminated, the thickness of ceramics layers not displaced substantially existing at the end sections of the element is brought to 25% or less of the thickness of other displaced ceramics layers held by internal electrodes 2a, 2b. That is, five piezoelectric elements are sampled from piezoelectric elements having conventional structure, and the ceramics layers 1b at upper and lower end sections are polished and worked until the thickness of the layers 1b is brought to 25% of the thickness of other ceramics layers 1a. Accordingly, the laminated piezoelectric element having high displacement characteristics and high reliability can be acquired.

Description

【発明の詳細な説明】 [産業上の利用分野] 本発明は、メカトロニクス、マイクロエレクトロニクス
などの分野において、アクチュエータとして使用される
積層型圧電素子に関するものであり、特に、両面または
片面に電極を設けた圧電セラミックスの薄板を多数枚積
層して形成される積層型圧電素子の構造に係るものであ
る。
Detailed Description of the Invention [Field of Industrial Application] The present invention relates to a laminated piezoelectric element used as an actuator in the fields of mechatronics, microelectronics, etc. This invention relates to the structure of a laminated piezoelectric element formed by laminating a large number of thin plates of piezoelectric ceramics.

[従来の技術] 一般に、積層型圧電素子は、両面または片面に電極を設
けたグリーンシートを複数枚積層し圧着した後、該圧着
体を脱バインダーし焼結して製造されているが1通常、
焼結時における内部電極の保護および駆動時における絶
縁などのために、素子の上下両端部(積層方向両端部)
に電極が設けられていないグリーンシートを複数枚さら
に積層して圧着体を作製し、脱バインダーし焼結するこ
とが行なわれている。このような製造法によれば。
[Prior Art] Generally, a laminated piezoelectric element is manufactured by laminating and crimping a plurality of green sheets each having electrodes on both or one side, and then removing the binder and sintering the crimped body. ,
Both upper and lower ends of the element (both ends in the stacking direction) are used to protect internal electrodes during sintering and insulate during driving.
A pressed body is produced by further laminating a plurality of green sheets without electrodes, and the binder is removed and sintered. According to such a manufacturing method.

得られた積層型圧電素子は、第3図に示すように、内部
電極2によってはさまれている圧電セラミックス層1a
に比べて厚い層1bが圧電素子の上下端部に存在するも
のとなる。
The obtained laminated piezoelectric element consists of a piezoelectric ceramic layer 1a sandwiched between internal electrodes 2, as shown in FIG.
The thicker layer 1b exists at the upper and lower ends of the piezoelectric element.

[発明が解決しようとする問題点] 上記構造の積層型圧電素子の外部電極3a、3bに電極
端子4a、4bを介して電圧を印加すると。
[Problems to be Solved by the Invention] When a voltage is applied to the external electrodes 3a, 3b of the laminated piezoelectric element having the above structure via the electrode terminals 4a, 4b.

内部電極2a、2bにはさまれた各セラミックス層1a
はそれぞれ上下方向(積層方向)に伸び、それに垂直な
方向には縮むような歪みを生じる。
Each ceramic layer 1a sandwiched between internal electrodes 2a and 2b
, respectively, elongate in the vertical direction (laminated direction), and cause distortion in the direction perpendicular to it, such as shrinkage.

しかしながら、上下端部の層1bは、電極によってはさ
まれていないため、電圧が印加されず歪みを生じない。
However, since the layers 1b at the upper and lower ends are not sandwiched between electrodes, no voltage is applied and no distortion occurs.

このため、隣接するセラミックス層1aの歪みを抑制し
、素子の変位特性を低下させるという問題があった。ま
た、本発明者らは、種々実験検討を行なっているうちに
、上記歪抑制力によって、隣接するセラミックス層との
境界部分にせん断路力を生じさせ、その結果、境界部分
に剥離が生じて信頼性を低下させるという問題のあるこ
とにも気がついた。
For this reason, there was a problem in that the strain in the adjacent ceramic layer 1a was suppressed and the displacement characteristics of the element were deteriorated. In addition, while conducting various experimental studies, the present inventors discovered that the above-mentioned strain suppressing force causes a shear path force to be generated at the boundary between adjacent ceramic layers, and as a result, peeling occurs at the boundary. I also noticed that there is a problem that reduces reliability.

本発明は、上記従来構造の積層型圧電素子における上下
端部に存在するセラミックス層により生じる変位特性お
よび信頼性の低下を軽減することを目的とするものであ
る。
An object of the present invention is to reduce the deterioration in displacement characteristics and reliability caused by the ceramic layers present at the upper and lower ends of the laminated piezoelectric element having the conventional structure.

[問題点を解決するための手段] 上記目的を達成するために1本発明は両面または片面に
電極を設けた圧電セラミックスの薄板を多数枚積層して
なる積層型圧電素子において、素子端部に存在する実質
的に変位しないセラミックス層の厚さを、内部電極では
さまれた他の変位するセラミックス層の厚さの25%以
下にしたことを特徴とするものである。
[Means for Solving the Problems] In order to achieve the above object, the present invention provides a laminated piezoelectric element formed by laminating a large number of piezoelectric ceramic thin plates each having electrodes on both or one side. The present invention is characterized in that the thickness of the existing ceramic layer that does not substantially displace is 25% or less of the thickness of the other displaceable ceramic layer sandwiched between the internal electrodes.

本発明において、上下端部に存在する実質的に変位しな
い圧電セラミックス層の厚さは、薄いほど変位特性を向
上させるが、一方、あまり薄すぎると当該層が存在する
ことによる効果、すなわち、焼結時の内部電極の保護お
よび駆動時の絶縁効果や、積層圧着時に生ずる成形歪や
焼結時の表面肌荒れに起因する形状寸法変化などの加工
調整代としての働きなどが十分に得られなくなるので、
少なくとも10μm以上の厚さとすることが望ましい。
In the present invention, the thinner the piezoelectric ceramic layer that is present at the upper and lower ends and which does not substantially displace, the better the displacement characteristics. It will not be possible to sufficiently protect the internal electrodes during sintering, insulate during driving, and work as a processing adjustment allowance for changes in shape and dimensions due to molding distortion caused during lamination crimping and surface roughness during sintering. ,
It is desirable that the thickness be at least 10 μm or more.

[実施例] 以下、本発明を実施例に基づき詳細に説明する。[Example] Hereinafter, the present invention will be explained in detail based on examples.

第1図は、本発明の一実施例を示す積層型圧電素子の側
面図である。図において、la、lbは圧電セラミック
層、2a、2bは内部電極をそれぞれ示す。
FIG. 1 is a side view of a laminated piezoelectric element showing one embodiment of the present invention. In the figure, la and lb are piezoelectric ceramic layers, and 2a and 2b are internal electrodes, respectively.

まず、P b (Z r + T i) 03粉に、有
機バインダーとしてPVB(ポリブチルアルコール)、
可塑剤としてBPBG(ブチルフタリルブチルグリコレ
ート)、有機溶剤としてトリクレンをそれぞれ添加し、
混線後、ドクターブレード法により 200μl厚さの
圧電セラミックスのグリーンシートを形成した0次に、
このグリーンシートの表面に内部電極材料となる白金ペ
ーストをスクリーン印刷したもの(第1図および第3図
において、変位するセラミック層1aとなるもの)50
枚と、白金ペーストを印刷していないグリーンシートを
それぞれ5枚ずつ(第1図および第3図において、変位
しないセラミック層1bとなるもの)を前記50枚のシ
ートの両端側に積み重ね1合計60枚の圧電セラミック
グリーンシートを積み重ねたものを形成し、これを圧着
した。後、所定の寸法形状に切断して複数個の積層体を
得た6次いで、得られた積層体を約1250℃で2時間
焼結してioam角の焼結体を得た。
First, PVB (polybutyl alcohol) as an organic binder was added to P b (Z r + Ti) 03 powder.
Adding BPBG (butylphthalyl butyl glycolate) as a plasticizer and trichlene as an organic solvent,
After crosstalk, a green sheet of piezoelectric ceramics with a thickness of 200 μl was formed using the doctor blade method.
This green sheet is screen-printed with platinum paste that will become the internal electrode material (in Figures 1 and 3, it will become the displacing ceramic layer 1a) 50
and 5 green sheets each with no platinum paste printed on them (in Figures 1 and 3, the ceramic layer 1b that does not displace) are stacked on both ends of the 50 sheets 1 for a total of 60 sheets. A stack of piezoelectric ceramic green sheets was formed and pressed together. Thereafter, a plurality of laminates were obtained by cutting into predetermined dimensions and shapes.6Then, the obtained laminates were sintered at about 1250° C. for 2 hours to obtain ioam square sintered bodies.

次に、これら焼結体の側面を研磨し、該側面に銀ペース
トを塗布、焼付けすることにより外部電極3a、3bを
形成し、端子4a、4bを取り出して第3図に示す従来
構造の積層型圧電素子を形成した。また、第1図に示す
ような本発明による構造の積層型圧電素子を得るために
、上記従来構造の圧電素子から5個抜取り、上下端部の
セラミック層1bの厚さが他のセラミック層1aの厚、
さの25%となるまで研磨加工した。
Next, the side surfaces of these sintered bodies are polished, and external electrodes 3a and 3b are formed by applying and baking silver paste on the side surfaces, and terminals 4a and 4b are taken out to form a laminated structure of the conventional structure shown in FIG. A type piezoelectric element was formed. In order to obtain a multilayer piezoelectric element having the structure according to the present invention as shown in FIG. thickness,
It was polished to 25% of its diameter.

このようにして得られた積層型圧電素子に、それぞれ4
00■の電圧を5分間印加して分極処理を行ない、次い
で、印加電圧と変位量の関係を測定した。その結果を第
2図に示す。
Each of the laminated piezoelectric elements thus obtained had four
A voltage of 0.00 mm was applied for 5 minutes to carry out polarization treatment, and then the relationship between the applied voltage and the amount of displacement was measured. The results are shown in FIG.

第2図において、ヒステリシス曲線Aは本発明構造の積
層型圧電素子の印加電圧と変位量の関係を示す曲線であ
る。また、同図において1曲線Bは上下両端部のセラミ
ック層1bの厚みが大きい従来構造積層型圧電素子の印
加電圧と変位量の関係を示す。図から、本発明による素
子の変位量は、従来の素子に比べて、 100Vで0.
4μm、200 Vで0゜8μm、300Vで1.4μ
m大きいことがわかる。
In FIG. 2, a hysteresis curve A is a curve showing the relationship between the applied voltage and the amount of displacement of the laminated piezoelectric element having the structure of the present invention. Further, in the figure, a curve B shows the relationship between the applied voltage and the amount of displacement of a conventional laminated piezoelectric element in which the thickness of the ceramic layer 1b at both the upper and lower ends is large. From the figure, the amount of displacement of the element according to the present invention is 0.0 at 100V compared to the conventional element.
4μm, 0°8μm at 200V, 1.4μm at 300V
It can be seen that m is large.

なお、上下端部の変位しないセラミック層1bの厚さを
他の変位するセラミック層1aの厚さに比べて75%、
50%とした素子についても同様の測定を行なったが、
従来素子の測定結果と差がなかった。
Note that the thickness of the ceramic layer 1b that does not displace at the upper and lower ends is 75% of the thickness of the other ceramic layer 1a that displaces.
Similar measurements were made for the element with 50%, but
There was no difference from the measurement results of the conventional element.

また1本発明による積層型圧電素子と従来構造の圧電素
子に、それぞれ300vの電圧を印加し、100万回繰
り返し駆動して寿命試験を行なったところ、従来構造の
ものは変位するセラミック層と変位しないセラミック層
との境界部分に剥離が生じて差動しなくなっものが発生
したが、本発明による積層型圧電素子は全く異常が発生
しなかった。したがって、本発明による構造の積層型圧
電素子の方が、従来構造の積層型圧電素子に比べて、素
子端部の層と隣接する層との間に働くせん断路力が小さ
いことが確認できた。
In addition, a life test was conducted by applying a voltage of 300 V to each of the laminated piezoelectric element according to the present invention and the piezoelectric element having a conventional structure, and driving the piezoelectric element repeatedly 1 million times. Although peeling occurred at the boundary with the non-conforming ceramic layer, resulting in loss of differential operation, the laminated piezoelectric element according to the present invention did not exhibit any abnormality. Therefore, it was confirmed that the shear path force acting between the layer at the end of the element and the adjacent layer is smaller in the laminated piezoelectric element having the structure according to the present invention than in the laminated piezoelectric element having the conventional structure. .

[発明の効果] 以上述べたように、本発明によれば、高変位特性を有し
、かつ、信頼性の高い積層型圧電素子が得られるという
利点がある。
[Effects of the Invention] As described above, the present invention has the advantage that a multilayer piezoelectric element having high displacement characteristics and high reliability can be obtained.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は、本発明の一実施例を示す側面図、第2図は本
発明の実施例における印加電圧と変位量を示す特性図、
第3図は従来の積層型圧電素子を示す側面図である。 1:圧電セラミック、2:内部電極、3:外部電極、4
:外部電極端子。 第1図 第3図 第2図 印加電圧 (V)
FIG. 1 is a side view showing an embodiment of the present invention, FIG. 2 is a characteristic diagram showing applied voltage and displacement amount in the embodiment of the present invention,
FIG. 3 is a side view showing a conventional laminated piezoelectric element. 1: piezoelectric ceramic, 2: internal electrode, 3: external electrode, 4
: External electrode terminal. Figure 1 Figure 3 Figure 2 Applied voltage (V)

Claims (1)

【特許請求の範囲】[Claims] 両面または片面に電極を設けた圧電セラミックスの薄板
を多数枚積層してなる積層型圧電素子において、素子の
上下端部のセラミックス層の厚さが、内部電極ではさま
れた他のセラミックス層の厚さの25%以下であること
を特徴とする積層型圧電素子。
In a multilayer piezoelectric element made by laminating a large number of piezoelectric ceramic thin plates with electrodes on both or one side, the thickness of the ceramic layer at the top and bottom ends of the element is equal to the thickness of the other ceramic layers sandwiched between internal electrodes. A laminated piezoelectric element characterized by having a thickness of 25% or less.
JP61278087A 1986-11-21 1986-11-21 Laminated piezoelectric element Pending JPS63131587A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP61278087A JPS63131587A (en) 1986-11-21 1986-11-21 Laminated piezoelectric element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP61278087A JPS63131587A (en) 1986-11-21 1986-11-21 Laminated piezoelectric element

Publications (1)

Publication Number Publication Date
JPS63131587A true JPS63131587A (en) 1988-06-03

Family

ID=17592454

Family Applications (1)

Application Number Title Priority Date Filing Date
JP61278087A Pending JPS63131587A (en) 1986-11-21 1986-11-21 Laminated piezoelectric element

Country Status (1)

Country Link
JP (1) JPS63131587A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04337617A (en) * 1991-05-15 1992-11-25 Murata Mfg Co Ltd Manufacture of multilayer electronic part
JPH06252469A (en) * 1993-02-25 1994-09-09 Nec Corp Manufacture of laminated piezoelectric actuator

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04337617A (en) * 1991-05-15 1992-11-25 Murata Mfg Co Ltd Manufacture of multilayer electronic part
JPH06252469A (en) * 1993-02-25 1994-09-09 Nec Corp Manufacture of laminated piezoelectric actuator

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