JPS6312944A - Inspection instrument for failure of packaging parts - Google Patents

Inspection instrument for failure of packaging parts

Info

Publication number
JPS6312944A
JPS6312944A JP15765986A JP15765986A JPS6312944A JP S6312944 A JPS6312944 A JP S6312944A JP 15765986 A JP15765986 A JP 15765986A JP 15765986 A JP15765986 A JP 15765986A JP S6312944 A JPS6312944 A JP S6312944A
Authority
JP
Japan
Prior art keywords
inspection
defect
component
parts
board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15765986A
Other languages
Japanese (ja)
Inventor
Kunihiko Tsuji
辻 邦彦
Mitsutaka Kato
加藤 充孝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Omron Corp
Original Assignee
Omron Tateisi Electronics Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Omron Tateisi Electronics Co filed Critical Omron Tateisi Electronics Co
Priority to JP15765986A priority Critical patent/JPS6312944A/en
Publication of JPS6312944A publication Critical patent/JPS6312944A/en
Pending legal-status Critical Current

Links

Landscapes

  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

PURPOSE:To shorten an inspection time by accumulating the number of times of an inspection and the number of times of a defect of each parts whenever the inspection is executed, calculating a defect generation rate from said number of times of an inspection and the number of times of a defect, and executing a failure inspection of each parts in accordance with a result of its calculation. CONSTITUTION:At the time of inspecting whether a defect exists or not, with regard to packaging parts 2 on a measuring table 1, the number of times of an inspection against each parts and the number of times of a defect by which it is decided that a defect exists are accumulated in advance in a memory 9. Subsequently, by an arithmetic operation control device 7, a defect generation rate is calculated by the number of times of inspection and the number of times of defect, and in accordance with a result of its calculation, the inspection frequency of each parts is derived, and also, updated. When this inspection frequency is determined, an inspection of parts is executed by the frequency corresponding thereto. That is to say, as for parts whose defect generation rate is low, the number of times of inspection is decreased, and as for parts whose defect generation rate is high, the number of times of inspection is increased, by which the inspection is executed efficiently, and the inspection time is shortened.

Description

【発明の詳細な説明】 〈産業上の利用分野〉 この発明は、プリント配線基板(以下、単に「基板」と
いう)上に実装された各部品につきその実装状態の良否
を検査するのに用いられる検査装置に関連し、殊にこの
発明は、リードのない小型化された電子部品(これを「
表面実装部品」という)についてのこの種検査に好適な
実装部品の不良検査装置に関する。
[Detailed Description of the Invention] <Industrial Application Field> This invention is used to inspect the quality of each component mounted on a printed wiring board (hereinafter simply referred to as "board"). In relation to inspection equipment, the present invention particularly relates to miniaturized electronic components without leads (this is referred to as "
The present invention relates to a defect inspection device for mounted components suitable for this type of inspection of "surface mounted components".

〈従来の技術〉 近年、各種電子部品の小型化が著しく、リードのない表
面実装部品が多く用いられるようになった。
<Prior Art> In recent years, various electronic components have become significantly smaller, and many surface-mounted components without leads have come into use.

従来この種部品を基板上に実装するには、第8図(1)
〜(4)に示す如く、まず基板21上の部品実装位置に
対応してクリームハンダ22を塗布した後(第8図(1
1参照)、チップマウンタ(図示せず)により実装すべ
き部品23をつかんで基板21上に位置決めして置き、
この部品23が存するハンダ付は電極24を前記クリー
ムハンダ22に接触位置させている(第8図(2)参照
)。
Conventionally, in order to mount this type of component on a board, Figure 8 (1)
As shown in ~(4), first, cream solder 22 is applied corresponding to the component mounting position on the board 21 (Fig. 8 (1)).
1), grab the component 23 to be mounted using a chip mounter (not shown), position and place it on the board 21,
This component 23 is soldered so that the electrode 24 is in contact with the cream solder 22 (see FIG. 8(2)).

全ての部品につき同様の作業が完了すると、つき゛にこ
の基)反21をコンベヤ25に載せてリフロー炉内を通
過させ、赤外線ランプ26にてクリームハンダ22を溶
かした後(第8図(31参暇)、基板21を炉外に導い
て溶融ハンダを冷却固化させる(第8図(4)参照)。
When the same work is completed for all the parts, the sheet 21 is placed on the conveyor 25 and passed through the reflow oven, and the cream solder 22 is melted with an infrared lamp 26 (see Fig. 8 (31)). Then, the board 21 is led out of the furnace and the molten solder is cooled and solidified (see FIG. 8 (4)).

上記の部品実装工程において、基板21上には全ての部
品23が適正に実装されるとは限らず、基板21上の規
定位置に部品が実装されていなかったり、その規定位置
から実装部品が位置ずれしていたり、或いは基板上に部
品が適正にハンダ接合されていなかったりする場合があ
る。
In the above component mounting process, not all components 23 are necessarily mounted properly on the board 21, and some components may not be mounted at the specified positions on the board 21, or the mounted components may not be located at the specified positions. There may be misalignment or components may not be properly soldered onto the board.

第9[1(1)〜(4)は、部品のハンダ接合不良が発
生するメカニズムを示すもので、第9図filはクリー
ムハンダ22が塗布された基板21上に部品23が位置
決めして置かれた状態を示す。つぎにこの基板21はハ
ンダ付は処理のためにリフロー炉内を通過させるが、第
9図(2)の予熱段階では、一方のハンダ付は部Aにお
いて基板21表面に塗布されているフラフクスが活性化
して、その溶剤が気化し、クリームハンダ22の表面に
ガス層が生成される。第9図(3)の加熱段階ではクリ
ームハンダ22は半溶融しているが、前記のハンダ付は
部Aにおいては部品23のハンダ付は電極24とクリー
ムハンダ22との間に前記ガス層が介在して、部品23
が基板21より容易に離脱する状態となっている。第9
図(4)では、他方のハンダ付は部Bにおいてクリーム
ハンダ22が完全溶融し、その固化時に生じる表面張力
が部品23を引っ張って前記ハンダ付は部Aを基板21
より浮き上がらせる。従ってこの状態では、部品23の
ハンダ付は電極24は基板21に接触していない。
9 [1 (1) to (4) show the mechanism by which defective solder joints of components occur, and FIG. Indicates a closed state. Next, this board 21 is passed through a reflow oven for soldering treatment, but in the preheating stage of FIG. Upon activation, the solvent evaporates and a gas layer is generated on the surface of the cream solder 22. Although the cream solder 22 is semi-molten in the heating stage shown in FIG. Interveningly, part 23
is in a state where it can be easily separated from the substrate 21. 9th
In Figure (4), the cream solder 22 is completely melted at part B in the other soldering process, and the surface tension generated when it solidifies pulls the component 23.
Make it stand out more. Therefore, in this state, the electrode 24 of the soldered component 23 is not in contact with the board 21.

上記のハンダ付は処理が行われて部品実装工程が完了す
ると、つぎに部品が実装された基板は検査工程に送られ
、基板からの部品の欠落。
After the soldering process described above is completed and the component mounting process is completed, the board with the components mounted is sent to an inspection process to detect missing components from the board.

規定位置からの部品の位置ずれ、基板に対する部品のハ
ンダ接合不良等の欠陥の有無が検査される。
The presence or absence of defects such as misalignment of components from specified positions and poor solder bonding of components to the board is inspected.

従来この種の検査作業は、検査員が部品実装基板を手に
とり、これを拡大レンズを用いて四方より観察するとい
う方法が一般に行われている。
Conventionally, this type of inspection work has generally been carried out by an inspector picking up a component-mounted board and observing it from all sides using a magnifying lens.

また近年、透過X線によるハンダ付は自動検査装置が提
案され、この装置を検査ラインー、導入することで、検
査の合理化をはかることが行われている。この自動検査
装置は、ハンダにX線を透過する鉛成分が含まれている
ことに着目したものであり、部品実装基板へ)lを照射
し、その透過量に応じた画像を生成して、その画像から
部品の実装不良を検査するものである。
Furthermore, in recent years, an automatic inspection device has been proposed for soldering using transmitted X-rays, and by introducing this device into the inspection line, inspections are being streamlined. This automatic inspection device focuses on the fact that solder contains a lead component that transmits X-rays, and irradiates the component mounting board with 1) and generates an image according to the amount of radiation transmitted. This image is used to inspect component mounting defects.

上記のいずれの検査方式においても、検査工程へ部品実
装基板が送られてくると、その基板上に実装された全て
の部品につき必要な検査を一律に実施しているのが実情
である。
In any of the above-mentioned inspection methods, when a component-mounted board is sent to the inspection process, the actual situation is that all the components mounted on the board are uniformly subjected to the necessary inspections.

〈発明が解決しようとする問題点〉 ところが発明者の観察によれば、基板上の実装部品に現
れる部品の欠落1位置ずれ、ハンダ接合部不良等の各欠
陥は、基板上の全ての部品につき同一の確率で発生する
ものではなく、部品毎に欠陥発生率が相違するものであ
る。その原因として、その部品が位置する周辺の部品実
装密度に差異がある点、クリームハンダの塗布量にばら
つきがある点1部品袋着位置に対するチップマウンタの
安定性が均一でない点等が考えられる。
<Problems to be Solved by the Invention> However, according to the inventor's observation, defects such as missing parts, misalignment of parts, defective solder joints, etc. that appear on parts mounted on the board are common to all parts on the board. Defects do not occur with the same probability, and the defect occurrence rate differs for each component. Possible causes of this include differences in component mounting density around the parts where the components are located, variations in the amount of cream solder applied, and uneven stability of the chip mounter with respect to the placement position of one component bag.

従って従来は、欠陥発生率が極めて低い部品であっても
欠陥発生率の高い部品と同じ頻度で検査されており、検
査の無駄が多く、検査効率が悪いという問題があった。
Therefore, in the past, even parts with an extremely low defect rate were inspected at the same frequency as parts with a high defect rate, resulting in a lot of wasted inspection and poor inspection efficiency.

この発明は、上記実情に鑑み、欠陥発生率に応じた検査
頻度で実装部品の検査を行うことによって、検査効率を
向上させ且つ検査時間の短縮をはかった新規な実装部品
の不良検査装置を提供することを目的とする。
In view of the above-mentioned circumstances, the present invention provides a new defect inspection device for mounted components that improves inspection efficiency and shortens inspection time by inspecting mounted components at an inspection frequency that corresponds to the defect occurrence rate. The purpose is to

〈問題点を解決するための手段〉 上記目的を達成するためのこの発明の構成を、一実施例
に対応する第1図〜第6図を用いて説明すると、この発
明では、 基板9上に実装された複数の部品5につきその実装不良
を検査する装置において、 各部品5につき検査を行った検査回数と欠陥があると判
断した欠陥回数とを検査の都度蓄積して記417させる
記憶手段(図示例のメモリ9に相当する)と、 前記検査回数と欠陥回数とから欠陥発生率を算出してそ
の算出結果に応じて各部品5の検査頻度を求め且つ更新
してゆく演算制御手段(図示例の演算制御装置7や記憶
袋W8に相当する)と、 前記検査頻度に応じて各部品5の実装不良を検査する検
査実行手段(図示例のカメラ3.投光装置4および、演
算制御装置7に相当する)とを具(眞させている。
<Means for Solving the Problems> The structure of the present invention for achieving the above object will be explained using FIGS. 1 to 6 corresponding to one embodiment. In an apparatus for inspecting a plurality of mounted components 5 for mounting defects, a storage means (417) for accumulating and recording the number of times each component 5 has been inspected and the number of times it has been determined that there is a defect each time it is inspected; (corresponds to the memory 9 in the illustrated example), and an arithmetic control means (corresponding to the memory 9 in the illustrated example) that calculates the defect occurrence rate from the number of inspections and the number of defects, and determines and updates the inspection frequency of each component 5 according to the calculation result. (corresponding to the illustrated arithmetic and control device 7 and memory bag W8); and inspection execution means (corresponding to the illustrated example of the camera 3, the light projector 4, and the arithmetic and control device) that inspect mounting defects of each component 5 according to the inspection frequency. 7) and gu (true).

〈作用〉 基板9上の各実装部品5につき欠陥の有無を検査する際
、その都度各部品につき検査を行った検査回数と欠陥が
あると判断した欠陥回数とをメモリ9に蓄積してゆく。
<Operation> When each mounted component 5 on the board 9 is inspected for defects, the number of times each component has been inspected and the number of defects determined to be defective are stored in the memory 9 each time.

そして演算制御装置7は現在の検査回数と欠陥回数とか
ら欠陥発生率を算出し、その算出結果に応じて各部品5
の検査頻度を求め且つ更新してゆく。
Then, the arithmetic and control unit 7 calculates the defect occurrence rate from the current number of inspections and the number of defects, and depending on the calculation result,
The inspection frequency will be determined and updated.

この検査顯度が決まると、これに応じた頻度でその部品
の検査が行われる。例えば欠陥発生率の低い部品はとき
おり検査され、また欠陥発生率の高い部品はたびたび検
査されるもので、これにより効率良く検査が進められる
ことになる。
Once the inspection severity is determined, the component is inspected at a frequency corresponding to the inspection severity. For example, parts with a low defect rate are inspected from time to time, and parts with a high defect rate are frequently inspected, which allows for efficient inspection.

〈実施例〉 第1図は、この発明の一実施例にかかる実装部品の不良
検査装置を示す。
<Embodiment> FIG. 1 shows a defect inspection device for mounted components according to an embodiment of the present invention.

図示例の装置は、基板上に実装された複数の表面実装部
品につきそのハンダ接合部において部品の浮きが生じて
いないか否かを検査するためのものであるが、この発明
はこれに限らず、表面実装部品以外の部品の検査にも適
用でき、またハンダ接合部不良以外の不良の検査にも適
用できる。
The illustrated apparatus is for inspecting whether or not there is any floating of parts at the solder joints of a plurality of surface-mounted parts mounted on a board, but the present invention is not limited to this. This method can also be applied to inspecting components other than surface-mounted components, and can also be applied to inspecting defects other than solder joint defects.

図示例において、XYステージより成る測定テーブル1
上に検査対象2(基板上に部品が実装されたもの)が$
L置され、その上方位置にイメージセンサより成るカメ
ラ3と半導体レーザを光源とする投光装置4とが配備さ
れている。
In the illustrated example, a measurement table 1 consisting of an XY stage
The inspection target 2 (components mounted on the board) is shown above.
A camera 3 consisting of an image sensor and a light projecting device 4 using a semiconductor laser as a light source are disposed above the camera 3.

この投光装置4は、第2図および第3図に示す如く、検
査対象である基板9上の実装部品5に対し斜め下方に板
状光りを照射して、部品5側面部のハンダ接合部100
表面に板状光りが交わる光切断線6を生成するためのも
のであり、またカメラ3は前記光切断線6を斜め上方位
置にて撮像して、光切断線6の光線像を生成するための
ものである。
As shown in FIGS. 2 and 3, this light projecting device 4 irradiates a plate-shaped light diagonally downward onto a mounted component 5 on a board 9 to be inspected, and illuminates the solder joints on the side surface of the component 5. 100
The purpose is to generate a light section line 6 where plate-like lights intersect on the surface, and the camera 3 images the light section line 6 at an obliquely upward position to generate a ray image of the light section line 6. belongs to.

上記カメラ3.投光装置4および、測定テーブル1はマ
イクロコンピュータのCF’tJより成る演算制御装置
7に接続されており、この演算il制御装置7ば前記カ
メラ3の撮像動作、投光装置40投光動作、測定テーブ
ル1の移動などを制御信号により一連に制御すると共に
、カメラ3より映像信号を取り込み、必要な画像処理を
行って光切断線6の光線像をモニタテレビ8に表示させ
る。
Above camera 3. The light projection device 4 and the measurement table 1 are connected to an arithmetic control device 7 consisting of a microcomputer CF'tJ, and this arithmetic control device 7 controls the imaging operation of the camera 3, the light projection operation of the light projection device 40, The movement of the measurement table 1 and the like are controlled in a series by control signals, and a video signal is taken in from the camera 3, necessary image processing is performed, and a light beam image of the light cutting line 6 is displayed on a monitor television 8.

この装置例によって部品のハンダ接合部10を検査する
のに、まず演算側′4′B装置7は、測定テーブル1を
移動させ、検査部品5の規定実装位置にカメラ3および
投光装置4を対応位置させる。つぎにカメラ3および投
光装置4へ演算制御装置7より動作指令が与えられると
、投光装置4が投光動作を開始して、検査部品5のハン
ダ接合部10に向けて板状光りが照射される。
In order to inspect the solder joint 10 of a component using this device example, first, the calculation side '4'B device 7 moves the measurement table 1 and places the camera 3 and the light projecting device 4 at the prescribed mounting position of the inspection component 5. Place it in the corresponding position. Next, when an operation command is given to the camera 3 and the light projection device 4 from the arithmetic control device 7, the light projection device 4 starts the light projection operation, and a plate-shaped light is directed toward the solder joint 10 of the inspection component 5. irradiated.

この板状光しは、ハンダ接合部10の表面だけでなく、
部品5の表面から基板9の表面に至る範囲にわたって照
射され、この板状光りが交わる光切断線6が第2図およ
び第3図に示す如く、一連に生成される。この光切断線
6は、その斜め上方に位置するカメラ3により撮像され
て光切断線6の光線像が生成され、その映像信号が演算
制御装置7に取り込まれ、必要な画像処理が行われてモ
ニタテレビ8に表示される。
This plate-shaped light is not only on the surface of the solder joint 10 but also on the surface of the solder joint 10.
The beam is irradiated over a range from the surface of the component 5 to the surface of the substrate 9, and a series of light cutting lines 6 where the plate-shaped lights intersect are generated as shown in FIGS. 2 and 3. This light section line 6 is imaged by the camera 3 located diagonally above the light section line 6 to generate a ray image of the light section line 6, and the video signal is taken into the arithmetic and control unit 7, where necessary image processing is performed. displayed on the monitor television 8.

第4図はこのモニタテレビ8に表示された光切断線の光
線像を示すもので、部品のハンダ接合部】0が適正な状
態にあって部品5に浮きが生じていない場合は、第4図
(1)に示す如く、部品5表面の光切IfrvA6aと
基板9表面の光切断Ni6Cとがハンダ接合部10表面
の光切断線6bを介して一連に連続している。
FIG. 4 shows a light beam image of the light cutting line displayed on the monitor television 8. If the solder joint part of the component 0 is in a proper state and no lifting occurs on the component 5, the 4th As shown in FIG. 1, the optical cutting IfrvA6a on the surface of the component 5 and the optical cutting Ni6C on the surface of the substrate 9 are continuous via the optical cutting line 6b on the surface of the solder joint 10.

これに対して部品のハンダ接合8510が不良であって
部品5が基板9より浮いている場合は、第4図(2)に
示す如く、基板9表面の光切断線6cと部品5表面の光
切断線6aとの間に途切れXが生じることになり、従っ
てこの途切れXの有無を確認することで、部品の浮きを
容易に発見できる。
On the other hand, if the solder joint 8510 of the component is defective and the component 5 is floating above the board 9, as shown in FIG. A break X will occur between the cutting line 6a, and therefore, by checking the presence or absence of this break X, floating of the component can be easily discovered.

第1図に戻って、前記演算制御装置7は基板9上の各部
品5につき上記の検査を実行する都度、その部品の検査
を行った検査回数と欠陥があると判断した欠陥回数とを
メモリ9に蓄積して記憶させると共に、蓄積された検査
回数と欠陥回数とからその部品の欠陥発生率を算出した
後、前記メモリ9に予め格納しであるテーブルを参照し
てその部品の検査頻度を求め且つ更新してゆく。
Returning to FIG. 1, each time the above-mentioned inspection is performed on each component 5 on the board 9, the arithmetic and control unit 7 stores in its memory the number of times the component has been inspected and the number of times it has been determined that there is a defect. After calculating the defect occurrence rate of the part from the accumulated number of inspections and the number of defects, the inspection frequency of the part is calculated by referring to a table stored in advance in the memory 9. Search and update.

第5図は、前記メモリ9に蓄積された各部品の検査回数
と欠陥回数とを示している。同図中、n、、n、L、n
l−−−・は部品番号がり、2.3番の各部品について
の検査回数を、またf、。
FIG. 5 shows the number of inspections and the number of defects for each component stored in the memory 9. In the same figure, n, , n, L, n
l---. is the part number, 2. The number of inspections for each part No. 3, and f.

f、、f3・・・・はその欠陥回数を、それぞれ示す。f, , f3, . . . respectively indicate the number of defects.

従って例えば部品番号が1番の部品は、検査回数がnl
、欠陥回数がf、であることがわかる。
Therefore, for example, a part with part number 1 has a number of inspections of nl.
, it can be seen that the number of defects is f.

第6図は、同じメモリ9に予め格納されている欠陥発生
率と検査頻度との換算テーブルTを示すものであり、同
図中、el、ez、el。
FIG. 6 shows a conversion table T between defect occurrence rate and inspection frequency, which is stored in advance in the same memory 9, and in the figure, el, ez, el.

・・・・、e、l (ただしOS el < e2< 
el <0.・・くea 、ea = 1>は欠陥発生
率を、またP、・ P2・ Py、・・・・、P7 (
ただしO≦p、<pz<  p、<・・・・<Pf、、
ただしP、、=1またはP、、<1>は各欠陥発生率に
対応する検査頻度を、それぞれ示す。
..., e, l (However, OS el < e2 <
el<0. ...kuea, ea = 1> is the defect occurrence rate, and P, ・P2・Py, ・・P7 (
However, O≦p, <pz< p, <...<Pf,,
However, P, , = 1 or P, , <1> indicates the inspection frequency corresponding to each defect occurrence rate.

第7図および第8図は、上記検査頻度を求めろための手
1頃を示している。
FIGS. 7 and 8 show a first step in determining the frequency of inspection.

まず同図のステップ1 (図中rSTIJで示す)では
、基板9に実装された各部品5につき検査頻度100%
の検査(毎回検査)を実行し、各部品を検査する毎にメ
モリ9の[検査回数」に1加算し、また欠陥ありとの判
断が下されろ毎に「欠陥回数」に1加算して、検査結果
をメモリ9りこ蓄積してゆく (ステップ2)。
First, in step 1 in the figure (indicated by rSTIJ in the figure), each component 5 mounted on the board 9 is inspected at a frequency of 100%.
(inspection every time), and each time each part is inspected, 1 is added to the ``number of inspections'' in the memory 9, and 1 is added to the ``number of defects'' each time it is determined that there is a defect. , the test results are stored in memory 9 (step 2).

このデータの蓄積処理は、蓄積データ量(検査回数)が
所定のしきい値に達するまで繰り返し実行されるもので
、ステップ3の「一定量蓄積したか?」の判定が“YE
S”になったとき、演算用2.1rJ装置7は現在の検
査回数n、と現在の欠陥回数f、とからつぎの0式の演
算を実行してその部品の欠陥発生率α、を算出する(ス
テ・7ブ4)。
This data accumulation process is repeatedly executed until the amount of accumulated data (the number of inspections) reaches a predetermined threshold, and the determination of "Has a certain amount been accumulated?" in step 3 is "YES".
S'', the calculation 2.1rJ device 7 calculates the defect occurrence rate α of the part by calculating the following formula 0 from the current number of inspections n and the current number of defects f. (Step 7 B4).

α、=f、/   ni  ・・・・■つぎに演算制御
装置7は、算出した欠陥発生率α、につきメモリ9に格
納された前記換算テーブルTを参照して、その部品の検
査頻度p。
α,=f,/ni...■Next, the arithmetic and control unit 7 refers to the conversion table T stored in the memory 9 for the calculated defect incidence rate α, and determines the inspection frequency p of the component.

を求めてこれを更新する(ステップ5)。is calculated and updated (step 5).

第8図は、この検査頻度p、を決定するための演算制御
装置7の制御手順を示すもので、まず同図のステップ1
1で、演算制御装置7は内部に有するカンウタjを初期
設定(j=1)’。
FIG. 8 shows the control procedure of the arithmetic and control unit 7 for determining this inspection frequency p.
1, the arithmetic and control unit 7 initializes the internal counter j (j=1)'.

で、前記換算テーブルTの先頭アドレスを指定する。つ
ぎに演算制御装置7はそのアドレスにセットされている
欠陥発生率e、を読み出し、これと前記で算出した欠陥
発生率αiとの大小比較する(ステップ12)。
Then, specify the start address of the conversion table T. Next, the arithmetic and control unit 7 reads the defect occurrence rate e set at that address, and compares this with the defect incidence rate αi calculated above (step 12).

いま算出にかかる欠陥発生率α1が換算テーブルTにお
けるj番目(ただじj≠1)の欠陥発生率e、に最も近
い値であり、しかもαi≦02であると仮定すると、ス
テップ12の判定は“NO”となり、ステップ13で前
記カウンタjに1加算して、ステップ12の同様の判定
を行う。
Assuming that the defect occurrence rate α1 currently being calculated is the closest value to the j-th (just j≠1) defect occurrence rate e in the conversion table T, and that αi≦02, the determination in step 12 is If the answer is "NO", the counter j is incremented by 1 in step 13, and the same determination as in step 12 is made.

この繰返し処理の結果、ステップ12の判定がYES”
になったとき、ステップ14へ進み、換算テーブルTに
おけるj番目のデータPJが読み出され、その部品の検
査頻度をP、に決定する。
As a result of this iterative processing, the determination in step 12 is YES.”
When , the process proceeds to step 14, where the j-th data PJ in the conversion table T is read out, and the inspection frequency of that part is determined to be P.

1記検査頻度の決定手順は、基板上の各部品について実
行されるもので、これによりその部品の検査頻度が決定
されれば、つぎのその部品の検査は決定にかかる検査頻
度に基づき実行されることになる。
1. The procedure for determining the inspection frequency described above is performed for each component on the board, and once the inspection frequency for that component is determined, the next inspection for that component is performed based on the determined inspection frequency. That will happen.

〈発明の効果〉 この発明は上記の如く、各部品の検査回数と欠陥回数と
を検査の都度蓄積してゆき、その検査回数と欠陥回数と
から欠陥発生率を算出してその算出結果に応じて各部品
の検査頻度を求めると共に、この検査頻度に応じて各部
品の不良検査を実行するようにしたから、欠陥発生率が
低い部品については検査頻度の低い抜き取り検査方法が
実行され、一方欠陥発生率の高い部品については検査頻
度の高い毎回検査に近い検査方法が実行されもので、検
査の無駄が少なくなり、検査効率が向上して検査時間の
短縮をはかることができる等、発明口約を達成した顕著
な効果を奏する。
<Effects of the Invention> As described above, this invention accumulates the number of inspections and the number of defects for each component each time it is inspected, calculates the defect occurrence rate from the number of inspections and the number of defects, and calculates the defect occurrence rate according to the calculation result. In addition to determining the inspection frequency for each part, the defect inspection method for each part is carried out according to this inspection frequency, so parts with a low defect incidence rate can be inspected using a sampling inspection method with a low inspection frequency. For parts with a high occurrence rate, an inspection method that is similar to every-time inspection is carried out, which reduces waste in inspections, improves inspection efficiency, and shortens inspection time. It has achieved remarkable effects.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はこの発明の一実施例にかかる実装部品の不良検
査装置のブロック図、第2図はカメラと投光装置の位置
関係を示す説明図、第3図はハンダ接合部を示す実装部
品の断面図、第4図は光切断線の光線像を示す説明図、
第5図および第6図はメモリの記憶内容を示す説明図、
第7図および第8図は検査頻度を求めるための手順を示
すフローチャート、第9図は基板への部品実装手順を示
す断面図、第10図は部品のハンダ接合不良の発生メカ
ニズムを示す断面図である。 3・・・・カメラ 4・・・・投光装置 7・・・・演算制御装置 9・・・・メモリ
Fig. 1 is a block diagram of a defect inspection device for mounted components according to an embodiment of the present invention, Fig. 2 is an explanatory diagram showing the positional relationship between a camera and a light projector, and Fig. 3 is a mounted part showing a solder joint. 4 is an explanatory diagram showing a ray image of a light section line,
FIG. 5 and FIG. 6 are explanatory diagrams showing the storage contents of the memory;
Figures 7 and 8 are flowcharts showing the procedure for determining the inspection frequency, Figure 9 is a cross-sectional view showing the procedure for mounting components on a board, and Figure 10 is a cross-sectional view showing the mechanism of occurrence of defective solder joints of components. It is. 3...Camera 4...Light emitter 7...Arithmetic control device 9...Memory

Claims (3)

【特許請求の範囲】[Claims] (1)基板上に実装された複数の部品につきその実装不
良を検査する装置において、 各部品につき検査を行った検査回数と欠陥があると判断
した欠陥回数とを検査の都度蓄積して記憶させる記憶手
段と、 前記検査回数と欠陥回数とから欠陥発生率を算出してそ
の算出結果に応じて各部品の検査頻度を求め且つ更新し
てゆく演算制御手段と、前記検査頻度に応じて各部品の
実装不良を検査する検査実行手段とを具備して成る実装
部品の不良検査装置。
(1) In a device that inspects multiple components mounted on a board for mounting defects, the number of times each component was inspected and the number of times it was determined that there was a defect are accumulated and stored for each inspection. a storage means; an arithmetic control means for calculating the defect occurrence rate from the number of inspections and the number of defects; and determining and updating the frequency of inspection of each part according to the calculation result; 1. A defective inspection device for a mounted component, comprising: inspection execution means for inspecting for a defective mounting.
(2)前記部品は、表面実装部品である特許請求の範囲
第1項記載の実装部品の不良検査装置。
(2) The device for inspecting defects in mounted components according to claim 1, wherein the component is a surface-mounted component.
(3)前記検査実行手段は、基板と部品とのハンダ接合
部へ板状光を照射してその表面に光切断線を生成するた
めの投光装置と、前記光切断線を撮像してその光線像を
生成するためのカメラと、前記光線像に基づき部品の実
装不良検査に関する所定の演算処理を実行する演算制御
装置とから成る特許請求の範囲第1項記載の実装部品の
不良検査装置。
(3) The inspection execution means includes a light projecting device for irradiating a plate-shaped light onto the solder joint between the board and the component to generate a light cutting line on the surface thereof, and an image capturing device for capturing an image of the light cutting line. 2. A defect inspection device for mounted components according to claim 1, comprising a camera for generating a light beam image, and an arithmetic control device for executing predetermined arithmetic processing related to inspection for defective mounting of the component based on the light beam image.
JP15765986A 1986-07-03 1986-07-03 Inspection instrument for failure of packaging parts Pending JPS6312944A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15765986A JPS6312944A (en) 1986-07-03 1986-07-03 Inspection instrument for failure of packaging parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15765986A JPS6312944A (en) 1986-07-03 1986-07-03 Inspection instrument for failure of packaging parts

Publications (1)

Publication Number Publication Date
JPS6312944A true JPS6312944A (en) 1988-01-20

Family

ID=15654563

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15765986A Pending JPS6312944A (en) 1986-07-03 1986-07-03 Inspection instrument for failure of packaging parts

Country Status (1)

Country Link
JP (1) JPS6312944A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011174892A (en) * 2010-02-25 2011-09-08 Canon Inc Inspection apparatus

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58165337A (en) * 1982-03-26 1983-09-30 Hitachi Ltd Method for defect analysis used in semiconductor manufacturing plant

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58165337A (en) * 1982-03-26 1983-09-30 Hitachi Ltd Method for defect analysis used in semiconductor manufacturing plant

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011174892A (en) * 2010-02-25 2011-09-08 Canon Inc Inspection apparatus

Similar Documents

Publication Publication Date Title
JPH02138855A (en) Inspecting method of soldered part by x-ray transmission image, apparatus therefor and packaging structure of electronic component on circuit board
DE3772411D1 (en) METHOD AND DEVICE FOR CARRYING OUT THE GOOD EXAMINATION OF PRINTED CIRCUITS.
US7664311B2 (en) Component mounting board inspecting apparatus
JPH0682801A (en) Defect inspecting and correcting device
JP2009300438A (en) Comprehensive inspection system and its method for flexible printed circuit board
JP2005017234A (en) Visual inspection method, visual inspection device, and manufacturing equipment for electronic circuit substrate
JPS6312944A (en) Inspection instrument for failure of packaging parts
JP2015148507A (en) Quality control system
JP2917117B2 (en) Method and apparatus for calculating work position coordinates on printed circuit board
JPH1090191A (en) Soldering testing equipment
JPH02216408A (en) Substrate inspection device
JP2661577B2 (en) Solder appearance inspection method and apparatus
JPS63167208A (en) Surface unevenness inspecting instrument
JP2629798B2 (en) Board inspection equipment
JPS635245A (en) Apparatus for inspecting soldered part of mounting part
JPS6311842A (en) Soldered joint inspecting device for mounted component
JPH05259249A (en) Method and apparatus for inspecting flip chip
JPH01266680A (en) Inspection instrument for soldered part
JPS636408A (en) Flank part inspecting device for package component
JPS63168503A (en) Apparatus for inspecting surface unevenness
JPH0894332A (en) Device for inspecting mounted parts on electronic substrate
JPH03192800A (en) Component mounting recognition method for printed board
JPH04140650A (en) Apparatus for inspecting printed circuit board
JPH02297048A (en) Method for inspecting appearance of soldering for printed board
JPH0771920A (en) Method for inspecting mounted state of electronic part